qla_iocb.c 76 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2014 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/blkdev.h>
  10. #include <linux/delay.h>
  11. #include <scsi/scsi_tcq.h>
  12. static void qla25xx_set_que(srb_t *, struct rsp_que **);
  13. /**
  14. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  15. * @cmd: SCSI command
  16. *
  17. * Returns the proper CF_* direction based on CDB.
  18. */
  19. static inline uint16_t
  20. qla2x00_get_cmd_direction(srb_t *sp)
  21. {
  22. uint16_t cflags;
  23. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  24. struct scsi_qla_host *vha = sp->fcport->vha;
  25. cflags = 0;
  26. /* Set transfer direction */
  27. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  28. cflags = CF_WRITE;
  29. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  30. vha->qla_stats.output_requests++;
  31. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  32. cflags = CF_READ;
  33. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  34. vha->qla_stats.input_requests++;
  35. }
  36. return (cflags);
  37. }
  38. /**
  39. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  40. * Continuation Type 0 IOCBs to allocate.
  41. *
  42. * @dsds: number of data segment decriptors needed
  43. *
  44. * Returns the number of IOCB entries needed to store @dsds.
  45. */
  46. uint16_t
  47. qla2x00_calc_iocbs_32(uint16_t dsds)
  48. {
  49. uint16_t iocbs;
  50. iocbs = 1;
  51. if (dsds > 3) {
  52. iocbs += (dsds - 3) / 7;
  53. if ((dsds - 3) % 7)
  54. iocbs++;
  55. }
  56. return (iocbs);
  57. }
  58. /**
  59. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  60. * Continuation Type 1 IOCBs to allocate.
  61. *
  62. * @dsds: number of data segment decriptors needed
  63. *
  64. * Returns the number of IOCB entries needed to store @dsds.
  65. */
  66. uint16_t
  67. qla2x00_calc_iocbs_64(uint16_t dsds)
  68. {
  69. uint16_t iocbs;
  70. iocbs = 1;
  71. if (dsds > 2) {
  72. iocbs += (dsds - 2) / 5;
  73. if ((dsds - 2) % 5)
  74. iocbs++;
  75. }
  76. return (iocbs);
  77. }
  78. /**
  79. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  80. * @ha: HA context
  81. *
  82. * Returns a pointer to the Continuation Type 0 IOCB packet.
  83. */
  84. static inline cont_entry_t *
  85. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  86. {
  87. cont_entry_t *cont_pkt;
  88. struct req_que *req = vha->req;
  89. /* Adjust ring index. */
  90. req->ring_index++;
  91. if (req->ring_index == req->length) {
  92. req->ring_index = 0;
  93. req->ring_ptr = req->ring;
  94. } else {
  95. req->ring_ptr++;
  96. }
  97. cont_pkt = (cont_entry_t *)req->ring_ptr;
  98. /* Load packet defaults. */
  99. *((uint32_t *)(&cont_pkt->entry_type)) =
  100. __constant_cpu_to_le32(CONTINUE_TYPE);
  101. return (cont_pkt);
  102. }
  103. /**
  104. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  105. * @ha: HA context
  106. *
  107. * Returns a pointer to the continuation type 1 IOCB packet.
  108. */
  109. static inline cont_a64_entry_t *
  110. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  111. {
  112. cont_a64_entry_t *cont_pkt;
  113. /* Adjust ring index. */
  114. req->ring_index++;
  115. if (req->ring_index == req->length) {
  116. req->ring_index = 0;
  117. req->ring_ptr = req->ring;
  118. } else {
  119. req->ring_ptr++;
  120. }
  121. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  122. /* Load packet defaults. */
  123. *((uint32_t *)(&cont_pkt->entry_type)) = IS_QLAFX00(vha->hw) ?
  124. __constant_cpu_to_le32(CONTINUE_A64_TYPE_FX00) :
  125. __constant_cpu_to_le32(CONTINUE_A64_TYPE);
  126. return (cont_pkt);
  127. }
  128. static inline int
  129. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  130. {
  131. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  132. uint8_t guard = scsi_host_get_guard(cmd->device->host);
  133. /* We always use DIFF Bundling for best performance */
  134. *fw_prot_opts = 0;
  135. /* Translate SCSI opcode to a protection opcode */
  136. switch (scsi_get_prot_op(cmd)) {
  137. case SCSI_PROT_READ_STRIP:
  138. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  139. break;
  140. case SCSI_PROT_WRITE_INSERT:
  141. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  142. break;
  143. case SCSI_PROT_READ_INSERT:
  144. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  145. break;
  146. case SCSI_PROT_WRITE_STRIP:
  147. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  148. break;
  149. case SCSI_PROT_READ_PASS:
  150. case SCSI_PROT_WRITE_PASS:
  151. if (guard & SHOST_DIX_GUARD_IP)
  152. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  153. else
  154. *fw_prot_opts |= PO_MODE_DIF_PASS;
  155. break;
  156. default: /* Normal Request */
  157. *fw_prot_opts |= PO_MODE_DIF_PASS;
  158. break;
  159. }
  160. return scsi_prot_sg_count(cmd);
  161. }
  162. /*
  163. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  164. * capable IOCB types.
  165. *
  166. * @sp: SRB command to process
  167. * @cmd_pkt: Command type 2 IOCB
  168. * @tot_dsds: Total number of segments to transfer
  169. */
  170. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  171. uint16_t tot_dsds)
  172. {
  173. uint16_t avail_dsds;
  174. uint32_t *cur_dsd;
  175. scsi_qla_host_t *vha;
  176. struct scsi_cmnd *cmd;
  177. struct scatterlist *sg;
  178. int i;
  179. cmd = GET_CMD_SP(sp);
  180. /* Update entry type to indicate Command Type 2 IOCB */
  181. *((uint32_t *)(&cmd_pkt->entry_type)) =
  182. __constant_cpu_to_le32(COMMAND_TYPE);
  183. /* No data transfer */
  184. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  185. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  186. return;
  187. }
  188. vha = sp->fcport->vha;
  189. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  190. /* Three DSDs are available in the Command Type 2 IOCB */
  191. avail_dsds = 3;
  192. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  193. /* Load data segments */
  194. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  195. cont_entry_t *cont_pkt;
  196. /* Allocate additional continuation packets? */
  197. if (avail_dsds == 0) {
  198. /*
  199. * Seven DSDs are available in the Continuation
  200. * Type 0 IOCB.
  201. */
  202. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  203. cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
  204. avail_dsds = 7;
  205. }
  206. *cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
  207. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  208. avail_dsds--;
  209. }
  210. }
  211. /**
  212. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  213. * capable IOCB types.
  214. *
  215. * @sp: SRB command to process
  216. * @cmd_pkt: Command type 3 IOCB
  217. * @tot_dsds: Total number of segments to transfer
  218. */
  219. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  220. uint16_t tot_dsds)
  221. {
  222. uint16_t avail_dsds;
  223. uint32_t *cur_dsd;
  224. scsi_qla_host_t *vha;
  225. struct scsi_cmnd *cmd;
  226. struct scatterlist *sg;
  227. int i;
  228. cmd = GET_CMD_SP(sp);
  229. /* Update entry type to indicate Command Type 3 IOCB */
  230. *((uint32_t *)(&cmd_pkt->entry_type)) =
  231. __constant_cpu_to_le32(COMMAND_A64_TYPE);
  232. /* No data transfer */
  233. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  234. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  235. return;
  236. }
  237. vha = sp->fcport->vha;
  238. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  239. /* Two DSDs are available in the Command Type 3 IOCB */
  240. avail_dsds = 2;
  241. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  242. /* Load data segments */
  243. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  244. dma_addr_t sle_dma;
  245. cont_a64_entry_t *cont_pkt;
  246. /* Allocate additional continuation packets? */
  247. if (avail_dsds == 0) {
  248. /*
  249. * Five DSDs are available in the Continuation
  250. * Type 1 IOCB.
  251. */
  252. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  253. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  254. avail_dsds = 5;
  255. }
  256. sle_dma = sg_dma_address(sg);
  257. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  258. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  259. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  260. avail_dsds--;
  261. }
  262. }
  263. /**
  264. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  265. * @sp: command to send to the ISP
  266. *
  267. * Returns non-zero if a failure occurred, else zero.
  268. */
  269. int
  270. qla2x00_start_scsi(srb_t *sp)
  271. {
  272. int ret, nseg;
  273. unsigned long flags;
  274. scsi_qla_host_t *vha;
  275. struct scsi_cmnd *cmd;
  276. uint32_t *clr_ptr;
  277. uint32_t index;
  278. uint32_t handle;
  279. cmd_entry_t *cmd_pkt;
  280. uint16_t cnt;
  281. uint16_t req_cnt;
  282. uint16_t tot_dsds;
  283. struct device_reg_2xxx __iomem *reg;
  284. struct qla_hw_data *ha;
  285. struct req_que *req;
  286. struct rsp_que *rsp;
  287. /* Setup device pointers. */
  288. ret = 0;
  289. vha = sp->fcport->vha;
  290. ha = vha->hw;
  291. reg = &ha->iobase->isp;
  292. cmd = GET_CMD_SP(sp);
  293. req = ha->req_q_map[0];
  294. rsp = ha->rsp_q_map[0];
  295. /* So we know we haven't pci_map'ed anything yet */
  296. tot_dsds = 0;
  297. /* Send marker if required */
  298. if (vha->marker_needed != 0) {
  299. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  300. QLA_SUCCESS) {
  301. return (QLA_FUNCTION_FAILED);
  302. }
  303. vha->marker_needed = 0;
  304. }
  305. /* Acquire ring specific lock */
  306. spin_lock_irqsave(&ha->hardware_lock, flags);
  307. /* Check for room in outstanding command list. */
  308. handle = req->current_outstanding_cmd;
  309. for (index = 1; index < req->num_outstanding_cmds; index++) {
  310. handle++;
  311. if (handle == req->num_outstanding_cmds)
  312. handle = 1;
  313. if (!req->outstanding_cmds[handle])
  314. break;
  315. }
  316. if (index == req->num_outstanding_cmds)
  317. goto queuing_error;
  318. /* Map the sg table so we have an accurate count of sg entries needed */
  319. if (scsi_sg_count(cmd)) {
  320. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  321. scsi_sg_count(cmd), cmd->sc_data_direction);
  322. if (unlikely(!nseg))
  323. goto queuing_error;
  324. } else
  325. nseg = 0;
  326. tot_dsds = nseg;
  327. /* Calculate the number of request entries needed. */
  328. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  329. if (req->cnt < (req_cnt + 2)) {
  330. cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg));
  331. if (req->ring_index < cnt)
  332. req->cnt = cnt - req->ring_index;
  333. else
  334. req->cnt = req->length -
  335. (req->ring_index - cnt);
  336. /* If still no head room then bail out */
  337. if (req->cnt < (req_cnt + 2))
  338. goto queuing_error;
  339. }
  340. /* Build command packet */
  341. req->current_outstanding_cmd = handle;
  342. req->outstanding_cmds[handle] = sp;
  343. sp->handle = handle;
  344. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  345. req->cnt -= req_cnt;
  346. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  347. cmd_pkt->handle = handle;
  348. /* Zero out remaining portion of packet. */
  349. clr_ptr = (uint32_t *)cmd_pkt + 2;
  350. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  351. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  352. /* Set target ID and LUN number*/
  353. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  354. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  355. cmd_pkt->control_flags = __constant_cpu_to_le16(CF_SIMPLE_TAG);
  356. /* Load SCSI command packet. */
  357. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  358. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  359. /* Build IOCB segments */
  360. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  361. /* Set total data segment count. */
  362. cmd_pkt->entry_count = (uint8_t)req_cnt;
  363. wmb();
  364. /* Adjust ring index. */
  365. req->ring_index++;
  366. if (req->ring_index == req->length) {
  367. req->ring_index = 0;
  368. req->ring_ptr = req->ring;
  369. } else
  370. req->ring_ptr++;
  371. sp->flags |= SRB_DMA_VALID;
  372. /* Set chip new ring index. */
  373. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  374. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  375. /* Manage unprocessed RIO/ZIO commands in response queue. */
  376. if (vha->flags.process_response_queue &&
  377. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  378. qla2x00_process_response_queue(rsp);
  379. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  380. return (QLA_SUCCESS);
  381. queuing_error:
  382. if (tot_dsds)
  383. scsi_dma_unmap(cmd);
  384. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  385. return (QLA_FUNCTION_FAILED);
  386. }
  387. /**
  388. * qla2x00_start_iocbs() - Execute the IOCB command
  389. */
  390. void
  391. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  392. {
  393. struct qla_hw_data *ha = vha->hw;
  394. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  395. if (IS_P3P_TYPE(ha)) {
  396. qla82xx_start_iocbs(vha);
  397. } else {
  398. /* Adjust ring index. */
  399. req->ring_index++;
  400. if (req->ring_index == req->length) {
  401. req->ring_index = 0;
  402. req->ring_ptr = req->ring;
  403. } else
  404. req->ring_ptr++;
  405. /* Set chip new ring index. */
  406. if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
  407. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  408. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  409. } else if (IS_QLAFX00(ha)) {
  410. WRT_REG_DWORD(&reg->ispfx00.req_q_in, req->ring_index);
  411. RD_REG_DWORD_RELAXED(&reg->ispfx00.req_q_in);
  412. QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
  413. } else if (IS_FWI2_CAPABLE(ha)) {
  414. WRT_REG_DWORD(&reg->isp24.req_q_in, req->ring_index);
  415. RD_REG_DWORD_RELAXED(&reg->isp24.req_q_in);
  416. } else {
  417. WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp),
  418. req->ring_index);
  419. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp));
  420. }
  421. }
  422. }
  423. /**
  424. * qla2x00_marker() - Send a marker IOCB to the firmware.
  425. * @ha: HA context
  426. * @loop_id: loop ID
  427. * @lun: LUN
  428. * @type: marker modifier
  429. *
  430. * Can be called from both normal and interrupt context.
  431. *
  432. * Returns non-zero if a failure occurred, else zero.
  433. */
  434. static int
  435. __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  436. struct rsp_que *rsp, uint16_t loop_id,
  437. uint64_t lun, uint8_t type)
  438. {
  439. mrk_entry_t *mrk;
  440. struct mrk_entry_24xx *mrk24 = NULL;
  441. struct qla_hw_data *ha = vha->hw;
  442. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  443. req = ha->req_q_map[0];
  444. mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL);
  445. if (mrk == NULL) {
  446. ql_log(ql_log_warn, base_vha, 0x3026,
  447. "Failed to allocate Marker IOCB.\n");
  448. return (QLA_FUNCTION_FAILED);
  449. }
  450. mrk->entry_type = MARKER_TYPE;
  451. mrk->modifier = type;
  452. if (type != MK_SYNC_ALL) {
  453. if (IS_FWI2_CAPABLE(ha)) {
  454. mrk24 = (struct mrk_entry_24xx *) mrk;
  455. mrk24->nport_handle = cpu_to_le16(loop_id);
  456. int_to_scsilun(lun, (struct scsi_lun *)&mrk24->lun);
  457. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  458. mrk24->vp_index = vha->vp_idx;
  459. mrk24->handle = MAKE_HANDLE(req->id, mrk24->handle);
  460. } else {
  461. SET_TARGET_ID(ha, mrk->target, loop_id);
  462. mrk->lun = cpu_to_le16((uint16_t)lun);
  463. }
  464. }
  465. wmb();
  466. qla2x00_start_iocbs(vha, req);
  467. return (QLA_SUCCESS);
  468. }
  469. int
  470. qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  471. struct rsp_que *rsp, uint16_t loop_id, uint64_t lun,
  472. uint8_t type)
  473. {
  474. int ret;
  475. unsigned long flags = 0;
  476. spin_lock_irqsave(&vha->hw->hardware_lock, flags);
  477. ret = __qla2x00_marker(vha, req, rsp, loop_id, lun, type);
  478. spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
  479. return (ret);
  480. }
  481. /*
  482. * qla2x00_issue_marker
  483. *
  484. * Issue marker
  485. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  486. * Might release it, then reaquire.
  487. */
  488. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  489. {
  490. if (ha_locked) {
  491. if (__qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  492. MK_SYNC_ALL) != QLA_SUCCESS)
  493. return QLA_FUNCTION_FAILED;
  494. } else {
  495. if (qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  496. MK_SYNC_ALL) != QLA_SUCCESS)
  497. return QLA_FUNCTION_FAILED;
  498. }
  499. vha->marker_needed = 0;
  500. return QLA_SUCCESS;
  501. }
  502. static inline int
  503. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  504. uint16_t tot_dsds)
  505. {
  506. uint32_t *cur_dsd = NULL;
  507. scsi_qla_host_t *vha;
  508. struct qla_hw_data *ha;
  509. struct scsi_cmnd *cmd;
  510. struct scatterlist *cur_seg;
  511. uint32_t *dsd_seg;
  512. void *next_dsd;
  513. uint8_t avail_dsds;
  514. uint8_t first_iocb = 1;
  515. uint32_t dsd_list_len;
  516. struct dsd_dma *dsd_ptr;
  517. struct ct6_dsd *ctx;
  518. cmd = GET_CMD_SP(sp);
  519. /* Update entry type to indicate Command Type 3 IOCB */
  520. *((uint32_t *)(&cmd_pkt->entry_type)) =
  521. __constant_cpu_to_le32(COMMAND_TYPE_6);
  522. /* No data transfer */
  523. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  524. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  525. return 0;
  526. }
  527. vha = sp->fcport->vha;
  528. ha = vha->hw;
  529. /* Set transfer direction */
  530. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  531. cmd_pkt->control_flags =
  532. __constant_cpu_to_le16(CF_WRITE_DATA);
  533. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  534. vha->qla_stats.output_requests++;
  535. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  536. cmd_pkt->control_flags =
  537. __constant_cpu_to_le16(CF_READ_DATA);
  538. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  539. vha->qla_stats.input_requests++;
  540. }
  541. cur_seg = scsi_sglist(cmd);
  542. ctx = GET_CMD_CTX_SP(sp);
  543. while (tot_dsds) {
  544. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  545. QLA_DSDS_PER_IOCB : tot_dsds;
  546. tot_dsds -= avail_dsds;
  547. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  548. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  549. struct dsd_dma, list);
  550. next_dsd = dsd_ptr->dsd_addr;
  551. list_del(&dsd_ptr->list);
  552. ha->gbl_dsd_avail--;
  553. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  554. ctx->dsd_use_cnt++;
  555. ha->gbl_dsd_inuse++;
  556. if (first_iocb) {
  557. first_iocb = 0;
  558. dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  559. *dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  560. *dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  561. cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
  562. } else {
  563. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  564. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  565. *cur_dsd++ = cpu_to_le32(dsd_list_len);
  566. }
  567. cur_dsd = (uint32_t *)next_dsd;
  568. while (avail_dsds) {
  569. dma_addr_t sle_dma;
  570. sle_dma = sg_dma_address(cur_seg);
  571. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  572. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  573. *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
  574. cur_seg = sg_next(cur_seg);
  575. avail_dsds--;
  576. }
  577. }
  578. /* Null termination */
  579. *cur_dsd++ = 0;
  580. *cur_dsd++ = 0;
  581. *cur_dsd++ = 0;
  582. cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
  583. return 0;
  584. }
  585. /*
  586. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  587. * for Command Type 6.
  588. *
  589. * @dsds: number of data segment decriptors needed
  590. *
  591. * Returns the number of dsd list needed to store @dsds.
  592. */
  593. inline uint16_t
  594. qla24xx_calc_dsd_lists(uint16_t dsds)
  595. {
  596. uint16_t dsd_lists = 0;
  597. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  598. if (dsds % QLA_DSDS_PER_IOCB)
  599. dsd_lists++;
  600. return dsd_lists;
  601. }
  602. /**
  603. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  604. * IOCB types.
  605. *
  606. * @sp: SRB command to process
  607. * @cmd_pkt: Command type 3 IOCB
  608. * @tot_dsds: Total number of segments to transfer
  609. */
  610. inline void
  611. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  612. uint16_t tot_dsds)
  613. {
  614. uint16_t avail_dsds;
  615. uint32_t *cur_dsd;
  616. scsi_qla_host_t *vha;
  617. struct scsi_cmnd *cmd;
  618. struct scatterlist *sg;
  619. int i;
  620. struct req_que *req;
  621. cmd = GET_CMD_SP(sp);
  622. /* Update entry type to indicate Command Type 3 IOCB */
  623. *((uint32_t *)(&cmd_pkt->entry_type)) =
  624. __constant_cpu_to_le32(COMMAND_TYPE_7);
  625. /* No data transfer */
  626. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  627. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  628. return;
  629. }
  630. vha = sp->fcport->vha;
  631. req = vha->req;
  632. /* Set transfer direction */
  633. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  634. cmd_pkt->task_mgmt_flags =
  635. __constant_cpu_to_le16(TMF_WRITE_DATA);
  636. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  637. vha->qla_stats.output_requests++;
  638. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  639. cmd_pkt->task_mgmt_flags =
  640. __constant_cpu_to_le16(TMF_READ_DATA);
  641. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  642. vha->qla_stats.input_requests++;
  643. }
  644. /* One DSD is available in the Command Type 3 IOCB */
  645. avail_dsds = 1;
  646. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  647. /* Load data segments */
  648. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  649. dma_addr_t sle_dma;
  650. cont_a64_entry_t *cont_pkt;
  651. /* Allocate additional continuation packets? */
  652. if (avail_dsds == 0) {
  653. /*
  654. * Five DSDs are available in the Continuation
  655. * Type 1 IOCB.
  656. */
  657. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  658. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  659. avail_dsds = 5;
  660. }
  661. sle_dma = sg_dma_address(sg);
  662. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  663. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  664. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  665. avail_dsds--;
  666. }
  667. }
  668. struct fw_dif_context {
  669. uint32_t ref_tag;
  670. uint16_t app_tag;
  671. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  672. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  673. };
  674. /*
  675. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  676. *
  677. */
  678. static inline void
  679. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  680. unsigned int protcnt)
  681. {
  682. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  683. switch (scsi_get_prot_type(cmd)) {
  684. case SCSI_PROT_DIF_TYPE0:
  685. /*
  686. * No check for ql2xenablehba_err_chk, as it would be an
  687. * I/O error if hba tag generation is not done.
  688. */
  689. pkt->ref_tag = cpu_to_le32((uint32_t)
  690. (0xffffffff & scsi_get_lba(cmd)));
  691. if (!qla2x00_hba_err_chk_enabled(sp))
  692. break;
  693. pkt->ref_tag_mask[0] = 0xff;
  694. pkt->ref_tag_mask[1] = 0xff;
  695. pkt->ref_tag_mask[2] = 0xff;
  696. pkt->ref_tag_mask[3] = 0xff;
  697. break;
  698. /*
  699. * For TYPE 2 protection: 16 bit GUARD + 32 bit REF tag has to
  700. * match LBA in CDB + N
  701. */
  702. case SCSI_PROT_DIF_TYPE2:
  703. pkt->app_tag = __constant_cpu_to_le16(0);
  704. pkt->app_tag_mask[0] = 0x0;
  705. pkt->app_tag_mask[1] = 0x0;
  706. pkt->ref_tag = cpu_to_le32((uint32_t)
  707. (0xffffffff & scsi_get_lba(cmd)));
  708. if (!qla2x00_hba_err_chk_enabled(sp))
  709. break;
  710. /* enable ALL bytes of the ref tag */
  711. pkt->ref_tag_mask[0] = 0xff;
  712. pkt->ref_tag_mask[1] = 0xff;
  713. pkt->ref_tag_mask[2] = 0xff;
  714. pkt->ref_tag_mask[3] = 0xff;
  715. break;
  716. /* For Type 3 protection: 16 bit GUARD only */
  717. case SCSI_PROT_DIF_TYPE3:
  718. pkt->ref_tag_mask[0] = pkt->ref_tag_mask[1] =
  719. pkt->ref_tag_mask[2] = pkt->ref_tag_mask[3] =
  720. 0x00;
  721. break;
  722. /*
  723. * For TYpe 1 protection: 16 bit GUARD tag, 32 bit REF tag, and
  724. * 16 bit app tag.
  725. */
  726. case SCSI_PROT_DIF_TYPE1:
  727. pkt->ref_tag = cpu_to_le32((uint32_t)
  728. (0xffffffff & scsi_get_lba(cmd)));
  729. pkt->app_tag = __constant_cpu_to_le16(0);
  730. pkt->app_tag_mask[0] = 0x0;
  731. pkt->app_tag_mask[1] = 0x0;
  732. if (!qla2x00_hba_err_chk_enabled(sp))
  733. break;
  734. /* enable ALL bytes of the ref tag */
  735. pkt->ref_tag_mask[0] = 0xff;
  736. pkt->ref_tag_mask[1] = 0xff;
  737. pkt->ref_tag_mask[2] = 0xff;
  738. pkt->ref_tag_mask[3] = 0xff;
  739. break;
  740. }
  741. }
  742. struct qla2_sgx {
  743. dma_addr_t dma_addr; /* OUT */
  744. uint32_t dma_len; /* OUT */
  745. uint32_t tot_bytes; /* IN */
  746. struct scatterlist *cur_sg; /* IN */
  747. /* for book keeping, bzero on initial invocation */
  748. uint32_t bytes_consumed;
  749. uint32_t num_bytes;
  750. uint32_t tot_partial;
  751. /* for debugging */
  752. uint32_t num_sg;
  753. srb_t *sp;
  754. };
  755. static int
  756. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  757. uint32_t *partial)
  758. {
  759. struct scatterlist *sg;
  760. uint32_t cumulative_partial, sg_len;
  761. dma_addr_t sg_dma_addr;
  762. if (sgx->num_bytes == sgx->tot_bytes)
  763. return 0;
  764. sg = sgx->cur_sg;
  765. cumulative_partial = sgx->tot_partial;
  766. sg_dma_addr = sg_dma_address(sg);
  767. sg_len = sg_dma_len(sg);
  768. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  769. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  770. sgx->dma_len = (blk_sz - cumulative_partial);
  771. sgx->tot_partial = 0;
  772. sgx->num_bytes += blk_sz;
  773. *partial = 0;
  774. } else {
  775. sgx->dma_len = sg_len - sgx->bytes_consumed;
  776. sgx->tot_partial += sgx->dma_len;
  777. *partial = 1;
  778. }
  779. sgx->bytes_consumed += sgx->dma_len;
  780. if (sg_len == sgx->bytes_consumed) {
  781. sg = sg_next(sg);
  782. sgx->num_sg++;
  783. sgx->cur_sg = sg;
  784. sgx->bytes_consumed = 0;
  785. }
  786. return 1;
  787. }
  788. int
  789. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  790. uint32_t *dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  791. {
  792. void *next_dsd;
  793. uint8_t avail_dsds = 0;
  794. uint32_t dsd_list_len;
  795. struct dsd_dma *dsd_ptr;
  796. struct scatterlist *sg_prot;
  797. uint32_t *cur_dsd = dsd;
  798. uint16_t used_dsds = tot_dsds;
  799. uint32_t prot_int; /* protection interval */
  800. uint32_t partial;
  801. struct qla2_sgx sgx;
  802. dma_addr_t sle_dma;
  803. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  804. struct scsi_cmnd *cmd;
  805. struct scsi_qla_host *vha;
  806. memset(&sgx, 0, sizeof(struct qla2_sgx));
  807. if (sp) {
  808. vha = sp->fcport->vha;
  809. cmd = GET_CMD_SP(sp);
  810. prot_int = cmd->device->sector_size;
  811. sgx.tot_bytes = scsi_bufflen(cmd);
  812. sgx.cur_sg = scsi_sglist(cmd);
  813. sgx.sp = sp;
  814. sg_prot = scsi_prot_sglist(cmd);
  815. } else if (tc) {
  816. vha = tc->vha;
  817. prot_int = tc->blk_sz;
  818. sgx.tot_bytes = tc->bufflen;
  819. sgx.cur_sg = tc->sg;
  820. sg_prot = tc->prot_sg;
  821. } else {
  822. BUG();
  823. return 1;
  824. }
  825. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  826. sle_dma = sgx.dma_addr;
  827. sle_dma_len = sgx.dma_len;
  828. alloc_and_fill:
  829. /* Allocate additional continuation packets? */
  830. if (avail_dsds == 0) {
  831. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  832. QLA_DSDS_PER_IOCB : used_dsds;
  833. dsd_list_len = (avail_dsds + 1) * 12;
  834. used_dsds -= avail_dsds;
  835. /* allocate tracking DS */
  836. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  837. if (!dsd_ptr)
  838. return 1;
  839. /* allocate new list */
  840. dsd_ptr->dsd_addr = next_dsd =
  841. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  842. &dsd_ptr->dsd_list_dma);
  843. if (!next_dsd) {
  844. /*
  845. * Need to cleanup only this dsd_ptr, rest
  846. * will be done by sp_free_dma()
  847. */
  848. kfree(dsd_ptr);
  849. return 1;
  850. }
  851. if (sp) {
  852. list_add_tail(&dsd_ptr->list,
  853. &((struct crc_context *)
  854. sp->u.scmd.ctx)->dsd_list);
  855. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  856. } else {
  857. list_add_tail(&dsd_ptr->list,
  858. &(tc->ctx->dsd_list));
  859. tc->ctx_dsd_alloced = 1;
  860. }
  861. /* add new list to cmd iocb or last list */
  862. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  863. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  864. *cur_dsd++ = dsd_list_len;
  865. cur_dsd = (uint32_t *)next_dsd;
  866. }
  867. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  868. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  869. *cur_dsd++ = cpu_to_le32(sle_dma_len);
  870. avail_dsds--;
  871. if (partial == 0) {
  872. /* Got a full protection interval */
  873. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  874. sle_dma_len = 8;
  875. tot_prot_dma_len += sle_dma_len;
  876. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  877. tot_prot_dma_len = 0;
  878. sg_prot = sg_next(sg_prot);
  879. }
  880. partial = 1; /* So as to not re-enter this block */
  881. goto alloc_and_fill;
  882. }
  883. }
  884. /* Null termination */
  885. *cur_dsd++ = 0;
  886. *cur_dsd++ = 0;
  887. *cur_dsd++ = 0;
  888. return 0;
  889. }
  890. int
  891. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
  892. uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  893. {
  894. void *next_dsd;
  895. uint8_t avail_dsds = 0;
  896. uint32_t dsd_list_len;
  897. struct dsd_dma *dsd_ptr;
  898. struct scatterlist *sg, *sgl;
  899. uint32_t *cur_dsd = dsd;
  900. int i;
  901. uint16_t used_dsds = tot_dsds;
  902. struct scsi_cmnd *cmd;
  903. struct scsi_qla_host *vha;
  904. if (sp) {
  905. cmd = GET_CMD_SP(sp);
  906. sgl = scsi_sglist(cmd);
  907. vha = sp->fcport->vha;
  908. } else if (tc) {
  909. sgl = tc->sg;
  910. vha = tc->vha;
  911. } else {
  912. BUG();
  913. return 1;
  914. }
  915. for_each_sg(sgl, sg, tot_dsds, i) {
  916. dma_addr_t sle_dma;
  917. /* Allocate additional continuation packets? */
  918. if (avail_dsds == 0) {
  919. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  920. QLA_DSDS_PER_IOCB : used_dsds;
  921. dsd_list_len = (avail_dsds + 1) * 12;
  922. used_dsds -= avail_dsds;
  923. /* allocate tracking DS */
  924. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  925. if (!dsd_ptr)
  926. return 1;
  927. /* allocate new list */
  928. dsd_ptr->dsd_addr = next_dsd =
  929. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  930. &dsd_ptr->dsd_list_dma);
  931. if (!next_dsd) {
  932. /*
  933. * Need to cleanup only this dsd_ptr, rest
  934. * will be done by sp_free_dma()
  935. */
  936. kfree(dsd_ptr);
  937. return 1;
  938. }
  939. if (sp) {
  940. list_add_tail(&dsd_ptr->list,
  941. &((struct crc_context *)
  942. sp->u.scmd.ctx)->dsd_list);
  943. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  944. } else {
  945. list_add_tail(&dsd_ptr->list,
  946. &(tc->ctx->dsd_list));
  947. tc->ctx_dsd_alloced = 1;
  948. }
  949. /* add new list to cmd iocb or last list */
  950. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  951. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  952. *cur_dsd++ = dsd_list_len;
  953. cur_dsd = (uint32_t *)next_dsd;
  954. }
  955. sle_dma = sg_dma_address(sg);
  956. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  957. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  958. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  959. avail_dsds--;
  960. }
  961. /* Null termination */
  962. *cur_dsd++ = 0;
  963. *cur_dsd++ = 0;
  964. *cur_dsd++ = 0;
  965. return 0;
  966. }
  967. int
  968. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  969. uint32_t *dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  970. {
  971. void *next_dsd;
  972. uint8_t avail_dsds = 0;
  973. uint32_t dsd_list_len;
  974. struct dsd_dma *dsd_ptr;
  975. struct scatterlist *sg, *sgl;
  976. int i;
  977. struct scsi_cmnd *cmd;
  978. uint32_t *cur_dsd = dsd;
  979. uint16_t used_dsds = tot_dsds;
  980. struct scsi_qla_host *vha;
  981. if (sp) {
  982. cmd = GET_CMD_SP(sp);
  983. sgl = scsi_prot_sglist(cmd);
  984. vha = sp->fcport->vha;
  985. } else if (tc) {
  986. vha = tc->vha;
  987. sgl = tc->prot_sg;
  988. } else {
  989. BUG();
  990. return 1;
  991. }
  992. ql_dbg(ql_dbg_tgt, vha, 0xe021,
  993. "%s: enter\n", __func__);
  994. for_each_sg(sgl, sg, tot_dsds, i) {
  995. dma_addr_t sle_dma;
  996. /* Allocate additional continuation packets? */
  997. if (avail_dsds == 0) {
  998. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  999. QLA_DSDS_PER_IOCB : used_dsds;
  1000. dsd_list_len = (avail_dsds + 1) * 12;
  1001. used_dsds -= avail_dsds;
  1002. /* allocate tracking DS */
  1003. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  1004. if (!dsd_ptr)
  1005. return 1;
  1006. /* allocate new list */
  1007. dsd_ptr->dsd_addr = next_dsd =
  1008. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  1009. &dsd_ptr->dsd_list_dma);
  1010. if (!next_dsd) {
  1011. /*
  1012. * Need to cleanup only this dsd_ptr, rest
  1013. * will be done by sp_free_dma()
  1014. */
  1015. kfree(dsd_ptr);
  1016. return 1;
  1017. }
  1018. if (sp) {
  1019. list_add_tail(&dsd_ptr->list,
  1020. &((struct crc_context *)
  1021. sp->u.scmd.ctx)->dsd_list);
  1022. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  1023. } else {
  1024. list_add_tail(&dsd_ptr->list,
  1025. &(tc->ctx->dsd_list));
  1026. tc->ctx_dsd_alloced = 1;
  1027. }
  1028. /* add new list to cmd iocb or last list */
  1029. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  1030. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  1031. *cur_dsd++ = dsd_list_len;
  1032. cur_dsd = (uint32_t *)next_dsd;
  1033. }
  1034. sle_dma = sg_dma_address(sg);
  1035. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1036. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1037. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1038. avail_dsds--;
  1039. }
  1040. /* Null termination */
  1041. *cur_dsd++ = 0;
  1042. *cur_dsd++ = 0;
  1043. *cur_dsd++ = 0;
  1044. return 0;
  1045. }
  1046. /**
  1047. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1048. * Type 6 IOCB types.
  1049. *
  1050. * @sp: SRB command to process
  1051. * @cmd_pkt: Command type 3 IOCB
  1052. * @tot_dsds: Total number of segments to transfer
  1053. */
  1054. static inline int
  1055. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1056. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1057. {
  1058. uint32_t *cur_dsd, *fcp_dl;
  1059. scsi_qla_host_t *vha;
  1060. struct scsi_cmnd *cmd;
  1061. int sgc;
  1062. uint32_t total_bytes = 0;
  1063. uint32_t data_bytes;
  1064. uint32_t dif_bytes;
  1065. uint8_t bundling = 1;
  1066. uint16_t blk_size;
  1067. uint8_t *clr_ptr;
  1068. struct crc_context *crc_ctx_pkt = NULL;
  1069. struct qla_hw_data *ha;
  1070. uint8_t additional_fcpcdb_len;
  1071. uint16_t fcp_cmnd_len;
  1072. struct fcp_cmnd *fcp_cmnd;
  1073. dma_addr_t crc_ctx_dma;
  1074. cmd = GET_CMD_SP(sp);
  1075. sgc = 0;
  1076. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1077. *((uint32_t *)(&cmd_pkt->entry_type)) =
  1078. __constant_cpu_to_le32(COMMAND_TYPE_CRC_2);
  1079. vha = sp->fcport->vha;
  1080. ha = vha->hw;
  1081. /* No data transfer */
  1082. data_bytes = scsi_bufflen(cmd);
  1083. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1084. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1085. return QLA_SUCCESS;
  1086. }
  1087. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1088. /* Set transfer direction */
  1089. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1090. cmd_pkt->control_flags =
  1091. __constant_cpu_to_le16(CF_WRITE_DATA);
  1092. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1093. cmd_pkt->control_flags =
  1094. __constant_cpu_to_le16(CF_READ_DATA);
  1095. }
  1096. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1097. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1098. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1099. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1100. bundling = 0;
  1101. /* Allocate CRC context from global pool */
  1102. crc_ctx_pkt = sp->u.scmd.ctx =
  1103. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1104. if (!crc_ctx_pkt)
  1105. goto crc_queuing_error;
  1106. /* Zero out CTX area. */
  1107. clr_ptr = (uint8_t *)crc_ctx_pkt;
  1108. memset(clr_ptr, 0, sizeof(*crc_ctx_pkt));
  1109. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1110. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1111. /* Set handle */
  1112. crc_ctx_pkt->handle = cmd_pkt->handle;
  1113. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1114. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1115. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1116. cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
  1117. cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
  1118. cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
  1119. /* Determine SCSI command length -- align to 4 byte boundary */
  1120. if (cmd->cmd_len > 16) {
  1121. additional_fcpcdb_len = cmd->cmd_len - 16;
  1122. if ((cmd->cmd_len % 4) != 0) {
  1123. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1124. goto crc_queuing_error;
  1125. }
  1126. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1127. } else {
  1128. additional_fcpcdb_len = 0;
  1129. fcp_cmnd_len = 12 + 16 + 4;
  1130. }
  1131. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1132. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1133. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1134. fcp_cmnd->additional_cdb_len |= 1;
  1135. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1136. fcp_cmnd->additional_cdb_len |= 2;
  1137. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1138. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1139. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1140. cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
  1141. LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1142. cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
  1143. MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1144. fcp_cmnd->task_management = 0;
  1145. fcp_cmnd->task_attribute = TSK_SIMPLE;
  1146. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1147. /* Compute dif len and adjust data len to incude protection */
  1148. dif_bytes = 0;
  1149. blk_size = cmd->device->sector_size;
  1150. dif_bytes = (data_bytes / blk_size) * 8;
  1151. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1152. case SCSI_PROT_READ_INSERT:
  1153. case SCSI_PROT_WRITE_STRIP:
  1154. total_bytes = data_bytes;
  1155. data_bytes += dif_bytes;
  1156. break;
  1157. case SCSI_PROT_READ_STRIP:
  1158. case SCSI_PROT_WRITE_INSERT:
  1159. case SCSI_PROT_READ_PASS:
  1160. case SCSI_PROT_WRITE_PASS:
  1161. total_bytes = data_bytes + dif_bytes;
  1162. break;
  1163. default:
  1164. BUG();
  1165. }
  1166. if (!qla2x00_hba_err_chk_enabled(sp))
  1167. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1168. /* HBA error checking enabled */
  1169. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1170. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1171. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1172. SCSI_PROT_DIF_TYPE2))
  1173. fw_prot_opts |= BIT_10;
  1174. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1175. SCSI_PROT_DIF_TYPE3)
  1176. fw_prot_opts |= BIT_11;
  1177. }
  1178. if (!bundling) {
  1179. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
  1180. } else {
  1181. /*
  1182. * Configure Bundling if we need to fetch interlaving
  1183. * protection PCI accesses
  1184. */
  1185. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1186. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1187. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1188. tot_prot_dsds);
  1189. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
  1190. }
  1191. /* Finish the common fields of CRC pkt */
  1192. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1193. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1194. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1195. crc_ctx_pkt->guard_seed = __constant_cpu_to_le16(0);
  1196. /* Fibre channel byte count */
  1197. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1198. fcp_dl = (uint32_t *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1199. additional_fcpcdb_len);
  1200. *fcp_dl = htonl(total_bytes);
  1201. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1202. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1203. return QLA_SUCCESS;
  1204. }
  1205. /* Walks data segments */
  1206. cmd_pkt->control_flags |=
  1207. __constant_cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1208. if (!bundling && tot_prot_dsds) {
  1209. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1210. cur_dsd, tot_dsds, NULL))
  1211. goto crc_queuing_error;
  1212. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1213. (tot_dsds - tot_prot_dsds), NULL))
  1214. goto crc_queuing_error;
  1215. if (bundling && tot_prot_dsds) {
  1216. /* Walks dif segments */
  1217. cmd_pkt->control_flags |=
  1218. __constant_cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1219. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
  1220. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1221. tot_prot_dsds, NULL))
  1222. goto crc_queuing_error;
  1223. }
  1224. return QLA_SUCCESS;
  1225. crc_queuing_error:
  1226. /* Cleanup will be performed by the caller */
  1227. return QLA_FUNCTION_FAILED;
  1228. }
  1229. /**
  1230. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1231. * @sp: command to send to the ISP
  1232. *
  1233. * Returns non-zero if a failure occurred, else zero.
  1234. */
  1235. int
  1236. qla24xx_start_scsi(srb_t *sp)
  1237. {
  1238. int ret, nseg;
  1239. unsigned long flags;
  1240. uint32_t *clr_ptr;
  1241. uint32_t index;
  1242. uint32_t handle;
  1243. struct cmd_type_7 *cmd_pkt;
  1244. uint16_t cnt;
  1245. uint16_t req_cnt;
  1246. uint16_t tot_dsds;
  1247. struct req_que *req = NULL;
  1248. struct rsp_que *rsp = NULL;
  1249. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1250. struct scsi_qla_host *vha = sp->fcport->vha;
  1251. struct qla_hw_data *ha = vha->hw;
  1252. /* Setup device pointers. */
  1253. ret = 0;
  1254. qla25xx_set_que(sp, &rsp);
  1255. req = vha->req;
  1256. /* So we know we haven't pci_map'ed anything yet */
  1257. tot_dsds = 0;
  1258. /* Send marker if required */
  1259. if (vha->marker_needed != 0) {
  1260. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1261. QLA_SUCCESS)
  1262. return QLA_FUNCTION_FAILED;
  1263. vha->marker_needed = 0;
  1264. }
  1265. /* Acquire ring specific lock */
  1266. spin_lock_irqsave(&ha->hardware_lock, flags);
  1267. /* Check for room in outstanding command list. */
  1268. handle = req->current_outstanding_cmd;
  1269. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1270. handle++;
  1271. if (handle == req->num_outstanding_cmds)
  1272. handle = 1;
  1273. if (!req->outstanding_cmds[handle])
  1274. break;
  1275. }
  1276. if (index == req->num_outstanding_cmds)
  1277. goto queuing_error;
  1278. /* Map the sg table so we have an accurate count of sg entries needed */
  1279. if (scsi_sg_count(cmd)) {
  1280. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1281. scsi_sg_count(cmd), cmd->sc_data_direction);
  1282. if (unlikely(!nseg))
  1283. goto queuing_error;
  1284. } else
  1285. nseg = 0;
  1286. tot_dsds = nseg;
  1287. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1288. if (req->cnt < (req_cnt + 2)) {
  1289. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1290. RD_REG_DWORD_RELAXED(req->req_q_out);
  1291. if (req->ring_index < cnt)
  1292. req->cnt = cnt - req->ring_index;
  1293. else
  1294. req->cnt = req->length -
  1295. (req->ring_index - cnt);
  1296. if (req->cnt < (req_cnt + 2))
  1297. goto queuing_error;
  1298. }
  1299. /* Build command packet. */
  1300. req->current_outstanding_cmd = handle;
  1301. req->outstanding_cmds[handle] = sp;
  1302. sp->handle = handle;
  1303. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1304. req->cnt -= req_cnt;
  1305. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1306. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1307. /* Zero out remaining portion of packet. */
  1308. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1309. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1310. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1311. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1312. /* Set NPORT-ID and LUN number*/
  1313. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1314. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1315. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1316. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1317. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1318. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1319. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1320. cmd_pkt->task = TSK_SIMPLE;
  1321. /* Load SCSI command packet. */
  1322. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1323. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1324. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1325. /* Build IOCB segments */
  1326. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  1327. /* Set total data segment count. */
  1328. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1329. /* Specify response queue number where completion should happen */
  1330. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1331. wmb();
  1332. /* Adjust ring index. */
  1333. req->ring_index++;
  1334. if (req->ring_index == req->length) {
  1335. req->ring_index = 0;
  1336. req->ring_ptr = req->ring;
  1337. } else
  1338. req->ring_ptr++;
  1339. sp->flags |= SRB_DMA_VALID;
  1340. /* Set chip new ring index. */
  1341. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1342. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1343. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1344. if (vha->flags.process_response_queue &&
  1345. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1346. qla24xx_process_response_queue(vha, rsp);
  1347. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1348. return QLA_SUCCESS;
  1349. queuing_error:
  1350. if (tot_dsds)
  1351. scsi_dma_unmap(cmd);
  1352. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1353. return QLA_FUNCTION_FAILED;
  1354. }
  1355. /**
  1356. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1357. * @sp: command to send to the ISP
  1358. *
  1359. * Returns non-zero if a failure occurred, else zero.
  1360. */
  1361. int
  1362. qla24xx_dif_start_scsi(srb_t *sp)
  1363. {
  1364. int nseg;
  1365. unsigned long flags;
  1366. uint32_t *clr_ptr;
  1367. uint32_t index;
  1368. uint32_t handle;
  1369. uint16_t cnt;
  1370. uint16_t req_cnt = 0;
  1371. uint16_t tot_dsds;
  1372. uint16_t tot_prot_dsds;
  1373. uint16_t fw_prot_opts = 0;
  1374. struct req_que *req = NULL;
  1375. struct rsp_que *rsp = NULL;
  1376. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1377. struct scsi_qla_host *vha = sp->fcport->vha;
  1378. struct qla_hw_data *ha = vha->hw;
  1379. struct cmd_type_crc_2 *cmd_pkt;
  1380. uint32_t status = 0;
  1381. #define QDSS_GOT_Q_SPACE BIT_0
  1382. /* Only process protection or >16 cdb in this routine */
  1383. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1384. if (cmd->cmd_len <= 16)
  1385. return qla24xx_start_scsi(sp);
  1386. }
  1387. /* Setup device pointers. */
  1388. qla25xx_set_que(sp, &rsp);
  1389. req = vha->req;
  1390. /* So we know we haven't pci_map'ed anything yet */
  1391. tot_dsds = 0;
  1392. /* Send marker if required */
  1393. if (vha->marker_needed != 0) {
  1394. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1395. QLA_SUCCESS)
  1396. return QLA_FUNCTION_FAILED;
  1397. vha->marker_needed = 0;
  1398. }
  1399. /* Acquire ring specific lock */
  1400. spin_lock_irqsave(&ha->hardware_lock, flags);
  1401. /* Check for room in outstanding command list. */
  1402. handle = req->current_outstanding_cmd;
  1403. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1404. handle++;
  1405. if (handle == req->num_outstanding_cmds)
  1406. handle = 1;
  1407. if (!req->outstanding_cmds[handle])
  1408. break;
  1409. }
  1410. if (index == req->num_outstanding_cmds)
  1411. goto queuing_error;
  1412. /* Compute number of required data segments */
  1413. /* Map the sg table so we have an accurate count of sg entries needed */
  1414. if (scsi_sg_count(cmd)) {
  1415. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1416. scsi_sg_count(cmd), cmd->sc_data_direction);
  1417. if (unlikely(!nseg))
  1418. goto queuing_error;
  1419. else
  1420. sp->flags |= SRB_DMA_VALID;
  1421. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1422. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1423. struct qla2_sgx sgx;
  1424. uint32_t partial;
  1425. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1426. sgx.tot_bytes = scsi_bufflen(cmd);
  1427. sgx.cur_sg = scsi_sglist(cmd);
  1428. sgx.sp = sp;
  1429. nseg = 0;
  1430. while (qla24xx_get_one_block_sg(
  1431. cmd->device->sector_size, &sgx, &partial))
  1432. nseg++;
  1433. }
  1434. } else
  1435. nseg = 0;
  1436. /* number of required data segments */
  1437. tot_dsds = nseg;
  1438. /* Compute number of required protection segments */
  1439. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1440. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1441. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1442. if (unlikely(!nseg))
  1443. goto queuing_error;
  1444. else
  1445. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1446. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1447. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1448. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1449. }
  1450. } else {
  1451. nseg = 0;
  1452. }
  1453. req_cnt = 1;
  1454. /* Total Data and protection sg segment(s) */
  1455. tot_prot_dsds = nseg;
  1456. tot_dsds += nseg;
  1457. if (req->cnt < (req_cnt + 2)) {
  1458. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1459. RD_REG_DWORD_RELAXED(req->req_q_out);
  1460. if (req->ring_index < cnt)
  1461. req->cnt = cnt - req->ring_index;
  1462. else
  1463. req->cnt = req->length -
  1464. (req->ring_index - cnt);
  1465. if (req->cnt < (req_cnt + 2))
  1466. goto queuing_error;
  1467. }
  1468. status |= QDSS_GOT_Q_SPACE;
  1469. /* Build header part of command packet (excluding the OPCODE). */
  1470. req->current_outstanding_cmd = handle;
  1471. req->outstanding_cmds[handle] = sp;
  1472. sp->handle = handle;
  1473. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1474. req->cnt -= req_cnt;
  1475. /* Fill-in common area */
  1476. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1477. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1478. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1479. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1480. /* Set NPORT-ID and LUN number*/
  1481. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1482. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1483. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1484. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1485. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1486. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1487. /* Total Data and protection segment(s) */
  1488. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1489. /* Build IOCB segments and adjust for data protection segments */
  1490. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1491. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1492. QLA_SUCCESS)
  1493. goto queuing_error;
  1494. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1495. /* Specify response queue number where completion should happen */
  1496. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1497. cmd_pkt->timeout = __constant_cpu_to_le16(0);
  1498. wmb();
  1499. /* Adjust ring index. */
  1500. req->ring_index++;
  1501. if (req->ring_index == req->length) {
  1502. req->ring_index = 0;
  1503. req->ring_ptr = req->ring;
  1504. } else
  1505. req->ring_ptr++;
  1506. /* Set chip new ring index. */
  1507. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1508. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1509. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1510. if (vha->flags.process_response_queue &&
  1511. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1512. qla24xx_process_response_queue(vha, rsp);
  1513. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1514. return QLA_SUCCESS;
  1515. queuing_error:
  1516. if (status & QDSS_GOT_Q_SPACE) {
  1517. req->outstanding_cmds[handle] = NULL;
  1518. req->cnt += req_cnt;
  1519. }
  1520. /* Cleanup will be performed by the caller (queuecommand) */
  1521. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1522. return QLA_FUNCTION_FAILED;
  1523. }
  1524. static void qla25xx_set_que(srb_t *sp, struct rsp_que **rsp)
  1525. {
  1526. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1527. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1528. int affinity = cmd->request->cpu;
  1529. if (ha->flags.cpu_affinity_enabled && affinity >= 0 &&
  1530. affinity < ha->max_rsp_queues - 1)
  1531. *rsp = ha->rsp_q_map[affinity + 1];
  1532. else
  1533. *rsp = ha->rsp_q_map[0];
  1534. }
  1535. /* Generic Control-SRB manipulation functions. */
  1536. /* hardware_lock assumed to be held. */
  1537. void *
  1538. qla2x00_alloc_iocbs_ready(scsi_qla_host_t *vha, srb_t *sp)
  1539. {
  1540. if (qla2x00_reset_active(vha))
  1541. return NULL;
  1542. return qla2x00_alloc_iocbs(vha, sp);
  1543. }
  1544. void *
  1545. qla2x00_alloc_iocbs(scsi_qla_host_t *vha, srb_t *sp)
  1546. {
  1547. struct qla_hw_data *ha = vha->hw;
  1548. struct req_que *req = ha->req_q_map[0];
  1549. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  1550. uint32_t index, handle;
  1551. request_t *pkt;
  1552. uint16_t cnt, req_cnt;
  1553. pkt = NULL;
  1554. req_cnt = 1;
  1555. handle = 0;
  1556. if (!sp)
  1557. goto skip_cmd_array;
  1558. /* Check for room in outstanding command list. */
  1559. handle = req->current_outstanding_cmd;
  1560. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1561. handle++;
  1562. if (handle == req->num_outstanding_cmds)
  1563. handle = 1;
  1564. if (!req->outstanding_cmds[handle])
  1565. break;
  1566. }
  1567. if (index == req->num_outstanding_cmds) {
  1568. ql_log(ql_log_warn, vha, 0x700b,
  1569. "No room on outstanding cmd array.\n");
  1570. goto queuing_error;
  1571. }
  1572. /* Prep command array. */
  1573. req->current_outstanding_cmd = handle;
  1574. req->outstanding_cmds[handle] = sp;
  1575. sp->handle = handle;
  1576. /* Adjust entry-counts as needed. */
  1577. if (sp->type != SRB_SCSI_CMD)
  1578. req_cnt = sp->iocbs;
  1579. skip_cmd_array:
  1580. /* Check for room on request queue. */
  1581. if (req->cnt < req_cnt + 2) {
  1582. if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha))
  1583. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  1584. else if (IS_P3P_TYPE(ha))
  1585. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  1586. else if (IS_FWI2_CAPABLE(ha))
  1587. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  1588. else if (IS_QLAFX00(ha))
  1589. cnt = RD_REG_DWORD(&reg->ispfx00.req_q_out);
  1590. else
  1591. cnt = qla2x00_debounce_register(
  1592. ISP_REQ_Q_OUT(ha, &reg->isp));
  1593. if (req->ring_index < cnt)
  1594. req->cnt = cnt - req->ring_index;
  1595. else
  1596. req->cnt = req->length -
  1597. (req->ring_index - cnt);
  1598. }
  1599. if (req->cnt < req_cnt + 2)
  1600. goto queuing_error;
  1601. /* Prep packet */
  1602. req->cnt -= req_cnt;
  1603. pkt = req->ring_ptr;
  1604. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1605. if (IS_QLAFX00(ha)) {
  1606. WRT_REG_BYTE((void __iomem *)&pkt->entry_count, req_cnt);
  1607. WRT_REG_WORD((void __iomem *)&pkt->handle, handle);
  1608. } else {
  1609. pkt->entry_count = req_cnt;
  1610. pkt->handle = handle;
  1611. }
  1612. queuing_error:
  1613. return pkt;
  1614. }
  1615. static void
  1616. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1617. {
  1618. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1619. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1620. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  1621. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  1622. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  1623. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  1624. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  1625. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1626. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1627. logio->port_id[1] = sp->fcport->d_id.b.area;
  1628. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1629. logio->vp_index = sp->fcport->vha->vp_idx;
  1630. }
  1631. static void
  1632. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  1633. {
  1634. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1635. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1636. uint16_t opts;
  1637. mbx->entry_type = MBX_IOCB_TYPE;
  1638. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1639. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  1640. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  1641. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  1642. if (HAS_EXTENDED_IDS(ha)) {
  1643. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1644. mbx->mb10 = cpu_to_le16(opts);
  1645. } else {
  1646. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  1647. }
  1648. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1649. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1650. sp->fcport->d_id.b.al_pa);
  1651. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1652. }
  1653. static void
  1654. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1655. {
  1656. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1657. logio->control_flags =
  1658. cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1659. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1660. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1661. logio->port_id[1] = sp->fcport->d_id.b.area;
  1662. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1663. logio->vp_index = sp->fcport->vha->vp_idx;
  1664. }
  1665. static void
  1666. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  1667. {
  1668. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1669. mbx->entry_type = MBX_IOCB_TYPE;
  1670. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1671. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  1672. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  1673. cpu_to_le16(sp->fcport->loop_id):
  1674. cpu_to_le16(sp->fcport->loop_id << 8);
  1675. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1676. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1677. sp->fcport->d_id.b.al_pa);
  1678. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1679. /* Implicit: mbx->mbx10 = 0. */
  1680. }
  1681. static void
  1682. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1683. {
  1684. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1685. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  1686. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1687. logio->vp_index = sp->fcport->vha->vp_idx;
  1688. }
  1689. static void
  1690. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  1691. {
  1692. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1693. mbx->entry_type = MBX_IOCB_TYPE;
  1694. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1695. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  1696. if (HAS_EXTENDED_IDS(ha)) {
  1697. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1698. mbx->mb10 = cpu_to_le16(BIT_0);
  1699. } else {
  1700. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  1701. }
  1702. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  1703. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  1704. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  1705. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  1706. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1707. }
  1708. static void
  1709. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  1710. {
  1711. uint32_t flags;
  1712. uint64_t lun;
  1713. struct fc_port *fcport = sp->fcport;
  1714. scsi_qla_host_t *vha = fcport->vha;
  1715. struct qla_hw_data *ha = vha->hw;
  1716. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  1717. struct req_que *req = vha->req;
  1718. flags = iocb->u.tmf.flags;
  1719. lun = iocb->u.tmf.lun;
  1720. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  1721. tsk->entry_count = 1;
  1722. tsk->handle = MAKE_HANDLE(req->id, tsk->handle);
  1723. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  1724. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  1725. tsk->control_flags = cpu_to_le32(flags);
  1726. tsk->port_id[0] = fcport->d_id.b.al_pa;
  1727. tsk->port_id[1] = fcport->d_id.b.area;
  1728. tsk->port_id[2] = fcport->d_id.b.domain;
  1729. tsk->vp_index = fcport->vha->vp_idx;
  1730. if (flags == TCF_LUN_RESET) {
  1731. int_to_scsilun(lun, &tsk->lun);
  1732. host_to_fcp_swap((uint8_t *)&tsk->lun,
  1733. sizeof(tsk->lun));
  1734. }
  1735. }
  1736. static void
  1737. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  1738. {
  1739. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1740. els_iocb->entry_type = ELS_IOCB_TYPE;
  1741. els_iocb->entry_count = 1;
  1742. els_iocb->sys_define = 0;
  1743. els_iocb->entry_status = 0;
  1744. els_iocb->handle = sp->handle;
  1745. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1746. els_iocb->tx_dsd_count = __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1747. els_iocb->vp_index = sp->fcport->vha->vp_idx;
  1748. els_iocb->sof_type = EST_SOFI3;
  1749. els_iocb->rx_dsd_count = __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1750. els_iocb->opcode =
  1751. sp->type == SRB_ELS_CMD_RPT ?
  1752. bsg_job->request->rqst_data.r_els.els_code :
  1753. bsg_job->request->rqst_data.h_els.command_code;
  1754. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  1755. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  1756. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  1757. els_iocb->control_flags = 0;
  1758. els_iocb->rx_byte_count =
  1759. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1760. els_iocb->tx_byte_count =
  1761. cpu_to_le32(bsg_job->request_payload.payload_len);
  1762. els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1763. (bsg_job->request_payload.sg_list)));
  1764. els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1765. (bsg_job->request_payload.sg_list)));
  1766. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  1767. (bsg_job->request_payload.sg_list));
  1768. els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1769. (bsg_job->reply_payload.sg_list)));
  1770. els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1771. (bsg_job->reply_payload.sg_list)));
  1772. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  1773. (bsg_job->reply_payload.sg_list));
  1774. sp->fcport->vha->qla_stats.control_requests++;
  1775. }
  1776. static void
  1777. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  1778. {
  1779. uint16_t avail_dsds;
  1780. uint32_t *cur_dsd;
  1781. struct scatterlist *sg;
  1782. int index;
  1783. uint16_t tot_dsds;
  1784. scsi_qla_host_t *vha = sp->fcport->vha;
  1785. struct qla_hw_data *ha = vha->hw;
  1786. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1787. int loop_iterartion = 0;
  1788. int cont_iocb_prsnt = 0;
  1789. int entry_count = 1;
  1790. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  1791. ct_iocb->entry_type = CT_IOCB_TYPE;
  1792. ct_iocb->entry_status = 0;
  1793. ct_iocb->handle1 = sp->handle;
  1794. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  1795. ct_iocb->status = __constant_cpu_to_le16(0);
  1796. ct_iocb->control_flags = __constant_cpu_to_le16(0);
  1797. ct_iocb->timeout = 0;
  1798. ct_iocb->cmd_dsd_count =
  1799. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1800. ct_iocb->total_dsd_count =
  1801. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  1802. ct_iocb->req_bytecount =
  1803. cpu_to_le32(bsg_job->request_payload.payload_len);
  1804. ct_iocb->rsp_bytecount =
  1805. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1806. ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
  1807. (bsg_job->request_payload.sg_list)));
  1808. ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
  1809. (bsg_job->request_payload.sg_list)));
  1810. ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
  1811. ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
  1812. (bsg_job->reply_payload.sg_list)));
  1813. ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
  1814. (bsg_job->reply_payload.sg_list)));
  1815. ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
  1816. avail_dsds = 1;
  1817. cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
  1818. index = 0;
  1819. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1820. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1821. dma_addr_t sle_dma;
  1822. cont_a64_entry_t *cont_pkt;
  1823. /* Allocate additional continuation packets? */
  1824. if (avail_dsds == 0) {
  1825. /*
  1826. * Five DSDs are available in the Cont.
  1827. * Type 1 IOCB.
  1828. */
  1829. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1830. vha->hw->req_q_map[0]);
  1831. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1832. avail_dsds = 5;
  1833. cont_iocb_prsnt = 1;
  1834. entry_count++;
  1835. }
  1836. sle_dma = sg_dma_address(sg);
  1837. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1838. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1839. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1840. loop_iterartion++;
  1841. avail_dsds--;
  1842. }
  1843. ct_iocb->entry_count = entry_count;
  1844. sp->fcport->vha->qla_stats.control_requests++;
  1845. }
  1846. static void
  1847. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  1848. {
  1849. uint16_t avail_dsds;
  1850. uint32_t *cur_dsd;
  1851. struct scatterlist *sg;
  1852. int index;
  1853. uint16_t tot_dsds;
  1854. scsi_qla_host_t *vha = sp->fcport->vha;
  1855. struct qla_hw_data *ha = vha->hw;
  1856. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1857. int loop_iterartion = 0;
  1858. int cont_iocb_prsnt = 0;
  1859. int entry_count = 1;
  1860. ct_iocb->entry_type = CT_IOCB_TYPE;
  1861. ct_iocb->entry_status = 0;
  1862. ct_iocb->sys_define = 0;
  1863. ct_iocb->handle = sp->handle;
  1864. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1865. ct_iocb->vp_index = sp->fcport->vha->vp_idx;
  1866. ct_iocb->comp_status = __constant_cpu_to_le16(0);
  1867. ct_iocb->cmd_dsd_count =
  1868. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1869. ct_iocb->timeout = 0;
  1870. ct_iocb->rsp_dsd_count =
  1871. __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1872. ct_iocb->rsp_byte_count =
  1873. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1874. ct_iocb->cmd_byte_count =
  1875. cpu_to_le32(bsg_job->request_payload.payload_len);
  1876. ct_iocb->dseg_0_address[0] = cpu_to_le32(LSD(sg_dma_address
  1877. (bsg_job->request_payload.sg_list)));
  1878. ct_iocb->dseg_0_address[1] = cpu_to_le32(MSD(sg_dma_address
  1879. (bsg_job->request_payload.sg_list)));
  1880. ct_iocb->dseg_0_len = cpu_to_le32(sg_dma_len
  1881. (bsg_job->request_payload.sg_list));
  1882. avail_dsds = 1;
  1883. cur_dsd = (uint32_t *)ct_iocb->dseg_1_address;
  1884. index = 0;
  1885. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1886. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1887. dma_addr_t sle_dma;
  1888. cont_a64_entry_t *cont_pkt;
  1889. /* Allocate additional continuation packets? */
  1890. if (avail_dsds == 0) {
  1891. /*
  1892. * Five DSDs are available in the Cont.
  1893. * Type 1 IOCB.
  1894. */
  1895. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1896. ha->req_q_map[0]);
  1897. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1898. avail_dsds = 5;
  1899. cont_iocb_prsnt = 1;
  1900. entry_count++;
  1901. }
  1902. sle_dma = sg_dma_address(sg);
  1903. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1904. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1905. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1906. loop_iterartion++;
  1907. avail_dsds--;
  1908. }
  1909. ct_iocb->entry_count = entry_count;
  1910. }
  1911. /*
  1912. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  1913. * @sp: command to send to the ISP
  1914. *
  1915. * Returns non-zero if a failure occurred, else zero.
  1916. */
  1917. int
  1918. qla82xx_start_scsi(srb_t *sp)
  1919. {
  1920. int ret, nseg;
  1921. unsigned long flags;
  1922. struct scsi_cmnd *cmd;
  1923. uint32_t *clr_ptr;
  1924. uint32_t index;
  1925. uint32_t handle;
  1926. uint16_t cnt;
  1927. uint16_t req_cnt;
  1928. uint16_t tot_dsds;
  1929. struct device_reg_82xx __iomem *reg;
  1930. uint32_t dbval;
  1931. uint32_t *fcp_dl;
  1932. uint8_t additional_cdb_len;
  1933. struct ct6_dsd *ctx;
  1934. struct scsi_qla_host *vha = sp->fcport->vha;
  1935. struct qla_hw_data *ha = vha->hw;
  1936. struct req_que *req = NULL;
  1937. struct rsp_que *rsp = NULL;
  1938. /* Setup device pointers. */
  1939. ret = 0;
  1940. reg = &ha->iobase->isp82;
  1941. cmd = GET_CMD_SP(sp);
  1942. req = vha->req;
  1943. rsp = ha->rsp_q_map[0];
  1944. /* So we know we haven't pci_map'ed anything yet */
  1945. tot_dsds = 0;
  1946. dbval = 0x04 | (ha->portnum << 5);
  1947. /* Send marker if required */
  1948. if (vha->marker_needed != 0) {
  1949. if (qla2x00_marker(vha, req,
  1950. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  1951. ql_log(ql_log_warn, vha, 0x300c,
  1952. "qla2x00_marker failed for cmd=%p.\n", cmd);
  1953. return QLA_FUNCTION_FAILED;
  1954. }
  1955. vha->marker_needed = 0;
  1956. }
  1957. /* Acquire ring specific lock */
  1958. spin_lock_irqsave(&ha->hardware_lock, flags);
  1959. /* Check for room in outstanding command list. */
  1960. handle = req->current_outstanding_cmd;
  1961. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1962. handle++;
  1963. if (handle == req->num_outstanding_cmds)
  1964. handle = 1;
  1965. if (!req->outstanding_cmds[handle])
  1966. break;
  1967. }
  1968. if (index == req->num_outstanding_cmds)
  1969. goto queuing_error;
  1970. /* Map the sg table so we have an accurate count of sg entries needed */
  1971. if (scsi_sg_count(cmd)) {
  1972. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1973. scsi_sg_count(cmd), cmd->sc_data_direction);
  1974. if (unlikely(!nseg))
  1975. goto queuing_error;
  1976. } else
  1977. nseg = 0;
  1978. tot_dsds = nseg;
  1979. if (tot_dsds > ql2xshiftctondsd) {
  1980. struct cmd_type_6 *cmd_pkt;
  1981. uint16_t more_dsd_lists = 0;
  1982. struct dsd_dma *dsd_ptr;
  1983. uint16_t i;
  1984. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  1985. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  1986. ql_dbg(ql_dbg_io, vha, 0x300d,
  1987. "Num of DSD list %d is than %d for cmd=%p.\n",
  1988. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  1989. cmd);
  1990. goto queuing_error;
  1991. }
  1992. if (more_dsd_lists <= ha->gbl_dsd_avail)
  1993. goto sufficient_dsds;
  1994. else
  1995. more_dsd_lists -= ha->gbl_dsd_avail;
  1996. for (i = 0; i < more_dsd_lists; i++) {
  1997. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  1998. if (!dsd_ptr) {
  1999. ql_log(ql_log_fatal, vha, 0x300e,
  2000. "Failed to allocate memory for dsd_dma "
  2001. "for cmd=%p.\n", cmd);
  2002. goto queuing_error;
  2003. }
  2004. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  2005. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  2006. if (!dsd_ptr->dsd_addr) {
  2007. kfree(dsd_ptr);
  2008. ql_log(ql_log_fatal, vha, 0x300f,
  2009. "Failed to allocate memory for dsd_addr "
  2010. "for cmd=%p.\n", cmd);
  2011. goto queuing_error;
  2012. }
  2013. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  2014. ha->gbl_dsd_avail++;
  2015. }
  2016. sufficient_dsds:
  2017. req_cnt = 1;
  2018. if (req->cnt < (req_cnt + 2)) {
  2019. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2020. &reg->req_q_out[0]);
  2021. if (req->ring_index < cnt)
  2022. req->cnt = cnt - req->ring_index;
  2023. else
  2024. req->cnt = req->length -
  2025. (req->ring_index - cnt);
  2026. if (req->cnt < (req_cnt + 2))
  2027. goto queuing_error;
  2028. }
  2029. ctx = sp->u.scmd.ctx =
  2030. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2031. if (!ctx) {
  2032. ql_log(ql_log_fatal, vha, 0x3010,
  2033. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2034. goto queuing_error;
  2035. }
  2036. memset(ctx, 0, sizeof(struct ct6_dsd));
  2037. ctx->fcp_cmnd = dma_pool_alloc(ha->fcp_cmnd_dma_pool,
  2038. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2039. if (!ctx->fcp_cmnd) {
  2040. ql_log(ql_log_fatal, vha, 0x3011,
  2041. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2042. goto queuing_error;
  2043. }
  2044. /* Initialize the DSD list and dma handle */
  2045. INIT_LIST_HEAD(&ctx->dsd_list);
  2046. ctx->dsd_use_cnt = 0;
  2047. if (cmd->cmd_len > 16) {
  2048. additional_cdb_len = cmd->cmd_len - 16;
  2049. if ((cmd->cmd_len % 4) != 0) {
  2050. /* SCSI command bigger than 16 bytes must be
  2051. * multiple of 4
  2052. */
  2053. ql_log(ql_log_warn, vha, 0x3012,
  2054. "scsi cmd len %d not multiple of 4 "
  2055. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2056. goto queuing_error_fcp_cmnd;
  2057. }
  2058. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2059. } else {
  2060. additional_cdb_len = 0;
  2061. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2062. }
  2063. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2064. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2065. /* Zero out remaining portion of packet. */
  2066. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  2067. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2068. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2069. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2070. /* Set NPORT-ID and LUN number*/
  2071. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2072. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2073. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2074. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2075. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2076. /* Build IOCB segments */
  2077. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  2078. goto queuing_error_fcp_cmnd;
  2079. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2080. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  2081. /* build FCP_CMND IU */
  2082. memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd));
  2083. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  2084. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  2085. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  2086. ctx->fcp_cmnd->additional_cdb_len |= 1;
  2087. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  2088. ctx->fcp_cmnd->additional_cdb_len |= 2;
  2089. /* Populate the FCP_PRIO. */
  2090. if (ha->flags.fcp_prio_enabled)
  2091. ctx->fcp_cmnd->task_attribute |=
  2092. sp->fcport->fcp_prio << 3;
  2093. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  2094. fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 +
  2095. additional_cdb_len);
  2096. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  2097. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  2098. cmd_pkt->fcp_cmnd_dseg_address[0] =
  2099. cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
  2100. cmd_pkt->fcp_cmnd_dseg_address[1] =
  2101. cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
  2102. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  2103. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2104. /* Set total data segment count. */
  2105. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2106. /* Specify response queue number where
  2107. * completion should happen
  2108. */
  2109. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2110. } else {
  2111. struct cmd_type_7 *cmd_pkt;
  2112. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2113. if (req->cnt < (req_cnt + 2)) {
  2114. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2115. &reg->req_q_out[0]);
  2116. if (req->ring_index < cnt)
  2117. req->cnt = cnt - req->ring_index;
  2118. else
  2119. req->cnt = req->length -
  2120. (req->ring_index - cnt);
  2121. }
  2122. if (req->cnt < (req_cnt + 2))
  2123. goto queuing_error;
  2124. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  2125. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2126. /* Zero out remaining portion of packet. */
  2127. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2128. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2129. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2130. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2131. /* Set NPORT-ID and LUN number*/
  2132. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2133. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2134. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2135. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2136. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2137. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2138. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  2139. sizeof(cmd_pkt->lun));
  2140. /* Populate the FCP_PRIO. */
  2141. if (ha->flags.fcp_prio_enabled)
  2142. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  2143. /* Load SCSI command packet. */
  2144. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  2145. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  2146. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2147. /* Build IOCB segments */
  2148. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  2149. /* Set total data segment count. */
  2150. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2151. /* Specify response queue number where
  2152. * completion should happen.
  2153. */
  2154. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2155. }
  2156. /* Build command packet. */
  2157. req->current_outstanding_cmd = handle;
  2158. req->outstanding_cmds[handle] = sp;
  2159. sp->handle = handle;
  2160. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  2161. req->cnt -= req_cnt;
  2162. wmb();
  2163. /* Adjust ring index. */
  2164. req->ring_index++;
  2165. if (req->ring_index == req->length) {
  2166. req->ring_index = 0;
  2167. req->ring_ptr = req->ring;
  2168. } else
  2169. req->ring_ptr++;
  2170. sp->flags |= SRB_DMA_VALID;
  2171. /* Set chip new ring index. */
  2172. /* write, read and verify logic */
  2173. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  2174. if (ql2xdbwr)
  2175. qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval);
  2176. else {
  2177. WRT_REG_DWORD(
  2178. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2179. dbval);
  2180. wmb();
  2181. while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) {
  2182. WRT_REG_DWORD(
  2183. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2184. dbval);
  2185. wmb();
  2186. }
  2187. }
  2188. /* Manage unprocessed RIO/ZIO commands in response queue. */
  2189. if (vha->flags.process_response_queue &&
  2190. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  2191. qla24xx_process_response_queue(vha, rsp);
  2192. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2193. return QLA_SUCCESS;
  2194. queuing_error_fcp_cmnd:
  2195. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  2196. queuing_error:
  2197. if (tot_dsds)
  2198. scsi_dma_unmap(cmd);
  2199. if (sp->u.scmd.ctx) {
  2200. mempool_free(sp->u.scmd.ctx, ha->ctx_mempool);
  2201. sp->u.scmd.ctx = NULL;
  2202. }
  2203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2204. return QLA_FUNCTION_FAILED;
  2205. }
  2206. static void
  2207. qla24xx_abort_iocb(srb_t *sp, struct abort_entry_24xx *abt_iocb)
  2208. {
  2209. struct srb_iocb *aio = &sp->u.iocb_cmd;
  2210. scsi_qla_host_t *vha = sp->fcport->vha;
  2211. struct req_que *req = vha->req;
  2212. memset(abt_iocb, 0, sizeof(struct abort_entry_24xx));
  2213. abt_iocb->entry_type = ABORT_IOCB_TYPE;
  2214. abt_iocb->entry_count = 1;
  2215. abt_iocb->handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
  2216. abt_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2217. abt_iocb->handle_to_abort =
  2218. cpu_to_le32(MAKE_HANDLE(req->id, aio->u.abt.cmd_hndl));
  2219. abt_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  2220. abt_iocb->port_id[1] = sp->fcport->d_id.b.area;
  2221. abt_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  2222. abt_iocb->vp_index = vha->vp_idx;
  2223. abt_iocb->req_que_no = cpu_to_le16(req->id);
  2224. /* Send the command to the firmware */
  2225. wmb();
  2226. }
  2227. int
  2228. qla2x00_start_sp(srb_t *sp)
  2229. {
  2230. int rval;
  2231. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2232. void *pkt;
  2233. unsigned long flags;
  2234. rval = QLA_FUNCTION_FAILED;
  2235. spin_lock_irqsave(&ha->hardware_lock, flags);
  2236. pkt = qla2x00_alloc_iocbs(sp->fcport->vha, sp);
  2237. if (!pkt) {
  2238. ql_log(ql_log_warn, sp->fcport->vha, 0x700c,
  2239. "qla2x00_alloc_iocbs failed.\n");
  2240. goto done;
  2241. }
  2242. rval = QLA_SUCCESS;
  2243. switch (sp->type) {
  2244. case SRB_LOGIN_CMD:
  2245. IS_FWI2_CAPABLE(ha) ?
  2246. qla24xx_login_iocb(sp, pkt) :
  2247. qla2x00_login_iocb(sp, pkt);
  2248. break;
  2249. case SRB_LOGOUT_CMD:
  2250. IS_FWI2_CAPABLE(ha) ?
  2251. qla24xx_logout_iocb(sp, pkt) :
  2252. qla2x00_logout_iocb(sp, pkt);
  2253. break;
  2254. case SRB_ELS_CMD_RPT:
  2255. case SRB_ELS_CMD_HST:
  2256. qla24xx_els_iocb(sp, pkt);
  2257. break;
  2258. case SRB_CT_CMD:
  2259. IS_FWI2_CAPABLE(ha) ?
  2260. qla24xx_ct_iocb(sp, pkt) :
  2261. qla2x00_ct_iocb(sp, pkt);
  2262. break;
  2263. case SRB_ADISC_CMD:
  2264. IS_FWI2_CAPABLE(ha) ?
  2265. qla24xx_adisc_iocb(sp, pkt) :
  2266. qla2x00_adisc_iocb(sp, pkt);
  2267. break;
  2268. case SRB_TM_CMD:
  2269. IS_QLAFX00(ha) ?
  2270. qlafx00_tm_iocb(sp, pkt) :
  2271. qla24xx_tm_iocb(sp, pkt);
  2272. break;
  2273. case SRB_FXIOCB_DCMD:
  2274. case SRB_FXIOCB_BCMD:
  2275. qlafx00_fxdisc_iocb(sp, pkt);
  2276. break;
  2277. case SRB_ABT_CMD:
  2278. IS_QLAFX00(ha) ?
  2279. qlafx00_abort_iocb(sp, pkt) :
  2280. qla24xx_abort_iocb(sp, pkt);
  2281. break;
  2282. default:
  2283. break;
  2284. }
  2285. wmb();
  2286. qla2x00_start_iocbs(sp->fcport->vha, ha->req_q_map[0]);
  2287. done:
  2288. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2289. return rval;
  2290. }
  2291. static void
  2292. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  2293. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  2294. {
  2295. uint16_t avail_dsds;
  2296. uint32_t *cur_dsd;
  2297. uint32_t req_data_len = 0;
  2298. uint32_t rsp_data_len = 0;
  2299. struct scatterlist *sg;
  2300. int index;
  2301. int entry_count = 1;
  2302. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  2303. /*Update entry type to indicate bidir command */
  2304. *((uint32_t *)(&cmd_pkt->entry_type)) =
  2305. __constant_cpu_to_le32(COMMAND_BIDIRECTIONAL);
  2306. /* Set the transfer direction, in this set both flags
  2307. * Also set the BD_WRAP_BACK flag, firmware will take care
  2308. * assigning DID=SID for outgoing pkts.
  2309. */
  2310. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2311. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2312. cmd_pkt->control_flags =
  2313. __constant_cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  2314. BD_WRAP_BACK);
  2315. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  2316. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  2317. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  2318. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  2319. vha->bidi_stats.transfer_bytes += req_data_len;
  2320. vha->bidi_stats.io_count++;
  2321. vha->qla_stats.output_bytes += req_data_len;
  2322. vha->qla_stats.output_requests++;
  2323. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  2324. * are bundled in continuation iocb
  2325. */
  2326. avail_dsds = 1;
  2327. cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  2328. index = 0;
  2329. for_each_sg(bsg_job->request_payload.sg_list, sg,
  2330. bsg_job->request_payload.sg_cnt, index) {
  2331. dma_addr_t sle_dma;
  2332. cont_a64_entry_t *cont_pkt;
  2333. /* Allocate additional continuation packets */
  2334. if (avail_dsds == 0) {
  2335. /* Continuation type 1 IOCB can accomodate
  2336. * 5 DSDS
  2337. */
  2338. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2339. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2340. avail_dsds = 5;
  2341. entry_count++;
  2342. }
  2343. sle_dma = sg_dma_address(sg);
  2344. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2345. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2346. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2347. avail_dsds--;
  2348. }
  2349. /* For read request DSD will always goes to continuation IOCB
  2350. * and follow the write DSD. If there is room on the current IOCB
  2351. * then it is added to that IOCB else new continuation IOCB is
  2352. * allocated.
  2353. */
  2354. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  2355. bsg_job->reply_payload.sg_cnt, index) {
  2356. dma_addr_t sle_dma;
  2357. cont_a64_entry_t *cont_pkt;
  2358. /* Allocate additional continuation packets */
  2359. if (avail_dsds == 0) {
  2360. /* Continuation type 1 IOCB can accomodate
  2361. * 5 DSDS
  2362. */
  2363. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2364. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2365. avail_dsds = 5;
  2366. entry_count++;
  2367. }
  2368. sle_dma = sg_dma_address(sg);
  2369. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2370. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2371. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2372. avail_dsds--;
  2373. }
  2374. /* This value should be same as number of IOCB required for this cmd */
  2375. cmd_pkt->entry_count = entry_count;
  2376. }
  2377. int
  2378. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  2379. {
  2380. struct qla_hw_data *ha = vha->hw;
  2381. unsigned long flags;
  2382. uint32_t handle;
  2383. uint32_t index;
  2384. uint16_t req_cnt;
  2385. uint16_t cnt;
  2386. uint32_t *clr_ptr;
  2387. struct cmd_bidir *cmd_pkt = NULL;
  2388. struct rsp_que *rsp;
  2389. struct req_que *req;
  2390. int rval = EXT_STATUS_OK;
  2391. rval = QLA_SUCCESS;
  2392. rsp = ha->rsp_q_map[0];
  2393. req = vha->req;
  2394. /* Send marker if required */
  2395. if (vha->marker_needed != 0) {
  2396. if (qla2x00_marker(vha, req,
  2397. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  2398. return EXT_STATUS_MAILBOX;
  2399. vha->marker_needed = 0;
  2400. }
  2401. /* Acquire ring specific lock */
  2402. spin_lock_irqsave(&ha->hardware_lock, flags);
  2403. /* Check for room in outstanding command list. */
  2404. handle = req->current_outstanding_cmd;
  2405. for (index = 1; index < req->num_outstanding_cmds; index++) {
  2406. handle++;
  2407. if (handle == req->num_outstanding_cmds)
  2408. handle = 1;
  2409. if (!req->outstanding_cmds[handle])
  2410. break;
  2411. }
  2412. if (index == req->num_outstanding_cmds) {
  2413. rval = EXT_STATUS_BUSY;
  2414. goto queuing_error;
  2415. }
  2416. /* Calculate number of IOCB required */
  2417. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2418. /* Check for room on request queue. */
  2419. if (req->cnt < req_cnt + 2) {
  2420. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  2421. RD_REG_DWORD_RELAXED(req->req_q_out);
  2422. if (req->ring_index < cnt)
  2423. req->cnt = cnt - req->ring_index;
  2424. else
  2425. req->cnt = req->length -
  2426. (req->ring_index - cnt);
  2427. }
  2428. if (req->cnt < req_cnt + 2) {
  2429. rval = EXT_STATUS_BUSY;
  2430. goto queuing_error;
  2431. }
  2432. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  2433. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2434. /* Zero out remaining portion of packet. */
  2435. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2436. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2437. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2438. /* Set NPORT-ID (of vha)*/
  2439. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  2440. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  2441. cmd_pkt->port_id[1] = vha->d_id.b.area;
  2442. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  2443. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  2444. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2445. /* Build command packet. */
  2446. req->current_outstanding_cmd = handle;
  2447. req->outstanding_cmds[handle] = sp;
  2448. sp->handle = handle;
  2449. req->cnt -= req_cnt;
  2450. /* Send the command to the firmware */
  2451. wmb();
  2452. qla2x00_start_iocbs(vha, req);
  2453. queuing_error:
  2454. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2455. return rval;
  2456. }