rtc-sun6i.c 11 KB

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  1. /*
  2. * An RTC driver for Allwinner A31/A23
  3. *
  4. * Copyright (c) 2014, Chen-Yu Tsai <wens@csie.org>
  5. *
  6. * based on rtc-sunxi.c
  7. *
  8. * An RTC driver for Allwinner A10/A20
  9. *
  10. * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful, but WITHOUT
  18. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  20. * more details.
  21. */
  22. #include <linux/delay.h>
  23. #include <linux/err.h>
  24. #include <linux/fs.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/io.h>
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/of.h>
  31. #include <linux/of_address.h>
  32. #include <linux/of_device.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/rtc.h>
  35. #include <linux/types.h>
  36. /* Control register */
  37. #define SUN6I_LOSC_CTRL 0x0000
  38. #define SUN6I_LOSC_CTRL_ALM_DHMS_ACC BIT(9)
  39. #define SUN6I_LOSC_CTRL_RTC_HMS_ACC BIT(8)
  40. #define SUN6I_LOSC_CTRL_RTC_YMD_ACC BIT(7)
  41. #define SUN6I_LOSC_CTRL_ACC_MASK GENMASK(9, 7)
  42. /* RTC */
  43. #define SUN6I_RTC_YMD 0x0010
  44. #define SUN6I_RTC_HMS 0x0014
  45. /* Alarm 0 (counter) */
  46. #define SUN6I_ALRM_COUNTER 0x0020
  47. #define SUN6I_ALRM_CUR_VAL 0x0024
  48. #define SUN6I_ALRM_EN 0x0028
  49. #define SUN6I_ALRM_EN_CNT_EN BIT(0)
  50. #define SUN6I_ALRM_IRQ_EN 0x002c
  51. #define SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
  52. #define SUN6I_ALRM_IRQ_STA 0x0030
  53. #define SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
  54. /* Alarm 1 (wall clock) */
  55. #define SUN6I_ALRM1_EN 0x0044
  56. #define SUN6I_ALRM1_IRQ_EN 0x0048
  57. #define SUN6I_ALRM1_IRQ_STA 0x004c
  58. #define SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND BIT(0)
  59. /* Alarm config */
  60. #define SUN6I_ALARM_CONFIG 0x0050
  61. #define SUN6I_ALARM_CONFIG_WAKEUP BIT(0)
  62. /*
  63. * Get date values
  64. */
  65. #define SUN6I_DATE_GET_DAY_VALUE(x) ((x) & 0x0000001f)
  66. #define SUN6I_DATE_GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8)
  67. #define SUN6I_DATE_GET_YEAR_VALUE(x) (((x) & 0x003f0000) >> 16)
  68. #define SUN6I_LEAP_GET_VALUE(x) (((x) & 0x00400000) >> 22)
  69. /*
  70. * Get time values
  71. */
  72. #define SUN6I_TIME_GET_SEC_VALUE(x) ((x) & 0x0000003f)
  73. #define SUN6I_TIME_GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8)
  74. #define SUN6I_TIME_GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16)
  75. /*
  76. * Set date values
  77. */
  78. #define SUN6I_DATE_SET_DAY_VALUE(x) ((x) & 0x0000001f)
  79. #define SUN6I_DATE_SET_MON_VALUE(x) ((x) << 8 & 0x00000f00)
  80. #define SUN6I_DATE_SET_YEAR_VALUE(x) ((x) << 16 & 0x003f0000)
  81. #define SUN6I_LEAP_SET_VALUE(x) ((x) << 22 & 0x00400000)
  82. /*
  83. * Set time values
  84. */
  85. #define SUN6I_TIME_SET_SEC_VALUE(x) ((x) & 0x0000003f)
  86. #define SUN6I_TIME_SET_MIN_VALUE(x) ((x) << 8 & 0x00003f00)
  87. #define SUN6I_TIME_SET_HOUR_VALUE(x) ((x) << 16 & 0x001f0000)
  88. /*
  89. * The year parameter passed to the driver is usually an offset relative to
  90. * the year 1900. This macro is used to convert this offset to another one
  91. * relative to the minimum year allowed by the hardware.
  92. *
  93. * The year range is 1970 - 2033. This range is selected to match Allwinner's
  94. * driver, even though it is somewhat limited.
  95. */
  96. #define SUN6I_YEAR_MIN 1970
  97. #define SUN6I_YEAR_MAX 2033
  98. #define SUN6I_YEAR_OFF (SUN6I_YEAR_MIN - 1900)
  99. struct sun6i_rtc_dev {
  100. struct rtc_device *rtc;
  101. struct device *dev;
  102. void __iomem *base;
  103. int irq;
  104. unsigned long alarm;
  105. };
  106. static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
  107. {
  108. struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id;
  109. u32 val;
  110. val = readl(chip->base + SUN6I_ALRM_IRQ_STA);
  111. if (val & SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND) {
  112. val |= SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND;
  113. writel(val, chip->base + SUN6I_ALRM_IRQ_STA);
  114. rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
  115. return IRQ_HANDLED;
  116. }
  117. return IRQ_NONE;
  118. }
  119. static void sun6i_rtc_setaie(int to, struct sun6i_rtc_dev *chip)
  120. {
  121. u32 alrm_val = 0;
  122. u32 alrm_irq_val = 0;
  123. u32 alrm_wake_val = 0;
  124. if (to) {
  125. alrm_val = SUN6I_ALRM_EN_CNT_EN;
  126. alrm_irq_val = SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN;
  127. alrm_wake_val = SUN6I_ALARM_CONFIG_WAKEUP;
  128. } else {
  129. writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
  130. chip->base + SUN6I_ALRM_IRQ_STA);
  131. }
  132. writel(alrm_val, chip->base + SUN6I_ALRM_EN);
  133. writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN);
  134. writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG);
  135. }
  136. static int sun6i_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  137. {
  138. struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
  139. u32 date, time;
  140. /*
  141. * read again in case it changes
  142. */
  143. do {
  144. date = readl(chip->base + SUN6I_RTC_YMD);
  145. time = readl(chip->base + SUN6I_RTC_HMS);
  146. } while ((date != readl(chip->base + SUN6I_RTC_YMD)) ||
  147. (time != readl(chip->base + SUN6I_RTC_HMS)));
  148. rtc_tm->tm_sec = SUN6I_TIME_GET_SEC_VALUE(time);
  149. rtc_tm->tm_min = SUN6I_TIME_GET_MIN_VALUE(time);
  150. rtc_tm->tm_hour = SUN6I_TIME_GET_HOUR_VALUE(time);
  151. rtc_tm->tm_mday = SUN6I_DATE_GET_DAY_VALUE(date);
  152. rtc_tm->tm_mon = SUN6I_DATE_GET_MON_VALUE(date);
  153. rtc_tm->tm_year = SUN6I_DATE_GET_YEAR_VALUE(date);
  154. rtc_tm->tm_mon -= 1;
  155. /*
  156. * switch from (data_year->min)-relative offset to
  157. * a (1900)-relative one
  158. */
  159. rtc_tm->tm_year += SUN6I_YEAR_OFF;
  160. return rtc_valid_tm(rtc_tm);
  161. }
  162. static int sun6i_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  163. {
  164. struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
  165. u32 alrm_st;
  166. u32 alrm_en;
  167. alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN);
  168. alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA);
  169. wkalrm->enabled = !!(alrm_en & SUN6I_ALRM_EN_CNT_EN);
  170. wkalrm->pending = !!(alrm_st & SUN6I_ALRM_EN_CNT_EN);
  171. rtc_time_to_tm(chip->alarm, &wkalrm->time);
  172. return 0;
  173. }
  174. static int sun6i_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  175. {
  176. struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
  177. struct rtc_time *alrm_tm = &wkalrm->time;
  178. struct rtc_time tm_now;
  179. unsigned long time_now = 0;
  180. unsigned long time_set = 0;
  181. unsigned long time_gap = 0;
  182. int ret = 0;
  183. ret = sun6i_rtc_gettime(dev, &tm_now);
  184. if (ret < 0) {
  185. dev_err(dev, "Error in getting time\n");
  186. return -EINVAL;
  187. }
  188. rtc_tm_to_time(alrm_tm, &time_set);
  189. rtc_tm_to_time(&tm_now, &time_now);
  190. if (time_set <= time_now) {
  191. dev_err(dev, "Date to set in the past\n");
  192. return -EINVAL;
  193. }
  194. time_gap = time_set - time_now;
  195. if (time_gap > U32_MAX) {
  196. dev_err(dev, "Date too far in the future\n");
  197. return -EINVAL;
  198. }
  199. sun6i_rtc_setaie(0, chip);
  200. writel(0, chip->base + SUN6I_ALRM_COUNTER);
  201. usleep_range(100, 300);
  202. writel(time_gap, chip->base + SUN6I_ALRM_COUNTER);
  203. chip->alarm = time_set;
  204. sun6i_rtc_setaie(wkalrm->enabled, chip);
  205. return 0;
  206. }
  207. static int sun6i_rtc_wait(struct sun6i_rtc_dev *chip, int offset,
  208. unsigned int mask, unsigned int ms_timeout)
  209. {
  210. const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
  211. u32 reg;
  212. do {
  213. reg = readl(chip->base + offset);
  214. reg &= mask;
  215. if (!reg)
  216. return 0;
  217. } while (time_before(jiffies, timeout));
  218. return -ETIMEDOUT;
  219. }
  220. static int sun6i_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
  221. {
  222. struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
  223. u32 date = 0;
  224. u32 time = 0;
  225. int year;
  226. year = rtc_tm->tm_year + 1900;
  227. if (year < SUN6I_YEAR_MIN || year > SUN6I_YEAR_MAX) {
  228. dev_err(dev, "rtc only supports year in range %d - %d\n",
  229. SUN6I_YEAR_MIN, SUN6I_YEAR_MAX);
  230. return -EINVAL;
  231. }
  232. rtc_tm->tm_year -= SUN6I_YEAR_OFF;
  233. rtc_tm->tm_mon += 1;
  234. date = SUN6I_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
  235. SUN6I_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
  236. SUN6I_DATE_SET_YEAR_VALUE(rtc_tm->tm_year);
  237. if (is_leap_year(year))
  238. date |= SUN6I_LEAP_SET_VALUE(1);
  239. time = SUN6I_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
  240. SUN6I_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
  241. SUN6I_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
  242. /* Check whether registers are writable */
  243. if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
  244. SUN6I_LOSC_CTRL_ACC_MASK, 50)) {
  245. dev_err(dev, "rtc is still busy.\n");
  246. return -EBUSY;
  247. }
  248. writel(time, chip->base + SUN6I_RTC_HMS);
  249. /*
  250. * After writing the RTC HH-MM-SS register, the
  251. * SUN6I_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
  252. * be cleared until the real writing operation is finished
  253. */
  254. if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
  255. SUN6I_LOSC_CTRL_RTC_HMS_ACC, 50)) {
  256. dev_err(dev, "Failed to set rtc time.\n");
  257. return -ETIMEDOUT;
  258. }
  259. writel(date, chip->base + SUN6I_RTC_YMD);
  260. /*
  261. * After writing the RTC YY-MM-DD register, the
  262. * SUN6I_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
  263. * be cleared until the real writing operation is finished
  264. */
  265. if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
  266. SUN6I_LOSC_CTRL_RTC_YMD_ACC, 50)) {
  267. dev_err(dev, "Failed to set rtc time.\n");
  268. return -ETIMEDOUT;
  269. }
  270. return 0;
  271. }
  272. static int sun6i_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  273. {
  274. struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
  275. if (!enabled)
  276. sun6i_rtc_setaie(enabled, chip);
  277. return 0;
  278. }
  279. static const struct rtc_class_ops sun6i_rtc_ops = {
  280. .read_time = sun6i_rtc_gettime,
  281. .set_time = sun6i_rtc_settime,
  282. .read_alarm = sun6i_rtc_getalarm,
  283. .set_alarm = sun6i_rtc_setalarm,
  284. .alarm_irq_enable = sun6i_rtc_alarm_irq_enable
  285. };
  286. static int sun6i_rtc_probe(struct platform_device *pdev)
  287. {
  288. struct sun6i_rtc_dev *chip;
  289. struct resource *res;
  290. int ret;
  291. chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
  292. if (!chip)
  293. return -ENOMEM;
  294. platform_set_drvdata(pdev, chip);
  295. chip->dev = &pdev->dev;
  296. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  297. chip->base = devm_ioremap_resource(&pdev->dev, res);
  298. if (IS_ERR(chip->base))
  299. return PTR_ERR(chip->base);
  300. chip->irq = platform_get_irq(pdev, 0);
  301. if (chip->irq < 0) {
  302. dev_err(&pdev->dev, "No IRQ resource\n");
  303. return chip->irq;
  304. }
  305. ret = devm_request_irq(&pdev->dev, chip->irq, sun6i_rtc_alarmirq,
  306. 0, dev_name(&pdev->dev), chip);
  307. if (ret) {
  308. dev_err(&pdev->dev, "Could not request IRQ\n");
  309. return ret;
  310. }
  311. /* clear the alarm counter value */
  312. writel(0, chip->base + SUN6I_ALRM_COUNTER);
  313. /* disable counter alarm */
  314. writel(0, chip->base + SUN6I_ALRM_EN);
  315. /* disable counter alarm interrupt */
  316. writel(0, chip->base + SUN6I_ALRM_IRQ_EN);
  317. /* disable week alarm */
  318. writel(0, chip->base + SUN6I_ALRM1_EN);
  319. /* disable week alarm interrupt */
  320. writel(0, chip->base + SUN6I_ALRM1_IRQ_EN);
  321. /* clear counter alarm pending interrupts */
  322. writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
  323. chip->base + SUN6I_ALRM_IRQ_STA);
  324. /* clear week alarm pending interrupts */
  325. writel(SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND,
  326. chip->base + SUN6I_ALRM1_IRQ_STA);
  327. /* disable alarm wakeup */
  328. writel(0, chip->base + SUN6I_ALARM_CONFIG);
  329. chip->rtc = rtc_device_register("rtc-sun6i", &pdev->dev,
  330. &sun6i_rtc_ops, THIS_MODULE);
  331. if (IS_ERR(chip->rtc)) {
  332. dev_err(&pdev->dev, "unable to register device\n");
  333. return PTR_ERR(chip->rtc);
  334. }
  335. dev_info(&pdev->dev, "RTC enabled\n");
  336. return 0;
  337. }
  338. static int sun6i_rtc_remove(struct platform_device *pdev)
  339. {
  340. struct sun6i_rtc_dev *chip = platform_get_drvdata(pdev);
  341. rtc_device_unregister(chip->rtc);
  342. return 0;
  343. }
  344. static const struct of_device_id sun6i_rtc_dt_ids[] = {
  345. { .compatible = "allwinner,sun6i-a31-rtc" },
  346. { /* sentinel */ },
  347. };
  348. MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
  349. static struct platform_driver sun6i_rtc_driver = {
  350. .probe = sun6i_rtc_probe,
  351. .remove = sun6i_rtc_remove,
  352. .driver = {
  353. .name = "sun6i-rtc",
  354. .of_match_table = sun6i_rtc_dt_ids,
  355. },
  356. };
  357. module_platform_driver(sun6i_rtc_driver);
  358. MODULE_DESCRIPTION("sun6i RTC driver");
  359. MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
  360. MODULE_LICENSE("GPL");