rtc-pcf2123.c 9.2 KB

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  1. /*
  2. * An SPI driver for the Philips PCF2123 RTC
  3. * Copyright 2009 Cyber Switching, Inc.
  4. *
  5. * Author: Chris Verges <chrisv@cyberswitching.com>
  6. * Maintainers: http://www.cyberswitching.com
  7. *
  8. * based on the RS5C348 driver in this same directory.
  9. *
  10. * Thanks to Christian Pellegrin <chripell@fsfe.org> for
  11. * the sysfs contributions to this driver.
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Please note that the CS is active high, so platform data
  18. * should look something like:
  19. *
  20. * static struct spi_board_info ek_spi_devices[] = {
  21. * ...
  22. * {
  23. * .modalias = "rtc-pcf2123",
  24. * .chip_select = 1,
  25. * .controller_data = (void *)AT91_PIN_PA10,
  26. * .max_speed_hz = 1000 * 1000,
  27. * .mode = SPI_CS_HIGH,
  28. * .bus_num = 0,
  29. * },
  30. * ...
  31. *};
  32. *
  33. */
  34. #include <linux/bcd.h>
  35. #include <linux/delay.h>
  36. #include <linux/device.h>
  37. #include <linux/errno.h>
  38. #include <linux/init.h>
  39. #include <linux/kernel.h>
  40. #include <linux/of.h>
  41. #include <linux/string.h>
  42. #include <linux/slab.h>
  43. #include <linux/rtc.h>
  44. #include <linux/spi/spi.h>
  45. #include <linux/module.h>
  46. #include <linux/sysfs.h>
  47. #define DRV_VERSION "0.6"
  48. #define PCF2123_REG_CTRL1 (0x00) /* Control Register 1 */
  49. #define PCF2123_REG_CTRL2 (0x01) /* Control Register 2 */
  50. #define PCF2123_REG_SC (0x02) /* datetime */
  51. #define PCF2123_REG_MN (0x03)
  52. #define PCF2123_REG_HR (0x04)
  53. #define PCF2123_REG_DM (0x05)
  54. #define PCF2123_REG_DW (0x06)
  55. #define PCF2123_REG_MO (0x07)
  56. #define PCF2123_REG_YR (0x08)
  57. #define PCF2123_SUBADDR (1 << 4)
  58. #define PCF2123_WRITE ((0 << 7) | PCF2123_SUBADDR)
  59. #define PCF2123_READ ((1 << 7) | PCF2123_SUBADDR)
  60. static struct spi_driver pcf2123_driver;
  61. struct pcf2123_sysfs_reg {
  62. struct device_attribute attr;
  63. char name[2];
  64. };
  65. struct pcf2123_plat_data {
  66. struct rtc_device *rtc;
  67. struct pcf2123_sysfs_reg regs[16];
  68. };
  69. /*
  70. * Causes a 30 nanosecond delay to ensure that the PCF2123 chip select
  71. * is released properly after an SPI write. This function should be
  72. * called after EVERY read/write call over SPI.
  73. */
  74. static inline void pcf2123_delay_trec(void)
  75. {
  76. ndelay(30);
  77. }
  78. static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr,
  79. char *buffer)
  80. {
  81. struct spi_device *spi = to_spi_device(dev);
  82. struct pcf2123_sysfs_reg *r;
  83. u8 txbuf[1], rxbuf[1];
  84. unsigned long reg;
  85. int ret;
  86. r = container_of(attr, struct pcf2123_sysfs_reg, attr);
  87. ret = kstrtoul(r->name, 16, &reg);
  88. if (ret)
  89. return ret;
  90. txbuf[0] = PCF2123_READ | reg;
  91. ret = spi_write_then_read(spi, txbuf, 1, rxbuf, 1);
  92. if (ret < 0)
  93. return -EIO;
  94. pcf2123_delay_trec();
  95. return sprintf(buffer, "0x%x\n", rxbuf[0]);
  96. }
  97. static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr,
  98. const char *buffer, size_t count) {
  99. struct spi_device *spi = to_spi_device(dev);
  100. struct pcf2123_sysfs_reg *r;
  101. u8 txbuf[2];
  102. unsigned long reg;
  103. unsigned long val;
  104. int ret;
  105. r = container_of(attr, struct pcf2123_sysfs_reg, attr);
  106. ret = kstrtoul(r->name, 16, &reg);
  107. if (ret)
  108. return ret;
  109. ret = kstrtoul(buffer, 10, &val);
  110. if (ret)
  111. return ret;
  112. txbuf[0] = PCF2123_WRITE | reg;
  113. txbuf[1] = val;
  114. ret = spi_write(spi, txbuf, sizeof(txbuf));
  115. if (ret < 0)
  116. return -EIO;
  117. pcf2123_delay_trec();
  118. return count;
  119. }
  120. static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm)
  121. {
  122. struct spi_device *spi = to_spi_device(dev);
  123. u8 txbuf[1], rxbuf[7];
  124. int ret;
  125. txbuf[0] = PCF2123_READ | PCF2123_REG_SC;
  126. ret = spi_write_then_read(spi, txbuf, sizeof(txbuf),
  127. rxbuf, sizeof(rxbuf));
  128. if (ret < 0)
  129. return ret;
  130. pcf2123_delay_trec();
  131. tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F);
  132. tm->tm_min = bcd2bin(rxbuf[1] & 0x7F);
  133. tm->tm_hour = bcd2bin(rxbuf[2] & 0x3F); /* rtc hr 0-23 */
  134. tm->tm_mday = bcd2bin(rxbuf[3] & 0x3F);
  135. tm->tm_wday = rxbuf[4] & 0x07;
  136. tm->tm_mon = bcd2bin(rxbuf[5] & 0x1F) - 1; /* rtc mn 1-12 */
  137. tm->tm_year = bcd2bin(rxbuf[6]);
  138. if (tm->tm_year < 70)
  139. tm->tm_year += 100; /* assume we are in 1970...2069 */
  140. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  141. "mday=%d, mon=%d, year=%d, wday=%d\n",
  142. __func__,
  143. tm->tm_sec, tm->tm_min, tm->tm_hour,
  144. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  145. /* the clock can give out invalid datetime, but we cannot return
  146. * -EINVAL otherwise hwclock will refuse to set the time on bootup.
  147. */
  148. if (rtc_valid_tm(tm) < 0)
  149. dev_err(dev, "retrieved date/time is not valid.\n");
  150. return 0;
  151. }
  152. static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
  153. {
  154. struct spi_device *spi = to_spi_device(dev);
  155. u8 txbuf[8];
  156. int ret;
  157. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  158. "mday=%d, mon=%d, year=%d, wday=%d\n",
  159. __func__,
  160. tm->tm_sec, tm->tm_min, tm->tm_hour,
  161. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  162. /* Stop the counter first */
  163. txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
  164. txbuf[1] = 0x20;
  165. ret = spi_write(spi, txbuf, 2);
  166. if (ret < 0)
  167. return ret;
  168. pcf2123_delay_trec();
  169. /* Set the new time */
  170. txbuf[0] = PCF2123_WRITE | PCF2123_REG_SC;
  171. txbuf[1] = bin2bcd(tm->tm_sec & 0x7F);
  172. txbuf[2] = bin2bcd(tm->tm_min & 0x7F);
  173. txbuf[3] = bin2bcd(tm->tm_hour & 0x3F);
  174. txbuf[4] = bin2bcd(tm->tm_mday & 0x3F);
  175. txbuf[5] = tm->tm_wday & 0x07;
  176. txbuf[6] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */
  177. txbuf[7] = bin2bcd(tm->tm_year < 100 ? tm->tm_year : tm->tm_year - 100);
  178. ret = spi_write(spi, txbuf, sizeof(txbuf));
  179. if (ret < 0)
  180. return ret;
  181. pcf2123_delay_trec();
  182. /* Start the counter */
  183. txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
  184. txbuf[1] = 0x00;
  185. ret = spi_write(spi, txbuf, 2);
  186. if (ret < 0)
  187. return ret;
  188. pcf2123_delay_trec();
  189. return 0;
  190. }
  191. static const struct rtc_class_ops pcf2123_rtc_ops = {
  192. .read_time = pcf2123_rtc_read_time,
  193. .set_time = pcf2123_rtc_set_time,
  194. };
  195. static int pcf2123_probe(struct spi_device *spi)
  196. {
  197. struct rtc_device *rtc;
  198. struct pcf2123_plat_data *pdata;
  199. u8 txbuf[2], rxbuf[2];
  200. int ret, i;
  201. pdata = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_plat_data),
  202. GFP_KERNEL);
  203. if (!pdata)
  204. return -ENOMEM;
  205. spi->dev.platform_data = pdata;
  206. /* Send a software reset command */
  207. txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
  208. txbuf[1] = 0x58;
  209. dev_dbg(&spi->dev, "resetting RTC (0x%02X 0x%02X)\n",
  210. txbuf[0], txbuf[1]);
  211. ret = spi_write(spi, txbuf, 2 * sizeof(u8));
  212. if (ret < 0)
  213. goto kfree_exit;
  214. pcf2123_delay_trec();
  215. /* Stop the counter */
  216. txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
  217. txbuf[1] = 0x20;
  218. dev_dbg(&spi->dev, "stopping RTC (0x%02X 0x%02X)\n",
  219. txbuf[0], txbuf[1]);
  220. ret = spi_write(spi, txbuf, 2 * sizeof(u8));
  221. if (ret < 0)
  222. goto kfree_exit;
  223. pcf2123_delay_trec();
  224. /* See if the counter was actually stopped */
  225. txbuf[0] = PCF2123_READ | PCF2123_REG_CTRL1;
  226. dev_dbg(&spi->dev, "checking for presence of RTC (0x%02X)\n",
  227. txbuf[0]);
  228. ret = spi_write_then_read(spi, txbuf, 1 * sizeof(u8),
  229. rxbuf, 2 * sizeof(u8));
  230. dev_dbg(&spi->dev, "received data from RTC (0x%02X 0x%02X)\n",
  231. rxbuf[0], rxbuf[1]);
  232. if (ret < 0)
  233. goto kfree_exit;
  234. pcf2123_delay_trec();
  235. if (!(rxbuf[0] & 0x20)) {
  236. dev_err(&spi->dev, "chip not found\n");
  237. ret = -ENODEV;
  238. goto kfree_exit;
  239. }
  240. dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n");
  241. dev_info(&spi->dev, "spiclk %u KHz.\n",
  242. (spi->max_speed_hz + 500) / 1000);
  243. /* Start the counter */
  244. txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
  245. txbuf[1] = 0x00;
  246. ret = spi_write(spi, txbuf, sizeof(txbuf));
  247. if (ret < 0)
  248. goto kfree_exit;
  249. pcf2123_delay_trec();
  250. /* Finalize the initialization */
  251. rtc = devm_rtc_device_register(&spi->dev, pcf2123_driver.driver.name,
  252. &pcf2123_rtc_ops, THIS_MODULE);
  253. if (IS_ERR(rtc)) {
  254. dev_err(&spi->dev, "failed to register.\n");
  255. ret = PTR_ERR(rtc);
  256. goto kfree_exit;
  257. }
  258. pdata->rtc = rtc;
  259. for (i = 0; i < 16; i++) {
  260. sysfs_attr_init(&pdata->regs[i].attr.attr);
  261. sprintf(pdata->regs[i].name, "%1x", i);
  262. pdata->regs[i].attr.attr.mode = S_IRUGO | S_IWUSR;
  263. pdata->regs[i].attr.attr.name = pdata->regs[i].name;
  264. pdata->regs[i].attr.show = pcf2123_show;
  265. pdata->regs[i].attr.store = pcf2123_store;
  266. ret = device_create_file(&spi->dev, &pdata->regs[i].attr);
  267. if (ret) {
  268. dev_err(&spi->dev, "Unable to create sysfs %s\n",
  269. pdata->regs[i].name);
  270. goto sysfs_exit;
  271. }
  272. }
  273. return 0;
  274. sysfs_exit:
  275. for (i--; i >= 0; i--)
  276. device_remove_file(&spi->dev, &pdata->regs[i].attr);
  277. kfree_exit:
  278. spi->dev.platform_data = NULL;
  279. return ret;
  280. }
  281. static int pcf2123_remove(struct spi_device *spi)
  282. {
  283. struct pcf2123_plat_data *pdata = dev_get_platdata(&spi->dev);
  284. int i;
  285. if (pdata) {
  286. for (i = 0; i < 16; i++)
  287. if (pdata->regs[i].name[0])
  288. device_remove_file(&spi->dev,
  289. &pdata->regs[i].attr);
  290. }
  291. return 0;
  292. }
  293. #ifdef CONFIG_OF
  294. static const struct of_device_id pcf2123_dt_ids[] = {
  295. { .compatible = "nxp,rtc-pcf2123", },
  296. { /* sentinel */ }
  297. };
  298. MODULE_DEVICE_TABLE(of, pcf2123_dt_ids);
  299. #endif
  300. static struct spi_driver pcf2123_driver = {
  301. .driver = {
  302. .name = "rtc-pcf2123",
  303. .owner = THIS_MODULE,
  304. .of_match_table = of_match_ptr(pcf2123_dt_ids),
  305. },
  306. .probe = pcf2123_probe,
  307. .remove = pcf2123_remove,
  308. };
  309. module_spi_driver(pcf2123_driver);
  310. MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>");
  311. MODULE_DESCRIPTION("NXP PCF2123 RTC driver");
  312. MODULE_LICENSE("GPL");
  313. MODULE_VERSION(DRV_VERSION);