mac.c 14 KB

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  1. /*
  2. * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
  3. * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include "mt7601u.h"
  15. #include "trace.h"
  16. #include <linux/etherdevice.h>
  17. static void
  18. mt76_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate)
  19. {
  20. u8 idx = MT76_GET(MT_TXWI_RATE_MCS, rate);
  21. txrate->idx = 0;
  22. txrate->flags = 0;
  23. txrate->count = 1;
  24. switch (MT76_GET(MT_TXWI_RATE_PHY_MODE, rate)) {
  25. case MT_PHY_TYPE_OFDM:
  26. txrate->idx = idx + 4;
  27. return;
  28. case MT_PHY_TYPE_CCK:
  29. if (idx >= 8)
  30. idx -= 8;
  31. txrate->idx = idx;
  32. return;
  33. case MT_PHY_TYPE_HT_GF:
  34. txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD;
  35. /* fall through */
  36. case MT_PHY_TYPE_HT:
  37. txrate->flags |= IEEE80211_TX_RC_MCS;
  38. txrate->idx = idx;
  39. break;
  40. default:
  41. WARN_ON(1);
  42. return;
  43. }
  44. if (MT76_GET(MT_TXWI_RATE_BW, rate) == MT_PHY_BW_40)
  45. txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  46. if (rate & MT_TXWI_RATE_SGI)
  47. txrate->flags |= IEEE80211_TX_RC_SHORT_GI;
  48. }
  49. static void
  50. mt76_mac_fill_tx_status(struct mt7601u_dev *dev, struct ieee80211_tx_info *info,
  51. struct mt76_tx_status *st)
  52. {
  53. struct ieee80211_tx_rate *rate = info->status.rates;
  54. int cur_idx, last_rate;
  55. int i;
  56. last_rate = min_t(int, st->retry, IEEE80211_TX_MAX_RATES - 1);
  57. mt76_mac_process_tx_rate(&rate[last_rate], st->rate);
  58. if (last_rate < IEEE80211_TX_MAX_RATES - 1)
  59. rate[last_rate + 1].idx = -1;
  60. cur_idx = rate[last_rate].idx + st->retry;
  61. for (i = 0; i <= last_rate; i++) {
  62. rate[i].flags = rate[last_rate].flags;
  63. rate[i].idx = max_t(int, 0, cur_idx - i);
  64. rate[i].count = 1;
  65. }
  66. if (last_rate > 0)
  67. rate[last_rate - 1].count = st->retry + 1 - last_rate;
  68. info->status.ampdu_len = 1;
  69. info->status.ampdu_ack_len = st->success;
  70. if (st->is_probe)
  71. info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
  72. if (st->aggr)
  73. info->flags |= IEEE80211_TX_CTL_AMPDU |
  74. IEEE80211_TX_STAT_AMPDU;
  75. if (!st->ack_req)
  76. info->flags |= IEEE80211_TX_CTL_NO_ACK;
  77. else if (st->success)
  78. info->flags |= IEEE80211_TX_STAT_ACK;
  79. }
  80. u16 mt76_mac_tx_rate_val(struct mt7601u_dev *dev,
  81. const struct ieee80211_tx_rate *rate, u8 *nss_val)
  82. {
  83. u16 rateval;
  84. u8 phy, rate_idx;
  85. u8 nss = 1;
  86. u8 bw = 0;
  87. if (rate->flags & IEEE80211_TX_RC_MCS) {
  88. rate_idx = rate->idx;
  89. nss = 1 + (rate->idx >> 3);
  90. phy = MT_PHY_TYPE_HT;
  91. if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  92. phy = MT_PHY_TYPE_HT_GF;
  93. if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
  94. bw = 1;
  95. } else {
  96. const struct ieee80211_rate *r;
  97. int band = dev->chandef.chan->band;
  98. u16 val;
  99. r = &dev->hw->wiphy->bands[band]->bitrates[rate->idx];
  100. if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  101. val = r->hw_value_short;
  102. else
  103. val = r->hw_value;
  104. phy = val >> 8;
  105. rate_idx = val & 0xff;
  106. bw = 0;
  107. }
  108. rateval = MT76_SET(MT_RXWI_RATE_MCS, rate_idx);
  109. rateval |= MT76_SET(MT_RXWI_RATE_PHY, phy);
  110. rateval |= MT76_SET(MT_RXWI_RATE_BW, bw);
  111. if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
  112. rateval |= MT_RXWI_RATE_SGI;
  113. *nss_val = nss;
  114. return rateval;
  115. }
  116. void mt76_mac_wcid_set_rate(struct mt7601u_dev *dev, struct mt76_wcid *wcid,
  117. const struct ieee80211_tx_rate *rate)
  118. {
  119. unsigned long flags;
  120. spin_lock_irqsave(&dev->lock, flags);
  121. wcid->tx_rate = mt76_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);
  122. wcid->tx_rate_set = true;
  123. spin_unlock_irqrestore(&dev->lock, flags);
  124. }
  125. struct mt76_tx_status mt7601u_mac_fetch_tx_status(struct mt7601u_dev *dev)
  126. {
  127. struct mt76_tx_status stat = {};
  128. u32 val;
  129. val = mt7601u_rr(dev, MT_TX_STAT_FIFO);
  130. stat.valid = !!(val & MT_TX_STAT_FIFO_VALID);
  131. stat.success = !!(val & MT_TX_STAT_FIFO_SUCCESS);
  132. stat.aggr = !!(val & MT_TX_STAT_FIFO_AGGR);
  133. stat.ack_req = !!(val & MT_TX_STAT_FIFO_ACKREQ);
  134. stat.pktid = MT76_GET(MT_TX_STAT_FIFO_PID_TYPE, val);
  135. stat.wcid = MT76_GET(MT_TX_STAT_FIFO_WCID, val);
  136. stat.rate = MT76_GET(MT_TX_STAT_FIFO_RATE, val);
  137. return stat;
  138. }
  139. void mt76_send_tx_status(struct mt7601u_dev *dev, struct mt76_tx_status *stat)
  140. {
  141. struct ieee80211_tx_info info = {};
  142. struct ieee80211_sta *sta = NULL;
  143. struct mt76_wcid *wcid = NULL;
  144. void *msta;
  145. rcu_read_lock();
  146. if (stat->wcid < ARRAY_SIZE(dev->wcid))
  147. wcid = rcu_dereference(dev->wcid[stat->wcid]);
  148. if (wcid) {
  149. msta = container_of(wcid, struct mt76_sta, wcid);
  150. sta = container_of(msta, struct ieee80211_sta,
  151. drv_priv);
  152. }
  153. mt76_mac_fill_tx_status(dev, &info, stat);
  154. ieee80211_tx_status_noskb(dev->hw, sta, &info);
  155. rcu_read_unlock();
  156. }
  157. void mt7601u_mac_set_protection(struct mt7601u_dev *dev, bool legacy_prot,
  158. int ht_mode)
  159. {
  160. int mode = ht_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  161. bool non_gf = !!(ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  162. u32 prot[6];
  163. bool ht_rts[4] = {};
  164. int i;
  165. prot[0] = MT_PROT_NAV_SHORT |
  166. MT_PROT_TXOP_ALLOW_ALL |
  167. MT_PROT_RTS_THR_EN;
  168. prot[1] = prot[0];
  169. if (legacy_prot)
  170. prot[1] |= MT_PROT_CTRL_CTS2SELF;
  171. prot[2] = prot[4] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_BW20;
  172. prot[3] = prot[5] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_ALL;
  173. if (legacy_prot) {
  174. prot[2] |= MT_PROT_RATE_CCK_11;
  175. prot[3] |= MT_PROT_RATE_CCK_11;
  176. prot[4] |= MT_PROT_RATE_CCK_11;
  177. prot[5] |= MT_PROT_RATE_CCK_11;
  178. } else {
  179. prot[2] |= MT_PROT_RATE_OFDM_24;
  180. prot[3] |= MT_PROT_RATE_DUP_OFDM_24;
  181. prot[4] |= MT_PROT_RATE_OFDM_24;
  182. prot[5] |= MT_PROT_RATE_DUP_OFDM_24;
  183. }
  184. switch (mode) {
  185. case IEEE80211_HT_OP_MODE_PROTECTION_NONE:
  186. break;
  187. case IEEE80211_HT_OP_MODE_PROTECTION_NONMEMBER:
  188. ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true;
  189. break;
  190. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  191. ht_rts[1] = ht_rts[3] = true;
  192. break;
  193. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  194. ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true;
  195. break;
  196. }
  197. if (non_gf)
  198. ht_rts[2] = ht_rts[3] = true;
  199. for (i = 0; i < 4; i++)
  200. if (ht_rts[i])
  201. prot[i + 2] |= MT_PROT_CTRL_RTS_CTS;
  202. for (i = 0; i < 6; i++)
  203. mt7601u_wr(dev, MT_CCK_PROT_CFG + i * 4, prot[i]);
  204. }
  205. void mt7601u_mac_set_short_preamble(struct mt7601u_dev *dev, bool short_preamb)
  206. {
  207. if (short_preamb)
  208. mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
  209. else
  210. mt76_clear(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
  211. }
  212. void mt7601u_mac_config_tsf(struct mt7601u_dev *dev, bool enable, int interval)
  213. {
  214. u32 val = mt7601u_rr(dev, MT_BEACON_TIME_CFG);
  215. val &= ~(MT_BEACON_TIME_CFG_TIMER_EN |
  216. MT_BEACON_TIME_CFG_SYNC_MODE |
  217. MT_BEACON_TIME_CFG_TBTT_EN);
  218. if (!enable) {
  219. mt7601u_wr(dev, MT_BEACON_TIME_CFG, val);
  220. return;
  221. }
  222. val &= ~MT_BEACON_TIME_CFG_INTVAL;
  223. val |= MT76_SET(MT_BEACON_TIME_CFG_INTVAL, interval << 4) |
  224. MT_BEACON_TIME_CFG_TIMER_EN |
  225. MT_BEACON_TIME_CFG_SYNC_MODE |
  226. MT_BEACON_TIME_CFG_TBTT_EN;
  227. }
  228. static void mt7601u_check_mac_err(struct mt7601u_dev *dev)
  229. {
  230. u32 val = mt7601u_rr(dev, 0x10f4);
  231. if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5))))
  232. return;
  233. dev_err(dev->dev, "Error: MAC specific condition occurred\n");
  234. mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
  235. udelay(10);
  236. mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
  237. }
  238. void mt7601u_mac_work(struct work_struct *work)
  239. {
  240. struct mt7601u_dev *dev = container_of(work, struct mt7601u_dev,
  241. mac_work.work);
  242. struct {
  243. u32 addr_base;
  244. u32 span;
  245. u64 *stat_base;
  246. } spans[] = {
  247. { MT_RX_STA_CNT0, 3, dev->stats.rx_stat },
  248. { MT_TX_STA_CNT0, 3, dev->stats.tx_stat },
  249. { MT_TX_AGG_STAT, 1, dev->stats.aggr_stat },
  250. { MT_MPDU_DENSITY_CNT, 1, dev->stats.zero_len_del },
  251. { MT_TX_AGG_CNT_BASE0, 8, &dev->stats.aggr_n[0] },
  252. { MT_TX_AGG_CNT_BASE1, 8, &dev->stats.aggr_n[16] },
  253. };
  254. u32 sum, n;
  255. int i, j, k;
  256. /* Note: using MCU_RANDOM_READ is actually slower then reading all the
  257. * registers by hand. MCU takes ca. 20ms to complete read of 24
  258. * registers while reading them one by one will takes roughly
  259. * 24*200us =~ 5ms.
  260. */
  261. k = 0;
  262. n = 0;
  263. sum = 0;
  264. for (i = 0; i < ARRAY_SIZE(spans); i++)
  265. for (j = 0; j < spans[i].span; j++) {
  266. u32 val = mt7601u_rr(dev, spans[i].addr_base + j * 4);
  267. spans[i].stat_base[j * 2] += val & 0xffff;
  268. spans[i].stat_base[j * 2 + 1] += val >> 16;
  269. /* Calculate average AMPDU length */
  270. if (spans[i].addr_base != MT_TX_AGG_CNT_BASE0 &&
  271. spans[i].addr_base != MT_TX_AGG_CNT_BASE1)
  272. continue;
  273. n += (val >> 16) + (val & 0xffff);
  274. sum += (val & 0xffff) * (1 + k * 2) +
  275. (val >> 16) * (2 + k * 2);
  276. k++;
  277. }
  278. atomic_set(&dev->avg_ampdu_len, n ? DIV_ROUND_CLOSEST(sum, n) : 1);
  279. mt7601u_check_mac_err(dev);
  280. ieee80211_queue_delayed_work(dev->hw, &dev->mac_work, 10 * HZ);
  281. }
  282. void
  283. mt7601u_mac_wcid_setup(struct mt7601u_dev *dev, u8 idx, u8 vif_idx, u8 *mac)
  284. {
  285. u8 zmac[ETH_ALEN] = {};
  286. u32 attr;
  287. attr = MT76_SET(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) |
  288. MT76_SET(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8));
  289. mt76_wr(dev, MT_WCID_ATTR(idx), attr);
  290. if (mac)
  291. memcpy(zmac, mac, sizeof(zmac));
  292. mt7601u_addr_wr(dev, MT_WCID_ADDR(idx), zmac);
  293. }
  294. void mt7601u_mac_set_ampdu_factor(struct mt7601u_dev *dev)
  295. {
  296. struct ieee80211_sta *sta;
  297. struct mt76_wcid *wcid;
  298. void *msta;
  299. u8 min_factor = 3;
  300. int i;
  301. rcu_read_lock();
  302. for (i = 0; i < ARRAY_SIZE(dev->wcid); i++) {
  303. wcid = rcu_dereference(dev->wcid[i]);
  304. if (!wcid)
  305. continue;
  306. msta = container_of(wcid, struct mt76_sta, wcid);
  307. sta = container_of(msta, struct ieee80211_sta, drv_priv);
  308. min_factor = min(min_factor, sta->ht_cap.ampdu_factor);
  309. }
  310. rcu_read_unlock();
  311. mt7601u_wr(dev, MT_MAX_LEN_CFG, 0xa0fff |
  312. MT76_SET(MT_MAX_LEN_CFG_AMPDU, min_factor));
  313. }
  314. static void
  315. mt76_mac_process_rate(struct ieee80211_rx_status *status, u16 rate)
  316. {
  317. u8 idx = MT76_GET(MT_RXWI_RATE_MCS, rate);
  318. switch (MT76_GET(MT_RXWI_RATE_PHY, rate)) {
  319. case MT_PHY_TYPE_OFDM:
  320. if (WARN_ON(idx >= 8))
  321. idx = 0;
  322. idx += 4;
  323. status->rate_idx = idx;
  324. return;
  325. case MT_PHY_TYPE_CCK:
  326. if (idx >= 8) {
  327. idx -= 8;
  328. status->flag |= RX_FLAG_SHORTPRE;
  329. }
  330. if (WARN_ON(idx >= 4))
  331. idx = 0;
  332. status->rate_idx = idx;
  333. return;
  334. case MT_PHY_TYPE_HT_GF:
  335. status->flag |= RX_FLAG_HT_GF;
  336. /* fall through */
  337. case MT_PHY_TYPE_HT:
  338. status->flag |= RX_FLAG_HT;
  339. status->rate_idx = idx;
  340. break;
  341. default:
  342. WARN_ON(1);
  343. return;
  344. }
  345. if (rate & MT_RXWI_RATE_SGI)
  346. status->flag |= RX_FLAG_SHORT_GI;
  347. if (rate & MT_RXWI_RATE_STBC)
  348. status->flag |= 1 << RX_FLAG_STBC_SHIFT;
  349. if (rate & MT_RXWI_RATE_BW)
  350. status->flag |= RX_FLAG_40MHZ;
  351. }
  352. static void
  353. mt7601u_rx_monitor_beacon(struct mt7601u_dev *dev, struct mt7601u_rxwi *rxwi,
  354. u16 rate, int rssi)
  355. {
  356. dev->bcn_freq_off = rxwi->freq_off;
  357. dev->bcn_phy_mode = MT76_GET(MT_RXWI_RATE_PHY, rate);
  358. dev->avg_rssi = (dev->avg_rssi * 15) / 16 + (rssi << 8);
  359. }
  360. static int
  361. mt7601u_rx_is_our_beacon(struct mt7601u_dev *dev, u8 *data)
  362. {
  363. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)data;
  364. return ieee80211_is_beacon(hdr->frame_control) &&
  365. ether_addr_equal(hdr->addr2, dev->ap_bssid);
  366. }
  367. u32 mt76_mac_process_rx(struct mt7601u_dev *dev, struct sk_buff *skb,
  368. u8 *data, void *rxi)
  369. {
  370. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  371. struct mt7601u_rxwi *rxwi = rxi;
  372. u32 len, ctl = le32_to_cpu(rxwi->ctl);
  373. u16 rate = le16_to_cpu(rxwi->rate);
  374. int rssi;
  375. len = MT76_GET(MT_RXWI_CTL_MPDU_LEN, ctl);
  376. if (len < 10)
  377. return 0;
  378. if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_DECRYPT)) {
  379. status->flag |= RX_FLAG_DECRYPTED;
  380. status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
  381. }
  382. status->chains = BIT(0);
  383. rssi = mt7601u_phy_get_rssi(dev, rxwi, rate);
  384. status->chain_signal[0] = status->signal = rssi;
  385. status->freq = dev->chandef.chan->center_freq;
  386. status->band = dev->chandef.chan->band;
  387. mt76_mac_process_rate(status, rate);
  388. spin_lock_bh(&dev->con_mon_lock);
  389. if (mt7601u_rx_is_our_beacon(dev, data))
  390. mt7601u_rx_monitor_beacon(dev, rxwi, rate, rssi);
  391. else if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_U2M))
  392. dev->avg_rssi = (dev->avg_rssi * 15) / 16 + (rssi << 8);
  393. spin_unlock_bh(&dev->con_mon_lock);
  394. return len;
  395. }
  396. static enum mt76_cipher_type
  397. mt76_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data)
  398. {
  399. memset(key_data, 0, 32);
  400. if (!key)
  401. return MT_CIPHER_NONE;
  402. if (key->keylen > 32)
  403. return MT_CIPHER_NONE;
  404. memcpy(key_data, key->key, key->keylen);
  405. switch (key->cipher) {
  406. case WLAN_CIPHER_SUITE_WEP40:
  407. return MT_CIPHER_WEP40;
  408. case WLAN_CIPHER_SUITE_WEP104:
  409. return MT_CIPHER_WEP104;
  410. case WLAN_CIPHER_SUITE_TKIP:
  411. return MT_CIPHER_TKIP;
  412. case WLAN_CIPHER_SUITE_CCMP:
  413. return MT_CIPHER_AES_CCMP;
  414. default:
  415. return MT_CIPHER_NONE;
  416. }
  417. }
  418. int mt76_mac_wcid_set_key(struct mt7601u_dev *dev, u8 idx,
  419. struct ieee80211_key_conf *key)
  420. {
  421. enum mt76_cipher_type cipher;
  422. u8 key_data[32];
  423. u8 iv_data[8];
  424. u32 val;
  425. cipher = mt76_mac_get_key_info(key, key_data);
  426. if (cipher == MT_CIPHER_NONE && key)
  427. return -EINVAL;
  428. trace_set_key(dev, idx);
  429. mt7601u_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data));
  430. memset(iv_data, 0, sizeof(iv_data));
  431. if (key) {
  432. iv_data[3] = key->keyidx << 6;
  433. if (cipher >= MT_CIPHER_TKIP) {
  434. /* Note: start with 1 to comply with spec,
  435. * (see comment on common/cmm_wpa.c:4291).
  436. */
  437. iv_data[0] |= 1;
  438. iv_data[3] |= 0x20;
  439. }
  440. }
  441. mt7601u_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data));
  442. val = mt7601u_rr(dev, MT_WCID_ATTR(idx));
  443. val &= ~MT_WCID_ATTR_PKEY_MODE & ~MT_WCID_ATTR_PKEY_MODE_EXT;
  444. val |= MT76_SET(MT_WCID_ATTR_PKEY_MODE, cipher & 7) |
  445. MT76_SET(MT_WCID_ATTR_PKEY_MODE_EXT, cipher >> 3);
  446. val &= ~MT_WCID_ATTR_PAIRWISE;
  447. val |= MT_WCID_ATTR_PAIRWISE *
  448. !!(key && key->flags & IEEE80211_KEY_FLAG_PAIRWISE);
  449. mt7601u_wr(dev, MT_WCID_ATTR(idx), val);
  450. return 0;
  451. }
  452. int mt76_mac_shared_key_setup(struct mt7601u_dev *dev, u8 vif_idx, u8 key_idx,
  453. struct ieee80211_key_conf *key)
  454. {
  455. enum mt76_cipher_type cipher;
  456. u8 key_data[32];
  457. u32 val;
  458. cipher = mt76_mac_get_key_info(key, key_data);
  459. if (cipher == MT_CIPHER_NONE && key)
  460. return -EINVAL;
  461. trace_set_shared_key(dev, vif_idx, key_idx);
  462. mt7601u_wr_copy(dev, MT_SKEY(vif_idx, key_idx),
  463. key_data, sizeof(key_data));
  464. val = mt76_rr(dev, MT_SKEY_MODE(vif_idx));
  465. val &= ~(MT_SKEY_MODE_MASK << MT_SKEY_MODE_SHIFT(vif_idx, key_idx));
  466. val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx);
  467. mt76_wr(dev, MT_SKEY_MODE(vif_idx), val);
  468. return 0;
  469. }