htt_rx.c 56 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include "mac.h"
  24. #include <linux/log2.h>
  25. #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
  26. #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
  27. /* when under memory pressure rx ring refill may fail and needs a retry */
  28. #define HTT_RX_RING_REFILL_RETRY_MS 50
  29. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  30. static void ath10k_htt_txrx_compl_task(unsigned long ptr);
  31. static struct sk_buff *
  32. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
  33. {
  34. struct ath10k_skb_rxcb *rxcb;
  35. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  36. if (rxcb->paddr == paddr)
  37. return ATH10K_RXCB_SKB(rxcb);
  38. WARN_ON_ONCE(1);
  39. return NULL;
  40. }
  41. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  42. {
  43. struct sk_buff *skb;
  44. struct ath10k_skb_rxcb *rxcb;
  45. struct hlist_node *n;
  46. int i;
  47. if (htt->rx_ring.in_ord_rx) {
  48. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  49. skb = ATH10K_RXCB_SKB(rxcb);
  50. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  51. skb->len + skb_tailroom(skb),
  52. DMA_FROM_DEVICE);
  53. hash_del(&rxcb->hlist);
  54. dev_kfree_skb_any(skb);
  55. }
  56. } else {
  57. for (i = 0; i < htt->rx_ring.size; i++) {
  58. skb = htt->rx_ring.netbufs_ring[i];
  59. if (!skb)
  60. continue;
  61. rxcb = ATH10K_SKB_RXCB(skb);
  62. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  63. skb->len + skb_tailroom(skb),
  64. DMA_FROM_DEVICE);
  65. dev_kfree_skb_any(skb);
  66. }
  67. }
  68. htt->rx_ring.fill_cnt = 0;
  69. hash_init(htt->rx_ring.skb_table);
  70. memset(htt->rx_ring.netbufs_ring, 0,
  71. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  72. }
  73. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  74. {
  75. struct htt_rx_desc *rx_desc;
  76. struct ath10k_skb_rxcb *rxcb;
  77. struct sk_buff *skb;
  78. dma_addr_t paddr;
  79. int ret = 0, idx;
  80. /* The Full Rx Reorder firmware has no way of telling the host
  81. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  82. * To keep things simple make sure ring is always half empty. This
  83. * guarantees there'll be no replenishment overruns possible.
  84. */
  85. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  86. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  87. while (num > 0) {
  88. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  89. if (!skb) {
  90. ret = -ENOMEM;
  91. goto fail;
  92. }
  93. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  94. skb_pull(skb,
  95. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  96. skb->data);
  97. /* Clear rx_desc attention word before posting to Rx ring */
  98. rx_desc = (struct htt_rx_desc *)skb->data;
  99. rx_desc->attention.flags = __cpu_to_le32(0);
  100. paddr = dma_map_single(htt->ar->dev, skb->data,
  101. skb->len + skb_tailroom(skb),
  102. DMA_FROM_DEVICE);
  103. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  104. dev_kfree_skb_any(skb);
  105. ret = -ENOMEM;
  106. goto fail;
  107. }
  108. rxcb = ATH10K_SKB_RXCB(skb);
  109. rxcb->paddr = paddr;
  110. htt->rx_ring.netbufs_ring[idx] = skb;
  111. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  112. htt->rx_ring.fill_cnt++;
  113. if (htt->rx_ring.in_ord_rx) {
  114. hash_add(htt->rx_ring.skb_table,
  115. &ATH10K_SKB_RXCB(skb)->hlist,
  116. (u32)paddr);
  117. }
  118. num--;
  119. idx++;
  120. idx &= htt->rx_ring.size_mask;
  121. }
  122. fail:
  123. /*
  124. * Make sure the rx buffer is updated before available buffer
  125. * index to avoid any potential rx ring corruption.
  126. */
  127. mb();
  128. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  129. return ret;
  130. }
  131. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  132. {
  133. lockdep_assert_held(&htt->rx_ring.lock);
  134. return __ath10k_htt_rx_ring_fill_n(htt, num);
  135. }
  136. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  137. {
  138. int ret, num_deficit, num_to_fill;
  139. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  140. * reason is RX may take up significant amount of CPU cycles and starve
  141. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  142. * with ath10k wlan interface. This ended up with very poor performance
  143. * once CPU the host system was overwhelmed with RX on ath10k.
  144. *
  145. * By limiting the number of refills the replenishing occurs
  146. * progressively. This in turns makes use of the fact tasklets are
  147. * processed in FIFO order. This means actual RX processing can starve
  148. * out refilling. If there's not enough buffers on RX ring FW will not
  149. * report RX until it is refilled with enough buffers. This
  150. * automatically balances load wrt to CPU power.
  151. *
  152. * This probably comes at a cost of lower maximum throughput but
  153. * improves the average and stability. */
  154. spin_lock_bh(&htt->rx_ring.lock);
  155. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  156. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  157. num_deficit -= num_to_fill;
  158. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  159. if (ret == -ENOMEM) {
  160. /*
  161. * Failed to fill it to the desired level -
  162. * we'll start a timer and try again next time.
  163. * As long as enough buffers are left in the ring for
  164. * another A-MPDU rx, no special recovery is needed.
  165. */
  166. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  167. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  168. } else if (num_deficit > 0) {
  169. tasklet_schedule(&htt->rx_replenish_task);
  170. }
  171. spin_unlock_bh(&htt->rx_ring.lock);
  172. }
  173. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  174. {
  175. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  176. ath10k_htt_rx_msdu_buff_replenish(htt);
  177. }
  178. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  179. {
  180. struct ath10k_htt *htt = &ar->htt;
  181. int ret;
  182. spin_lock_bh(&htt->rx_ring.lock);
  183. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  184. htt->rx_ring.fill_cnt));
  185. spin_unlock_bh(&htt->rx_ring.lock);
  186. if (ret)
  187. ath10k_htt_rx_ring_free(htt);
  188. return ret;
  189. }
  190. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  191. {
  192. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  193. tasklet_kill(&htt->rx_replenish_task);
  194. tasklet_kill(&htt->txrx_compl_task);
  195. skb_queue_purge(&htt->tx_compl_q);
  196. skb_queue_purge(&htt->rx_compl_q);
  197. skb_queue_purge(&htt->rx_in_ord_compl_q);
  198. ath10k_htt_rx_ring_free(htt);
  199. dma_free_coherent(htt->ar->dev,
  200. (htt->rx_ring.size *
  201. sizeof(htt->rx_ring.paddrs_ring)),
  202. htt->rx_ring.paddrs_ring,
  203. htt->rx_ring.base_paddr);
  204. dma_free_coherent(htt->ar->dev,
  205. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  206. htt->rx_ring.alloc_idx.vaddr,
  207. htt->rx_ring.alloc_idx.paddr);
  208. kfree(htt->rx_ring.netbufs_ring);
  209. }
  210. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  211. {
  212. struct ath10k *ar = htt->ar;
  213. int idx;
  214. struct sk_buff *msdu;
  215. lockdep_assert_held(&htt->rx_ring.lock);
  216. if (htt->rx_ring.fill_cnt == 0) {
  217. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  218. return NULL;
  219. }
  220. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  221. msdu = htt->rx_ring.netbufs_ring[idx];
  222. htt->rx_ring.netbufs_ring[idx] = NULL;
  223. htt->rx_ring.paddrs_ring[idx] = 0;
  224. idx++;
  225. idx &= htt->rx_ring.size_mask;
  226. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  227. htt->rx_ring.fill_cnt--;
  228. dma_unmap_single(htt->ar->dev,
  229. ATH10K_SKB_RXCB(msdu)->paddr,
  230. msdu->len + skb_tailroom(msdu),
  231. DMA_FROM_DEVICE);
  232. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  233. msdu->data, msdu->len + skb_tailroom(msdu));
  234. return msdu;
  235. }
  236. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  237. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  238. u8 **fw_desc, int *fw_desc_len,
  239. struct sk_buff_head *amsdu)
  240. {
  241. struct ath10k *ar = htt->ar;
  242. int msdu_len, msdu_chaining = 0;
  243. struct sk_buff *msdu;
  244. struct htt_rx_desc *rx_desc;
  245. lockdep_assert_held(&htt->rx_ring.lock);
  246. for (;;) {
  247. int last_msdu, msdu_len_invalid, msdu_chained;
  248. msdu = ath10k_htt_rx_netbuf_pop(htt);
  249. if (!msdu) {
  250. __skb_queue_purge(amsdu);
  251. return -ENOENT;
  252. }
  253. __skb_queue_tail(amsdu, msdu);
  254. rx_desc = (struct htt_rx_desc *)msdu->data;
  255. /* FIXME: we must report msdu payload since this is what caller
  256. * expects now */
  257. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  258. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  259. /*
  260. * Sanity check - confirm the HW is finished filling in the
  261. * rx data.
  262. * If the HW and SW are working correctly, then it's guaranteed
  263. * that the HW's MAC DMA is done before this point in the SW.
  264. * To prevent the case that we handle a stale Rx descriptor,
  265. * just assert for now until we have a way to recover.
  266. */
  267. if (!(__le32_to_cpu(rx_desc->attention.flags)
  268. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  269. __skb_queue_purge(amsdu);
  270. return -EIO;
  271. }
  272. /*
  273. * Copy the FW rx descriptor for this MSDU from the rx
  274. * indication message into the MSDU's netbuf. HL uses the
  275. * same rx indication message definition as LL, and simply
  276. * appends new info (fields from the HW rx desc, and the
  277. * MSDU payload itself). So, the offset into the rx
  278. * indication message only has to account for the standard
  279. * offset of the per-MSDU FW rx desc info within the
  280. * message, and how many bytes of the per-MSDU FW rx desc
  281. * info have already been consumed. (And the endianness of
  282. * the host, since for a big-endian host, the rx ind
  283. * message contents, including the per-MSDU rx desc bytes,
  284. * were byteswapped during upload.)
  285. */
  286. if (*fw_desc_len > 0) {
  287. rx_desc->fw_desc.info0 = **fw_desc;
  288. /*
  289. * The target is expected to only provide the basic
  290. * per-MSDU rx descriptors. Just to be sure, verify
  291. * that the target has not attached extension data
  292. * (e.g. LRO flow ID).
  293. */
  294. /* or more, if there's extension data */
  295. (*fw_desc)++;
  296. (*fw_desc_len)--;
  297. } else {
  298. /*
  299. * When an oversized AMSDU happened, FW will lost
  300. * some of MSDU status - in this case, the FW
  301. * descriptors provided will be less than the
  302. * actual MSDUs inside this MPDU. Mark the FW
  303. * descriptors so that it will still deliver to
  304. * upper stack, if no CRC error for this MPDU.
  305. *
  306. * FIX THIS - the FW descriptors are actually for
  307. * MSDUs in the end of this A-MSDU instead of the
  308. * beginning.
  309. */
  310. rx_desc->fw_desc.info0 = 0;
  311. }
  312. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  313. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  314. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  315. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
  316. RX_MSDU_START_INFO0_MSDU_LENGTH);
  317. msdu_chained = rx_desc->frag_info.ring2_more_count;
  318. if (msdu_len_invalid)
  319. msdu_len = 0;
  320. skb_trim(msdu, 0);
  321. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  322. msdu_len -= msdu->len;
  323. /* Note: Chained buffers do not contain rx descriptor */
  324. while (msdu_chained--) {
  325. msdu = ath10k_htt_rx_netbuf_pop(htt);
  326. if (!msdu) {
  327. __skb_queue_purge(amsdu);
  328. return -ENOENT;
  329. }
  330. __skb_queue_tail(amsdu, msdu);
  331. skb_trim(msdu, 0);
  332. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  333. msdu_len -= msdu->len;
  334. msdu_chaining = 1;
  335. }
  336. last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
  337. RX_MSDU_END_INFO0_LAST_MSDU;
  338. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  339. sizeof(*rx_desc) - sizeof(u32));
  340. if (last_msdu)
  341. break;
  342. }
  343. if (skb_queue_empty(amsdu))
  344. msdu_chaining = -1;
  345. /*
  346. * Don't refill the ring yet.
  347. *
  348. * First, the elements popped here are still in use - it is not
  349. * safe to overwrite them until the matching call to
  350. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  351. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  352. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  353. * (something like 3 buffers). Consequently, we'll rely on the txrx
  354. * SW to tell us when it is done pulling all the PPDU's rx buffers
  355. * out of the rx ring, and then refill it just once.
  356. */
  357. return msdu_chaining;
  358. }
  359. static void ath10k_htt_rx_replenish_task(unsigned long ptr)
  360. {
  361. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  362. ath10k_htt_rx_msdu_buff_replenish(htt);
  363. }
  364. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  365. u32 paddr)
  366. {
  367. struct ath10k *ar = htt->ar;
  368. struct ath10k_skb_rxcb *rxcb;
  369. struct sk_buff *msdu;
  370. lockdep_assert_held(&htt->rx_ring.lock);
  371. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  372. if (!msdu)
  373. return NULL;
  374. rxcb = ATH10K_SKB_RXCB(msdu);
  375. hash_del(&rxcb->hlist);
  376. htt->rx_ring.fill_cnt--;
  377. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  378. msdu->len + skb_tailroom(msdu),
  379. DMA_FROM_DEVICE);
  380. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  381. msdu->data, msdu->len + skb_tailroom(msdu));
  382. return msdu;
  383. }
  384. static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
  385. struct htt_rx_in_ord_ind *ev,
  386. struct sk_buff_head *list)
  387. {
  388. struct ath10k *ar = htt->ar;
  389. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
  390. struct htt_rx_desc *rxd;
  391. struct sk_buff *msdu;
  392. int msdu_count;
  393. bool is_offload;
  394. u32 paddr;
  395. lockdep_assert_held(&htt->rx_ring.lock);
  396. msdu_count = __le16_to_cpu(ev->msdu_count);
  397. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  398. while (msdu_count--) {
  399. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  400. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  401. if (!msdu) {
  402. __skb_queue_purge(list);
  403. return -ENOENT;
  404. }
  405. __skb_queue_tail(list, msdu);
  406. if (!is_offload) {
  407. rxd = (void *)msdu->data;
  408. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  409. skb_put(msdu, sizeof(*rxd));
  410. skb_pull(msdu, sizeof(*rxd));
  411. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  412. if (!(__le32_to_cpu(rxd->attention.flags) &
  413. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  414. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  415. return -EIO;
  416. }
  417. }
  418. msdu_desc++;
  419. }
  420. return 0;
  421. }
  422. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  423. {
  424. struct ath10k *ar = htt->ar;
  425. dma_addr_t paddr;
  426. void *vaddr;
  427. size_t size;
  428. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  429. htt->rx_confused = false;
  430. /* XXX: The fill level could be changed during runtime in response to
  431. * the host processing latency. Is this really worth it?
  432. */
  433. htt->rx_ring.size = HTT_RX_RING_SIZE;
  434. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  435. htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
  436. if (!is_power_of_2(htt->rx_ring.size)) {
  437. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  438. return -EINVAL;
  439. }
  440. htt->rx_ring.netbufs_ring =
  441. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  442. GFP_KERNEL);
  443. if (!htt->rx_ring.netbufs_ring)
  444. goto err_netbuf;
  445. size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
  446. vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
  447. if (!vaddr)
  448. goto err_dma_ring;
  449. htt->rx_ring.paddrs_ring = vaddr;
  450. htt->rx_ring.base_paddr = paddr;
  451. vaddr = dma_alloc_coherent(htt->ar->dev,
  452. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  453. &paddr, GFP_DMA);
  454. if (!vaddr)
  455. goto err_dma_idx;
  456. htt->rx_ring.alloc_idx.vaddr = vaddr;
  457. htt->rx_ring.alloc_idx.paddr = paddr;
  458. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  459. *htt->rx_ring.alloc_idx.vaddr = 0;
  460. /* Initialize the Rx refill retry timer */
  461. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  462. spin_lock_init(&htt->rx_ring.lock);
  463. htt->rx_ring.fill_cnt = 0;
  464. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  465. hash_init(htt->rx_ring.skb_table);
  466. tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
  467. (unsigned long)htt);
  468. skb_queue_head_init(&htt->tx_compl_q);
  469. skb_queue_head_init(&htt->rx_compl_q);
  470. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  471. tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
  472. (unsigned long)htt);
  473. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  474. htt->rx_ring.size, htt->rx_ring.fill_level);
  475. return 0;
  476. err_dma_idx:
  477. dma_free_coherent(htt->ar->dev,
  478. (htt->rx_ring.size *
  479. sizeof(htt->rx_ring.paddrs_ring)),
  480. htt->rx_ring.paddrs_ring,
  481. htt->rx_ring.base_paddr);
  482. err_dma_ring:
  483. kfree(htt->rx_ring.netbufs_ring);
  484. err_netbuf:
  485. return -ENOMEM;
  486. }
  487. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  488. enum htt_rx_mpdu_encrypt_type type)
  489. {
  490. switch (type) {
  491. case HTT_RX_MPDU_ENCRYPT_NONE:
  492. return 0;
  493. case HTT_RX_MPDU_ENCRYPT_WEP40:
  494. case HTT_RX_MPDU_ENCRYPT_WEP104:
  495. return IEEE80211_WEP_IV_LEN;
  496. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  497. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  498. return IEEE80211_TKIP_IV_LEN;
  499. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  500. return IEEE80211_CCMP_HDR_LEN;
  501. case HTT_RX_MPDU_ENCRYPT_WEP128:
  502. case HTT_RX_MPDU_ENCRYPT_WAPI:
  503. break;
  504. }
  505. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  506. return 0;
  507. }
  508. #define MICHAEL_MIC_LEN 8
  509. static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
  510. enum htt_rx_mpdu_encrypt_type type)
  511. {
  512. switch (type) {
  513. case HTT_RX_MPDU_ENCRYPT_NONE:
  514. return 0;
  515. case HTT_RX_MPDU_ENCRYPT_WEP40:
  516. case HTT_RX_MPDU_ENCRYPT_WEP104:
  517. return IEEE80211_WEP_ICV_LEN;
  518. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  519. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  520. return IEEE80211_TKIP_ICV_LEN;
  521. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  522. return IEEE80211_CCMP_MIC_LEN;
  523. case HTT_RX_MPDU_ENCRYPT_WEP128:
  524. case HTT_RX_MPDU_ENCRYPT_WAPI:
  525. break;
  526. }
  527. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  528. return 0;
  529. }
  530. struct amsdu_subframe_hdr {
  531. u8 dst[ETH_ALEN];
  532. u8 src[ETH_ALEN];
  533. __be16 len;
  534. } __packed;
  535. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  536. struct ieee80211_rx_status *status,
  537. struct htt_rx_desc *rxd)
  538. {
  539. struct ieee80211_supported_band *sband;
  540. u8 cck, rate, bw, sgi, mcs, nss;
  541. u8 preamble = 0;
  542. u32 info1, info2, info3;
  543. info1 = __le32_to_cpu(rxd->ppdu_start.info1);
  544. info2 = __le32_to_cpu(rxd->ppdu_start.info2);
  545. info3 = __le32_to_cpu(rxd->ppdu_start.info3);
  546. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  547. switch (preamble) {
  548. case HTT_RX_LEGACY:
  549. /* To get legacy rate index band is required. Since band can't
  550. * be undefined check if freq is non-zero.
  551. */
  552. if (!status->freq)
  553. return;
  554. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  555. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  556. rate &= ~RX_PPDU_START_RATE_FLAG;
  557. sband = &ar->mac.sbands[status->band];
  558. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate);
  559. break;
  560. case HTT_RX_HT:
  561. case HTT_RX_HT_WITH_TXBF:
  562. /* HT-SIG - Table 20-11 in info2 and info3 */
  563. mcs = info2 & 0x1F;
  564. nss = mcs >> 3;
  565. bw = (info2 >> 7) & 1;
  566. sgi = (info3 >> 7) & 1;
  567. status->rate_idx = mcs;
  568. status->flag |= RX_FLAG_HT;
  569. if (sgi)
  570. status->flag |= RX_FLAG_SHORT_GI;
  571. if (bw)
  572. status->flag |= RX_FLAG_40MHZ;
  573. break;
  574. case HTT_RX_VHT:
  575. case HTT_RX_VHT_WITH_TXBF:
  576. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  577. TODO check this */
  578. mcs = (info3 >> 4) & 0x0F;
  579. nss = ((info2 >> 10) & 0x07) + 1;
  580. bw = info2 & 3;
  581. sgi = info3 & 1;
  582. status->rate_idx = mcs;
  583. status->vht_nss = nss;
  584. if (sgi)
  585. status->flag |= RX_FLAG_SHORT_GI;
  586. switch (bw) {
  587. /* 20MHZ */
  588. case 0:
  589. break;
  590. /* 40MHZ */
  591. case 1:
  592. status->flag |= RX_FLAG_40MHZ;
  593. break;
  594. /* 80MHZ */
  595. case 2:
  596. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  597. }
  598. status->flag |= RX_FLAG_VHT;
  599. break;
  600. default:
  601. break;
  602. }
  603. }
  604. static struct ieee80211_channel *
  605. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  606. {
  607. struct ath10k_peer *peer;
  608. struct ath10k_vif *arvif;
  609. struct cfg80211_chan_def def;
  610. u16 peer_id;
  611. lockdep_assert_held(&ar->data_lock);
  612. if (!rxd)
  613. return NULL;
  614. if (rxd->attention.flags &
  615. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  616. return NULL;
  617. if (!(rxd->msdu_end.info0 &
  618. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  619. return NULL;
  620. peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  621. RX_MPDU_START_INFO0_PEER_IDX);
  622. peer = ath10k_peer_find_by_id(ar, peer_id);
  623. if (!peer)
  624. return NULL;
  625. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  626. if (WARN_ON_ONCE(!arvif))
  627. return NULL;
  628. if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
  629. return NULL;
  630. return def.chan;
  631. }
  632. static struct ieee80211_channel *
  633. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  634. {
  635. struct ath10k_vif *arvif;
  636. struct cfg80211_chan_def def;
  637. lockdep_assert_held(&ar->data_lock);
  638. list_for_each_entry(arvif, &ar->arvifs, list) {
  639. if (arvif->vdev_id == vdev_id &&
  640. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  641. return def.chan;
  642. }
  643. return NULL;
  644. }
  645. static void
  646. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  647. struct ieee80211_chanctx_conf *conf,
  648. void *data)
  649. {
  650. struct cfg80211_chan_def *def = data;
  651. *def = conf->def;
  652. }
  653. static struct ieee80211_channel *
  654. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  655. {
  656. struct cfg80211_chan_def def = {};
  657. ieee80211_iter_chan_contexts_atomic(ar->hw,
  658. ath10k_htt_rx_h_any_chan_iter,
  659. &def);
  660. return def.chan;
  661. }
  662. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  663. struct ieee80211_rx_status *status,
  664. struct htt_rx_desc *rxd,
  665. u32 vdev_id)
  666. {
  667. struct ieee80211_channel *ch;
  668. spin_lock_bh(&ar->data_lock);
  669. ch = ar->scan_channel;
  670. if (!ch)
  671. ch = ar->rx_channel;
  672. if (!ch)
  673. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  674. if (!ch)
  675. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  676. if (!ch)
  677. ch = ath10k_htt_rx_h_any_channel(ar);
  678. spin_unlock_bh(&ar->data_lock);
  679. if (!ch)
  680. return false;
  681. status->band = ch->band;
  682. status->freq = ch->center_freq;
  683. return true;
  684. }
  685. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  686. struct ieee80211_rx_status *status,
  687. struct htt_rx_desc *rxd)
  688. {
  689. /* FIXME: Get real NF */
  690. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  691. rxd->ppdu_start.rssi_comb;
  692. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  693. }
  694. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  695. struct ieee80211_rx_status *status,
  696. struct htt_rx_desc *rxd)
  697. {
  698. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  699. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  700. * TSF. Is it worth holding frames until end of PPDU is known?
  701. *
  702. * FIXME: Can we get/compute 64bit TSF?
  703. */
  704. status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
  705. status->flag |= RX_FLAG_MACTIME_END;
  706. }
  707. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  708. struct sk_buff_head *amsdu,
  709. struct ieee80211_rx_status *status,
  710. u32 vdev_id)
  711. {
  712. struct sk_buff *first;
  713. struct htt_rx_desc *rxd;
  714. bool is_first_ppdu;
  715. bool is_last_ppdu;
  716. if (skb_queue_empty(amsdu))
  717. return;
  718. first = skb_peek(amsdu);
  719. rxd = (void *)first->data - sizeof(*rxd);
  720. is_first_ppdu = !!(rxd->attention.flags &
  721. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  722. is_last_ppdu = !!(rxd->attention.flags &
  723. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  724. if (is_first_ppdu) {
  725. /* New PPDU starts so clear out the old per-PPDU status. */
  726. status->freq = 0;
  727. status->rate_idx = 0;
  728. status->vht_nss = 0;
  729. status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
  730. status->flag &= ~(RX_FLAG_HT |
  731. RX_FLAG_VHT |
  732. RX_FLAG_SHORT_GI |
  733. RX_FLAG_40MHZ |
  734. RX_FLAG_MACTIME_END);
  735. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  736. ath10k_htt_rx_h_signal(ar, status, rxd);
  737. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  738. ath10k_htt_rx_h_rates(ar, status, rxd);
  739. }
  740. if (is_last_ppdu)
  741. ath10k_htt_rx_h_mactime(ar, status, rxd);
  742. }
  743. static const char * const tid_to_ac[] = {
  744. "BE",
  745. "BK",
  746. "BK",
  747. "BE",
  748. "VI",
  749. "VI",
  750. "VO",
  751. "VO",
  752. };
  753. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  754. {
  755. u8 *qc;
  756. int tid;
  757. if (!ieee80211_is_data_qos(hdr->frame_control))
  758. return "";
  759. qc = ieee80211_get_qos_ctl(hdr);
  760. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  761. if (tid < 8)
  762. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  763. else
  764. snprintf(out, size, "tid %d", tid);
  765. return out;
  766. }
  767. static void ath10k_process_rx(struct ath10k *ar,
  768. struct ieee80211_rx_status *rx_status,
  769. struct sk_buff *skb)
  770. {
  771. struct ieee80211_rx_status *status;
  772. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  773. char tid[32];
  774. status = IEEE80211_SKB_RXCB(skb);
  775. *status = *rx_status;
  776. ath10k_dbg(ar, ATH10K_DBG_DATA,
  777. "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
  778. skb,
  779. skb->len,
  780. ieee80211_get_SA(hdr),
  781. ath10k_get_tid(hdr, tid, sizeof(tid)),
  782. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  783. "mcast" : "ucast",
  784. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  785. status->flag == 0 ? "legacy" : "",
  786. status->flag & RX_FLAG_HT ? "ht" : "",
  787. status->flag & RX_FLAG_VHT ? "vht" : "",
  788. status->flag & RX_FLAG_40MHZ ? "40" : "",
  789. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  790. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  791. status->rate_idx,
  792. status->vht_nss,
  793. status->freq,
  794. status->band, status->flag,
  795. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  796. !!(status->flag & RX_FLAG_MMIC_ERROR),
  797. !!(status->flag & RX_FLAG_AMSDU_MORE));
  798. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  799. skb->data, skb->len);
  800. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  801. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  802. ieee80211_rx(ar->hw, skb);
  803. }
  804. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  805. struct ieee80211_hdr *hdr)
  806. {
  807. int len = ieee80211_hdrlen(hdr->frame_control);
  808. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  809. ar->fw_features))
  810. len = round_up(len, 4);
  811. return len;
  812. }
  813. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  814. struct sk_buff *msdu,
  815. struct ieee80211_rx_status *status,
  816. enum htt_rx_mpdu_encrypt_type enctype,
  817. bool is_decrypted)
  818. {
  819. struct ieee80211_hdr *hdr;
  820. struct htt_rx_desc *rxd;
  821. size_t hdr_len;
  822. size_t crypto_len;
  823. bool is_first;
  824. bool is_last;
  825. rxd = (void *)msdu->data - sizeof(*rxd);
  826. is_first = !!(rxd->msdu_end.info0 &
  827. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  828. is_last = !!(rxd->msdu_end.info0 &
  829. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  830. /* Delivered decapped frame:
  831. * [802.11 header]
  832. * [crypto param] <-- can be trimmed if !fcs_err &&
  833. * !decrypt_err && !peer_idx_invalid
  834. * [amsdu header] <-- only if A-MSDU
  835. * [rfc1042/llc]
  836. * [payload]
  837. * [FCS] <-- at end, needs to be trimmed
  838. */
  839. /* This probably shouldn't happen but warn just in case */
  840. if (unlikely(WARN_ON_ONCE(!is_first)))
  841. return;
  842. /* This probably shouldn't happen but warn just in case */
  843. if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
  844. return;
  845. skb_trim(msdu, msdu->len - FCS_LEN);
  846. /* In most cases this will be true for sniffed frames. It makes sense
  847. * to deliver them as-is without stripping the crypto param. This would
  848. * also make sense for software based decryption (which is not
  849. * implemented in ath10k).
  850. *
  851. * If there's no error then the frame is decrypted. At least that is
  852. * the case for frames that come in via fragmented rx indication.
  853. */
  854. if (!is_decrypted)
  855. return;
  856. /* The payload is decrypted so strip crypto params. Start from tail
  857. * since hdr is used to compute some stuff.
  858. */
  859. hdr = (void *)msdu->data;
  860. /* Tail */
  861. skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
  862. /* MMIC */
  863. if (!ieee80211_has_morefrags(hdr->frame_control) &&
  864. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  865. skb_trim(msdu, msdu->len - 8);
  866. /* Head */
  867. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  868. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  869. memmove((void *)msdu->data + crypto_len,
  870. (void *)msdu->data, hdr_len);
  871. skb_pull(msdu, crypto_len);
  872. }
  873. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  874. struct sk_buff *msdu,
  875. struct ieee80211_rx_status *status,
  876. const u8 first_hdr[64])
  877. {
  878. struct ieee80211_hdr *hdr;
  879. size_t hdr_len;
  880. u8 da[ETH_ALEN];
  881. u8 sa[ETH_ALEN];
  882. /* Delivered decapped frame:
  883. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  884. * [rfc1042/llc]
  885. *
  886. * Note: The nwifi header doesn't have QoS Control and is
  887. * (always?) a 3addr frame.
  888. *
  889. * Note2: There's no A-MSDU subframe header. Even if it's part
  890. * of an A-MSDU.
  891. */
  892. /* pull decapped header and copy SA & DA */
  893. hdr = (struct ieee80211_hdr *)msdu->data;
  894. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  895. ether_addr_copy(da, ieee80211_get_DA(hdr));
  896. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  897. skb_pull(msdu, hdr_len);
  898. /* push original 802.11 header */
  899. hdr = (struct ieee80211_hdr *)first_hdr;
  900. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  901. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  902. /* original 802.11 header has a different DA and in
  903. * case of 4addr it may also have different SA
  904. */
  905. hdr = (struct ieee80211_hdr *)msdu->data;
  906. ether_addr_copy(ieee80211_get_DA(hdr), da);
  907. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  908. }
  909. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  910. struct sk_buff *msdu,
  911. enum htt_rx_mpdu_encrypt_type enctype)
  912. {
  913. struct ieee80211_hdr *hdr;
  914. struct htt_rx_desc *rxd;
  915. size_t hdr_len, crypto_len;
  916. void *rfc1042;
  917. bool is_first, is_last, is_amsdu;
  918. rxd = (void *)msdu->data - sizeof(*rxd);
  919. hdr = (void *)rxd->rx_hdr_status;
  920. is_first = !!(rxd->msdu_end.info0 &
  921. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  922. is_last = !!(rxd->msdu_end.info0 &
  923. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  924. is_amsdu = !(is_first && is_last);
  925. rfc1042 = hdr;
  926. if (is_first) {
  927. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  928. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  929. rfc1042 += round_up(hdr_len, 4) +
  930. round_up(crypto_len, 4);
  931. }
  932. if (is_amsdu)
  933. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  934. return rfc1042;
  935. }
  936. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  937. struct sk_buff *msdu,
  938. struct ieee80211_rx_status *status,
  939. const u8 first_hdr[64],
  940. enum htt_rx_mpdu_encrypt_type enctype)
  941. {
  942. struct ieee80211_hdr *hdr;
  943. struct ethhdr *eth;
  944. size_t hdr_len;
  945. void *rfc1042;
  946. u8 da[ETH_ALEN];
  947. u8 sa[ETH_ALEN];
  948. /* Delivered decapped frame:
  949. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  950. * [payload]
  951. */
  952. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  953. if (WARN_ON_ONCE(!rfc1042))
  954. return;
  955. /* pull decapped header and copy SA & DA */
  956. eth = (struct ethhdr *)msdu->data;
  957. ether_addr_copy(da, eth->h_dest);
  958. ether_addr_copy(sa, eth->h_source);
  959. skb_pull(msdu, sizeof(struct ethhdr));
  960. /* push rfc1042/llc/snap */
  961. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  962. sizeof(struct rfc1042_hdr));
  963. /* push original 802.11 header */
  964. hdr = (struct ieee80211_hdr *)first_hdr;
  965. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  966. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  967. /* original 802.11 header has a different DA and in
  968. * case of 4addr it may also have different SA
  969. */
  970. hdr = (struct ieee80211_hdr *)msdu->data;
  971. ether_addr_copy(ieee80211_get_DA(hdr), da);
  972. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  973. }
  974. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  975. struct sk_buff *msdu,
  976. struct ieee80211_rx_status *status,
  977. const u8 first_hdr[64])
  978. {
  979. struct ieee80211_hdr *hdr;
  980. size_t hdr_len;
  981. /* Delivered decapped frame:
  982. * [amsdu header] <-- replaced with 802.11 hdr
  983. * [rfc1042/llc]
  984. * [payload]
  985. */
  986. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
  987. hdr = (struct ieee80211_hdr *)first_hdr;
  988. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  989. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  990. }
  991. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  992. struct sk_buff *msdu,
  993. struct ieee80211_rx_status *status,
  994. u8 first_hdr[64],
  995. enum htt_rx_mpdu_encrypt_type enctype,
  996. bool is_decrypted)
  997. {
  998. struct htt_rx_desc *rxd;
  999. enum rx_msdu_decap_format decap;
  1000. struct ieee80211_hdr *hdr;
  1001. /* First msdu's decapped header:
  1002. * [802.11 header] <-- padded to 4 bytes long
  1003. * [crypto param] <-- padded to 4 bytes long
  1004. * [amsdu header] <-- only if A-MSDU
  1005. * [rfc1042/llc]
  1006. *
  1007. * Other (2nd, 3rd, ..) msdu's decapped header:
  1008. * [amsdu header] <-- only if A-MSDU
  1009. * [rfc1042/llc]
  1010. */
  1011. rxd = (void *)msdu->data - sizeof(*rxd);
  1012. hdr = (void *)rxd->rx_hdr_status;
  1013. decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
  1014. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1015. switch (decap) {
  1016. case RX_MSDU_DECAP_RAW:
  1017. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1018. is_decrypted);
  1019. break;
  1020. case RX_MSDU_DECAP_NATIVE_WIFI:
  1021. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
  1022. break;
  1023. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1024. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1025. break;
  1026. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1027. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
  1028. break;
  1029. }
  1030. }
  1031. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  1032. {
  1033. struct htt_rx_desc *rxd;
  1034. u32 flags, info;
  1035. bool is_ip4, is_ip6;
  1036. bool is_tcp, is_udp;
  1037. bool ip_csum_ok, tcpudp_csum_ok;
  1038. rxd = (void *)skb->data - sizeof(*rxd);
  1039. flags = __le32_to_cpu(rxd->attention.flags);
  1040. info = __le32_to_cpu(rxd->msdu_start.info1);
  1041. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1042. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1043. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1044. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1045. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1046. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1047. if (!is_ip4 && !is_ip6)
  1048. return CHECKSUM_NONE;
  1049. if (!is_tcp && !is_udp)
  1050. return CHECKSUM_NONE;
  1051. if (!ip_csum_ok)
  1052. return CHECKSUM_NONE;
  1053. if (!tcpudp_csum_ok)
  1054. return CHECKSUM_NONE;
  1055. return CHECKSUM_UNNECESSARY;
  1056. }
  1057. static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
  1058. {
  1059. msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
  1060. }
  1061. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1062. struct sk_buff_head *amsdu,
  1063. struct ieee80211_rx_status *status)
  1064. {
  1065. struct sk_buff *first;
  1066. struct sk_buff *last;
  1067. struct sk_buff *msdu;
  1068. struct htt_rx_desc *rxd;
  1069. struct ieee80211_hdr *hdr;
  1070. enum htt_rx_mpdu_encrypt_type enctype;
  1071. u8 first_hdr[64];
  1072. u8 *qos;
  1073. size_t hdr_len;
  1074. bool has_fcs_err;
  1075. bool has_crypto_err;
  1076. bool has_tkip_err;
  1077. bool has_peer_idx_invalid;
  1078. bool is_decrypted;
  1079. u32 attention;
  1080. if (skb_queue_empty(amsdu))
  1081. return;
  1082. first = skb_peek(amsdu);
  1083. rxd = (void *)first->data - sizeof(*rxd);
  1084. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1085. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1086. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1087. * decapped header. It'll be used for undecapping of each MSDU.
  1088. */
  1089. hdr = (void *)rxd->rx_hdr_status;
  1090. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1091. memcpy(first_hdr, hdr, hdr_len);
  1092. /* Each A-MSDU subframe will use the original header as the base and be
  1093. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1094. */
  1095. hdr = (void *)first_hdr;
  1096. qos = ieee80211_get_qos_ctl(hdr);
  1097. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1098. /* Some attention flags are valid only in the last MSDU. */
  1099. last = skb_peek_tail(amsdu);
  1100. rxd = (void *)last->data - sizeof(*rxd);
  1101. attention = __le32_to_cpu(rxd->attention.flags);
  1102. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1103. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1104. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1105. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1106. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1107. * e.g. due to fcs error, missing peer or invalid key data it will
  1108. * report the frame as raw.
  1109. */
  1110. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1111. !has_fcs_err &&
  1112. !has_crypto_err &&
  1113. !has_peer_idx_invalid);
  1114. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1115. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1116. RX_FLAG_MMIC_ERROR |
  1117. RX_FLAG_DECRYPTED |
  1118. RX_FLAG_IV_STRIPPED |
  1119. RX_FLAG_MMIC_STRIPPED);
  1120. if (has_fcs_err)
  1121. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1122. if (has_tkip_err)
  1123. status->flag |= RX_FLAG_MMIC_ERROR;
  1124. if (is_decrypted)
  1125. status->flag |= RX_FLAG_DECRYPTED |
  1126. RX_FLAG_IV_STRIPPED |
  1127. RX_FLAG_MMIC_STRIPPED;
  1128. skb_queue_walk(amsdu, msdu) {
  1129. ath10k_htt_rx_h_csum_offload(msdu);
  1130. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1131. is_decrypted);
  1132. /* Undecapping involves copying the original 802.11 header back
  1133. * to sk_buff. If frame is protected and hardware has decrypted
  1134. * it then remove the protected bit.
  1135. */
  1136. if (!is_decrypted)
  1137. continue;
  1138. hdr = (void *)msdu->data;
  1139. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1140. }
  1141. }
  1142. static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
  1143. struct sk_buff_head *amsdu,
  1144. struct ieee80211_rx_status *status)
  1145. {
  1146. struct sk_buff *msdu;
  1147. while ((msdu = __skb_dequeue(amsdu))) {
  1148. /* Setup per-MSDU flags */
  1149. if (skb_queue_empty(amsdu))
  1150. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1151. else
  1152. status->flag |= RX_FLAG_AMSDU_MORE;
  1153. ath10k_process_rx(ar, status, msdu);
  1154. }
  1155. }
  1156. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
  1157. {
  1158. struct sk_buff *skb, *first;
  1159. int space;
  1160. int total_len = 0;
  1161. /* TODO: Might could optimize this by using
  1162. * skb_try_coalesce or similar method to
  1163. * decrease copying, or maybe get mac80211 to
  1164. * provide a way to just receive a list of
  1165. * skb?
  1166. */
  1167. first = __skb_dequeue(amsdu);
  1168. /* Allocate total length all at once. */
  1169. skb_queue_walk(amsdu, skb)
  1170. total_len += skb->len;
  1171. space = total_len - skb_tailroom(first);
  1172. if ((space > 0) &&
  1173. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1174. /* TODO: bump some rx-oom error stat */
  1175. /* put it back together so we can free the
  1176. * whole list at once.
  1177. */
  1178. __skb_queue_head(amsdu, first);
  1179. return -1;
  1180. }
  1181. /* Walk list again, copying contents into
  1182. * msdu_head
  1183. */
  1184. while ((skb = __skb_dequeue(amsdu))) {
  1185. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1186. skb->len);
  1187. dev_kfree_skb_any(skb);
  1188. }
  1189. __skb_queue_head(amsdu, first);
  1190. return 0;
  1191. }
  1192. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1193. struct sk_buff_head *amsdu,
  1194. bool chained)
  1195. {
  1196. struct sk_buff *first;
  1197. struct htt_rx_desc *rxd;
  1198. enum rx_msdu_decap_format decap;
  1199. first = skb_peek(amsdu);
  1200. rxd = (void *)first->data - sizeof(*rxd);
  1201. decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
  1202. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1203. if (!chained)
  1204. return;
  1205. /* FIXME: Current unchaining logic can only handle simple case of raw
  1206. * msdu chaining. If decapping is other than raw the chaining may be
  1207. * more complex and this isn't handled by the current code. Don't even
  1208. * try re-constructing such frames - it'll be pretty much garbage.
  1209. */
  1210. if (decap != RX_MSDU_DECAP_RAW ||
  1211. skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
  1212. __skb_queue_purge(amsdu);
  1213. return;
  1214. }
  1215. ath10k_unchain_msdu(amsdu);
  1216. }
  1217. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1218. struct sk_buff_head *amsdu,
  1219. struct ieee80211_rx_status *rx_status)
  1220. {
  1221. struct sk_buff *msdu;
  1222. struct htt_rx_desc *rxd;
  1223. bool is_mgmt;
  1224. bool has_fcs_err;
  1225. msdu = skb_peek(amsdu);
  1226. rxd = (void *)msdu->data - sizeof(*rxd);
  1227. /* FIXME: It might be a good idea to do some fuzzy-testing to drop
  1228. * invalid/dangerous frames.
  1229. */
  1230. if (!rx_status->freq) {
  1231. ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
  1232. return false;
  1233. }
  1234. is_mgmt = !!(rxd->attention.flags &
  1235. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1236. has_fcs_err = !!(rxd->attention.flags &
  1237. __cpu_to_le32(RX_ATTENTION_FLAGS_FCS_ERR));
  1238. /* Management frames are handled via WMI events. The pros of such
  1239. * approach is that channel is explicitly provided in WMI events
  1240. * whereas HTT doesn't provide channel information for Rxed frames.
  1241. *
  1242. * However some firmware revisions don't report corrupted frames via
  1243. * WMI so don't drop them.
  1244. */
  1245. if (is_mgmt && !has_fcs_err) {
  1246. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
  1247. return false;
  1248. }
  1249. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1250. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1251. return false;
  1252. }
  1253. return true;
  1254. }
  1255. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1256. struct sk_buff_head *amsdu,
  1257. struct ieee80211_rx_status *rx_status)
  1258. {
  1259. if (skb_queue_empty(amsdu))
  1260. return;
  1261. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1262. return;
  1263. __skb_queue_purge(amsdu);
  1264. }
  1265. static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
  1266. struct htt_rx_indication *rx)
  1267. {
  1268. struct ath10k *ar = htt->ar;
  1269. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1270. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1271. struct sk_buff_head amsdu;
  1272. int num_mpdu_ranges;
  1273. int fw_desc_len;
  1274. u8 *fw_desc;
  1275. int i, ret, mpdu_count = 0;
  1276. lockdep_assert_held(&htt->rx_ring.lock);
  1277. if (htt->rx_confused)
  1278. return;
  1279. fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
  1280. fw_desc = (u8 *)&rx->fw_desc;
  1281. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1282. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1283. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1284. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1285. rx, sizeof(*rx) +
  1286. (sizeof(struct htt_rx_indication_mpdu_range) *
  1287. num_mpdu_ranges));
  1288. for (i = 0; i < num_mpdu_ranges; i++)
  1289. mpdu_count += mpdu_ranges[i].mpdu_count;
  1290. while (mpdu_count--) {
  1291. __skb_queue_head_init(&amsdu);
  1292. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
  1293. &fw_desc_len, &amsdu);
  1294. if (ret < 0) {
  1295. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1296. __skb_queue_purge(&amsdu);
  1297. /* FIXME: It's probably a good idea to reboot the
  1298. * device instead of leaving it inoperable.
  1299. */
  1300. htt->rx_confused = true;
  1301. break;
  1302. }
  1303. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1304. ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
  1305. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
  1306. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
  1307. ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
  1308. }
  1309. tasklet_schedule(&htt->rx_replenish_task);
  1310. }
  1311. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
  1312. struct htt_rx_fragment_indication *frag)
  1313. {
  1314. struct ath10k *ar = htt->ar;
  1315. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1316. struct sk_buff_head amsdu;
  1317. int ret;
  1318. u8 *fw_desc;
  1319. int fw_desc_len;
  1320. fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
  1321. fw_desc = (u8 *)frag->fw_msdu_rx_desc;
  1322. __skb_queue_head_init(&amsdu);
  1323. spin_lock_bh(&htt->rx_ring.lock);
  1324. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
  1325. &amsdu);
  1326. spin_unlock_bh(&htt->rx_ring.lock);
  1327. tasklet_schedule(&htt->rx_replenish_task);
  1328. ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
  1329. if (ret) {
  1330. ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
  1331. ret);
  1332. __skb_queue_purge(&amsdu);
  1333. return;
  1334. }
  1335. if (skb_queue_len(&amsdu) != 1) {
  1336. ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
  1337. __skb_queue_purge(&amsdu);
  1338. return;
  1339. }
  1340. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1341. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
  1342. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
  1343. ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
  1344. if (fw_desc_len > 0) {
  1345. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1346. "expecting more fragmented rx in one indication %d\n",
  1347. fw_desc_len);
  1348. }
  1349. }
  1350. static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
  1351. struct sk_buff *skb)
  1352. {
  1353. struct ath10k_htt *htt = &ar->htt;
  1354. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1355. struct htt_tx_done tx_done = {};
  1356. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1357. __le16 msdu_id;
  1358. int i;
  1359. lockdep_assert_held(&htt->tx_lock);
  1360. switch (status) {
  1361. case HTT_DATA_TX_STATUS_NO_ACK:
  1362. tx_done.no_ack = true;
  1363. break;
  1364. case HTT_DATA_TX_STATUS_OK:
  1365. tx_done.success = true;
  1366. break;
  1367. case HTT_DATA_TX_STATUS_DISCARD:
  1368. case HTT_DATA_TX_STATUS_POSTPONE:
  1369. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1370. tx_done.discard = true;
  1371. break;
  1372. default:
  1373. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1374. tx_done.discard = true;
  1375. break;
  1376. }
  1377. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1378. resp->data_tx_completion.num_msdus);
  1379. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1380. msdu_id = resp->data_tx_completion.msdus[i];
  1381. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1382. ath10k_txrx_tx_unref(htt, &tx_done);
  1383. }
  1384. }
  1385. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1386. {
  1387. struct htt_rx_addba *ev = &resp->rx_addba;
  1388. struct ath10k_peer *peer;
  1389. struct ath10k_vif *arvif;
  1390. u16 info0, tid, peer_id;
  1391. info0 = __le16_to_cpu(ev->info0);
  1392. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1393. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1394. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1395. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1396. tid, peer_id, ev->window_size);
  1397. spin_lock_bh(&ar->data_lock);
  1398. peer = ath10k_peer_find_by_id(ar, peer_id);
  1399. if (!peer) {
  1400. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1401. peer_id);
  1402. spin_unlock_bh(&ar->data_lock);
  1403. return;
  1404. }
  1405. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1406. if (!arvif) {
  1407. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1408. peer->vdev_id);
  1409. spin_unlock_bh(&ar->data_lock);
  1410. return;
  1411. }
  1412. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1413. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1414. peer->addr, tid, ev->window_size);
  1415. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1416. spin_unlock_bh(&ar->data_lock);
  1417. }
  1418. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1419. {
  1420. struct htt_rx_delba *ev = &resp->rx_delba;
  1421. struct ath10k_peer *peer;
  1422. struct ath10k_vif *arvif;
  1423. u16 info0, tid, peer_id;
  1424. info0 = __le16_to_cpu(ev->info0);
  1425. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1426. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1427. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1428. "htt rx delba tid %hu peer_id %hu\n",
  1429. tid, peer_id);
  1430. spin_lock_bh(&ar->data_lock);
  1431. peer = ath10k_peer_find_by_id(ar, peer_id);
  1432. if (!peer) {
  1433. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1434. peer_id);
  1435. spin_unlock_bh(&ar->data_lock);
  1436. return;
  1437. }
  1438. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1439. if (!arvif) {
  1440. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1441. peer->vdev_id);
  1442. spin_unlock_bh(&ar->data_lock);
  1443. return;
  1444. }
  1445. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1446. "htt rx stop rx ba session sta %pM tid %hu\n",
  1447. peer->addr, tid);
  1448. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1449. spin_unlock_bh(&ar->data_lock);
  1450. }
  1451. static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
  1452. struct sk_buff_head *amsdu)
  1453. {
  1454. struct sk_buff *msdu;
  1455. struct htt_rx_desc *rxd;
  1456. if (skb_queue_empty(list))
  1457. return -ENOBUFS;
  1458. if (WARN_ON(!skb_queue_empty(amsdu)))
  1459. return -EINVAL;
  1460. while ((msdu = __skb_dequeue(list))) {
  1461. __skb_queue_tail(amsdu, msdu);
  1462. rxd = (void *)msdu->data - sizeof(*rxd);
  1463. if (rxd->msdu_end.info0 &
  1464. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  1465. break;
  1466. }
  1467. msdu = skb_peek_tail(amsdu);
  1468. rxd = (void *)msdu->data - sizeof(*rxd);
  1469. if (!(rxd->msdu_end.info0 &
  1470. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  1471. skb_queue_splice_init(amsdu, list);
  1472. return -EAGAIN;
  1473. }
  1474. return 0;
  1475. }
  1476. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  1477. struct sk_buff *skb)
  1478. {
  1479. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1480. if (!ieee80211_has_protected(hdr->frame_control))
  1481. return;
  1482. /* Offloaded frames are already decrypted but firmware insists they are
  1483. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  1484. * will drop the frame.
  1485. */
  1486. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1487. status->flag |= RX_FLAG_DECRYPTED |
  1488. RX_FLAG_IV_STRIPPED |
  1489. RX_FLAG_MMIC_STRIPPED;
  1490. }
  1491. static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  1492. struct sk_buff_head *list)
  1493. {
  1494. struct ath10k_htt *htt = &ar->htt;
  1495. struct ieee80211_rx_status *status = &htt->rx_status;
  1496. struct htt_rx_offload_msdu *rx;
  1497. struct sk_buff *msdu;
  1498. size_t offset;
  1499. while ((msdu = __skb_dequeue(list))) {
  1500. /* Offloaded frames don't have Rx descriptor. Instead they have
  1501. * a short meta information header.
  1502. */
  1503. rx = (void *)msdu->data;
  1504. skb_put(msdu, sizeof(*rx));
  1505. skb_pull(msdu, sizeof(*rx));
  1506. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  1507. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  1508. dev_kfree_skb_any(msdu);
  1509. continue;
  1510. }
  1511. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  1512. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  1513. * actual payload is unaligned. Align the frame. Otherwise
  1514. * mac80211 complains. This shouldn't reduce performance much
  1515. * because these offloaded frames are rare.
  1516. */
  1517. offset = 4 - ((unsigned long)msdu->data & 3);
  1518. skb_put(msdu, offset);
  1519. memmove(msdu->data + offset, msdu->data, msdu->len);
  1520. skb_pull(msdu, offset);
  1521. /* FIXME: The frame is NWifi. Re-construct QoS Control
  1522. * if possible later.
  1523. */
  1524. memset(status, 0, sizeof(*status));
  1525. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1526. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  1527. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  1528. ath10k_process_rx(ar, status, msdu);
  1529. }
  1530. }
  1531. static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  1532. {
  1533. struct ath10k_htt *htt = &ar->htt;
  1534. struct htt_resp *resp = (void *)skb->data;
  1535. struct ieee80211_rx_status *status = &htt->rx_status;
  1536. struct sk_buff_head list;
  1537. struct sk_buff_head amsdu;
  1538. u16 peer_id;
  1539. u16 msdu_count;
  1540. u8 vdev_id;
  1541. u8 tid;
  1542. bool offload;
  1543. bool frag;
  1544. int ret;
  1545. lockdep_assert_held(&htt->rx_ring.lock);
  1546. if (htt->rx_confused)
  1547. return;
  1548. skb_pull(skb, sizeof(resp->hdr));
  1549. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  1550. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  1551. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  1552. vdev_id = resp->rx_in_ord_ind.vdev_id;
  1553. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  1554. offload = !!(resp->rx_in_ord_ind.info &
  1555. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  1556. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  1557. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1558. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  1559. vdev_id, peer_id, tid, offload, frag, msdu_count);
  1560. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
  1561. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  1562. return;
  1563. }
  1564. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  1565. * extracted and processed.
  1566. */
  1567. __skb_queue_head_init(&list);
  1568. ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
  1569. if (ret < 0) {
  1570. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  1571. htt->rx_confused = true;
  1572. return;
  1573. }
  1574. /* Offloaded frames are very different and need to be handled
  1575. * separately.
  1576. */
  1577. if (offload)
  1578. ath10k_htt_rx_h_rx_offload(ar, &list);
  1579. while (!skb_queue_empty(&list)) {
  1580. __skb_queue_head_init(&amsdu);
  1581. ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
  1582. switch (ret) {
  1583. case 0:
  1584. /* Note: The in-order indication may report interleaved
  1585. * frames from different PPDUs meaning reported rx rate
  1586. * to mac80211 isn't accurate/reliable. It's still
  1587. * better to report something than nothing though. This
  1588. * should still give an idea about rx rate to the user.
  1589. */
  1590. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  1591. ath10k_htt_rx_h_filter(ar, &amsdu, status);
  1592. ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
  1593. ath10k_htt_rx_h_deliver(ar, &amsdu, status);
  1594. break;
  1595. case -EAGAIN:
  1596. /* fall through */
  1597. default:
  1598. /* Should not happen. */
  1599. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  1600. htt->rx_confused = true;
  1601. __skb_queue_purge(&list);
  1602. return;
  1603. }
  1604. }
  1605. tasklet_schedule(&htt->rx_replenish_task);
  1606. }
  1607. void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1608. {
  1609. struct ath10k_htt *htt = &ar->htt;
  1610. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1611. enum htt_t2h_msg_type type;
  1612. /* confirm alignment */
  1613. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1614. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  1615. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1616. resp->hdr.msg_type);
  1617. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  1618. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  1619. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  1620. dev_kfree_skb_any(skb);
  1621. return;
  1622. }
  1623. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  1624. switch (type) {
  1625. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1626. htt->target_version_major = resp->ver_resp.major;
  1627. htt->target_version_minor = resp->ver_resp.minor;
  1628. complete(&htt->target_version_received);
  1629. break;
  1630. }
  1631. case HTT_T2H_MSG_TYPE_RX_IND:
  1632. spin_lock_bh(&htt->rx_ring.lock);
  1633. __skb_queue_tail(&htt->rx_compl_q, skb);
  1634. spin_unlock_bh(&htt->rx_ring.lock);
  1635. tasklet_schedule(&htt->txrx_compl_task);
  1636. return;
  1637. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1638. struct htt_peer_map_event ev = {
  1639. .vdev_id = resp->peer_map.vdev_id,
  1640. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1641. };
  1642. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1643. ath10k_peer_map_event(htt, &ev);
  1644. break;
  1645. }
  1646. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1647. struct htt_peer_unmap_event ev = {
  1648. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1649. };
  1650. ath10k_peer_unmap_event(htt, &ev);
  1651. break;
  1652. }
  1653. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1654. struct htt_tx_done tx_done = {};
  1655. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1656. tx_done.msdu_id =
  1657. __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1658. switch (status) {
  1659. case HTT_MGMT_TX_STATUS_OK:
  1660. tx_done.success = true;
  1661. break;
  1662. case HTT_MGMT_TX_STATUS_RETRY:
  1663. tx_done.no_ack = true;
  1664. break;
  1665. case HTT_MGMT_TX_STATUS_DROP:
  1666. tx_done.discard = true;
  1667. break;
  1668. }
  1669. spin_lock_bh(&htt->tx_lock);
  1670. ath10k_txrx_tx_unref(htt, &tx_done);
  1671. spin_unlock_bh(&htt->tx_lock);
  1672. break;
  1673. }
  1674. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1675. spin_lock_bh(&htt->tx_lock);
  1676. __skb_queue_tail(&htt->tx_compl_q, skb);
  1677. spin_unlock_bh(&htt->tx_lock);
  1678. tasklet_schedule(&htt->txrx_compl_task);
  1679. return;
  1680. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1681. struct ath10k *ar = htt->ar;
  1682. struct htt_security_indication *ev = &resp->security_indication;
  1683. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1684. "sec ind peer_id %d unicast %d type %d\n",
  1685. __le16_to_cpu(ev->peer_id),
  1686. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1687. MS(ev->flags, HTT_SECURITY_TYPE));
  1688. complete(&ar->install_key_done);
  1689. break;
  1690. }
  1691. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1692. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1693. skb->data, skb->len);
  1694. ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
  1695. break;
  1696. }
  1697. case HTT_T2H_MSG_TYPE_TEST:
  1698. break;
  1699. case HTT_T2H_MSG_TYPE_STATS_CONF:
  1700. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  1701. break;
  1702. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  1703. /* Firmware can return tx frames if it's unable to fully
  1704. * process them and suspects host may be able to fix it. ath10k
  1705. * sends all tx frames as already inspected so this shouldn't
  1706. * happen unless fw has a bug.
  1707. */
  1708. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  1709. break;
  1710. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  1711. ath10k_htt_rx_addba(ar, resp);
  1712. break;
  1713. case HTT_T2H_MSG_TYPE_RX_DELBA:
  1714. ath10k_htt_rx_delba(ar, resp);
  1715. break;
  1716. case HTT_T2H_MSG_TYPE_PKTLOG: {
  1717. struct ath10k_pktlog_hdr *hdr =
  1718. (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
  1719. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  1720. sizeof(*hdr) +
  1721. __le16_to_cpu(hdr->size));
  1722. break;
  1723. }
  1724. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  1725. /* Ignore this event because mac80211 takes care of Rx
  1726. * aggregation reordering.
  1727. */
  1728. break;
  1729. }
  1730. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  1731. spin_lock_bh(&htt->rx_ring.lock);
  1732. __skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  1733. spin_unlock_bh(&htt->rx_ring.lock);
  1734. tasklet_schedule(&htt->txrx_compl_task);
  1735. return;
  1736. }
  1737. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
  1738. break;
  1739. case HTT_T2H_MSG_TYPE_CHAN_CHANGE:
  1740. break;
  1741. default:
  1742. ath10k_warn(ar, "htt event (%d) not handled\n",
  1743. resp->hdr.msg_type);
  1744. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1745. skb->data, skb->len);
  1746. break;
  1747. };
  1748. /* Free the indication buffer */
  1749. dev_kfree_skb_any(skb);
  1750. }
  1751. static void ath10k_htt_txrx_compl_task(unsigned long ptr)
  1752. {
  1753. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  1754. struct ath10k *ar = htt->ar;
  1755. struct htt_resp *resp;
  1756. struct sk_buff *skb;
  1757. spin_lock_bh(&htt->tx_lock);
  1758. while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
  1759. ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
  1760. dev_kfree_skb_any(skb);
  1761. }
  1762. spin_unlock_bh(&htt->tx_lock);
  1763. spin_lock_bh(&htt->rx_ring.lock);
  1764. while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
  1765. resp = (struct htt_resp *)skb->data;
  1766. ath10k_htt_rx_handler(htt, &resp->rx_ind);
  1767. dev_kfree_skb_any(skb);
  1768. }
  1769. while ((skb = __skb_dequeue(&htt->rx_in_ord_compl_q))) {
  1770. ath10k_htt_rx_in_ord_ind(ar, skb);
  1771. dev_kfree_skb_any(skb);
  1772. }
  1773. spin_unlock_bh(&htt->rx_ring.lock);
  1774. }