cmd.c 36 KB

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  1. /*
  2. * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <asm-generic/kmap_types.h>
  33. #include <linux/module.h>
  34. #include <linux/errno.h>
  35. #include <linux/pci.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/slab.h>
  38. #include <linux/delay.h>
  39. #include <linux/random.h>
  40. #include <linux/io-mapping.h>
  41. #include <linux/mlx5/driver.h>
  42. #include <linux/debugfs.h>
  43. #include "mlx5_core.h"
  44. enum {
  45. CMD_IF_REV = 5,
  46. };
  47. enum {
  48. CMD_MODE_POLLING,
  49. CMD_MODE_EVENTS
  50. };
  51. enum {
  52. NUM_LONG_LISTS = 2,
  53. NUM_MED_LISTS = 64,
  54. LONG_LIST_SIZE = (2ULL * 1024 * 1024 * 1024 / PAGE_SIZE) * 8 + 16 +
  55. MLX5_CMD_DATA_BLOCK_SIZE,
  56. MED_LIST_SIZE = 16 + MLX5_CMD_DATA_BLOCK_SIZE,
  57. };
  58. enum {
  59. MLX5_CMD_DELIVERY_STAT_OK = 0x0,
  60. MLX5_CMD_DELIVERY_STAT_SIGNAT_ERR = 0x1,
  61. MLX5_CMD_DELIVERY_STAT_TOK_ERR = 0x2,
  62. MLX5_CMD_DELIVERY_STAT_BAD_BLK_NUM_ERR = 0x3,
  63. MLX5_CMD_DELIVERY_STAT_OUT_PTR_ALIGN_ERR = 0x4,
  64. MLX5_CMD_DELIVERY_STAT_IN_PTR_ALIGN_ERR = 0x5,
  65. MLX5_CMD_DELIVERY_STAT_FW_ERR = 0x6,
  66. MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR = 0x7,
  67. MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR = 0x8,
  68. MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR = 0x9,
  69. MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR = 0x10,
  70. };
  71. static struct mlx5_cmd_work_ent *alloc_cmd(struct mlx5_cmd *cmd,
  72. struct mlx5_cmd_msg *in,
  73. struct mlx5_cmd_msg *out,
  74. void *uout, int uout_size,
  75. mlx5_cmd_cbk_t cbk,
  76. void *context, int page_queue)
  77. {
  78. gfp_t alloc_flags = cbk ? GFP_ATOMIC : GFP_KERNEL;
  79. struct mlx5_cmd_work_ent *ent;
  80. ent = kzalloc(sizeof(*ent), alloc_flags);
  81. if (!ent)
  82. return ERR_PTR(-ENOMEM);
  83. ent->in = in;
  84. ent->out = out;
  85. ent->uout = uout;
  86. ent->uout_size = uout_size;
  87. ent->callback = cbk;
  88. ent->context = context;
  89. ent->cmd = cmd;
  90. ent->page_queue = page_queue;
  91. return ent;
  92. }
  93. static u8 alloc_token(struct mlx5_cmd *cmd)
  94. {
  95. u8 token;
  96. spin_lock(&cmd->token_lock);
  97. cmd->token++;
  98. if (cmd->token == 0)
  99. cmd->token++;
  100. token = cmd->token;
  101. spin_unlock(&cmd->token_lock);
  102. return token;
  103. }
  104. static int alloc_ent(struct mlx5_cmd *cmd)
  105. {
  106. unsigned long flags;
  107. int ret;
  108. spin_lock_irqsave(&cmd->alloc_lock, flags);
  109. ret = find_first_bit(&cmd->bitmask, cmd->max_reg_cmds);
  110. if (ret < cmd->max_reg_cmds)
  111. clear_bit(ret, &cmd->bitmask);
  112. spin_unlock_irqrestore(&cmd->alloc_lock, flags);
  113. return ret < cmd->max_reg_cmds ? ret : -ENOMEM;
  114. }
  115. static void free_ent(struct mlx5_cmd *cmd, int idx)
  116. {
  117. unsigned long flags;
  118. spin_lock_irqsave(&cmd->alloc_lock, flags);
  119. set_bit(idx, &cmd->bitmask);
  120. spin_unlock_irqrestore(&cmd->alloc_lock, flags);
  121. }
  122. static struct mlx5_cmd_layout *get_inst(struct mlx5_cmd *cmd, int idx)
  123. {
  124. return cmd->cmd_buf + (idx << cmd->log_stride);
  125. }
  126. static u8 xor8_buf(void *buf, int len)
  127. {
  128. u8 *ptr = buf;
  129. u8 sum = 0;
  130. int i;
  131. for (i = 0; i < len; i++)
  132. sum ^= ptr[i];
  133. return sum;
  134. }
  135. static int verify_block_sig(struct mlx5_cmd_prot_block *block)
  136. {
  137. if (xor8_buf(block->rsvd0, sizeof(*block) - sizeof(block->data) - 1) != 0xff)
  138. return -EINVAL;
  139. if (xor8_buf(block, sizeof(*block)) != 0xff)
  140. return -EINVAL;
  141. return 0;
  142. }
  143. static void calc_block_sig(struct mlx5_cmd_prot_block *block, u8 token,
  144. int csum)
  145. {
  146. block->token = token;
  147. if (csum) {
  148. block->ctrl_sig = ~xor8_buf(block->rsvd0, sizeof(*block) -
  149. sizeof(block->data) - 2);
  150. block->sig = ~xor8_buf(block, sizeof(*block) - 1);
  151. }
  152. }
  153. static void calc_chain_sig(struct mlx5_cmd_msg *msg, u8 token, int csum)
  154. {
  155. struct mlx5_cmd_mailbox *next = msg->next;
  156. while (next) {
  157. calc_block_sig(next->buf, token, csum);
  158. next = next->next;
  159. }
  160. }
  161. static void set_signature(struct mlx5_cmd_work_ent *ent, int csum)
  162. {
  163. ent->lay->sig = ~xor8_buf(ent->lay, sizeof(*ent->lay));
  164. calc_chain_sig(ent->in, ent->token, csum);
  165. calc_chain_sig(ent->out, ent->token, csum);
  166. }
  167. static void poll_timeout(struct mlx5_cmd_work_ent *ent)
  168. {
  169. unsigned long poll_end = jiffies + msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC + 1000);
  170. u8 own;
  171. do {
  172. own = ent->lay->status_own;
  173. if (!(own & CMD_OWNER_HW)) {
  174. ent->ret = 0;
  175. return;
  176. }
  177. usleep_range(5000, 10000);
  178. } while (time_before(jiffies, poll_end));
  179. ent->ret = -ETIMEDOUT;
  180. }
  181. static void free_cmd(struct mlx5_cmd_work_ent *ent)
  182. {
  183. kfree(ent);
  184. }
  185. static int verify_signature(struct mlx5_cmd_work_ent *ent)
  186. {
  187. struct mlx5_cmd_mailbox *next = ent->out->next;
  188. int err;
  189. u8 sig;
  190. sig = xor8_buf(ent->lay, sizeof(*ent->lay));
  191. if (sig != 0xff)
  192. return -EINVAL;
  193. while (next) {
  194. err = verify_block_sig(next->buf);
  195. if (err)
  196. return err;
  197. next = next->next;
  198. }
  199. return 0;
  200. }
  201. static void dump_buf(void *buf, int size, int data_only, int offset)
  202. {
  203. __be32 *p = buf;
  204. int i;
  205. for (i = 0; i < size; i += 16) {
  206. pr_debug("%03x: %08x %08x %08x %08x\n", offset, be32_to_cpu(p[0]),
  207. be32_to_cpu(p[1]), be32_to_cpu(p[2]),
  208. be32_to_cpu(p[3]));
  209. p += 4;
  210. offset += 16;
  211. }
  212. if (!data_only)
  213. pr_debug("\n");
  214. }
  215. const char *mlx5_command_str(int command)
  216. {
  217. switch (command) {
  218. case MLX5_CMD_OP_QUERY_HCA_CAP:
  219. return "QUERY_HCA_CAP";
  220. case MLX5_CMD_OP_SET_HCA_CAP:
  221. return "SET_HCA_CAP";
  222. case MLX5_CMD_OP_QUERY_ADAPTER:
  223. return "QUERY_ADAPTER";
  224. case MLX5_CMD_OP_INIT_HCA:
  225. return "INIT_HCA";
  226. case MLX5_CMD_OP_TEARDOWN_HCA:
  227. return "TEARDOWN_HCA";
  228. case MLX5_CMD_OP_ENABLE_HCA:
  229. return "MLX5_CMD_OP_ENABLE_HCA";
  230. case MLX5_CMD_OP_DISABLE_HCA:
  231. return "MLX5_CMD_OP_DISABLE_HCA";
  232. case MLX5_CMD_OP_QUERY_PAGES:
  233. return "QUERY_PAGES";
  234. case MLX5_CMD_OP_MANAGE_PAGES:
  235. return "MANAGE_PAGES";
  236. case MLX5_CMD_OP_CREATE_MKEY:
  237. return "CREATE_MKEY";
  238. case MLX5_CMD_OP_QUERY_MKEY:
  239. return "QUERY_MKEY";
  240. case MLX5_CMD_OP_DESTROY_MKEY:
  241. return "DESTROY_MKEY";
  242. case MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS:
  243. return "QUERY_SPECIAL_CONTEXTS";
  244. case MLX5_CMD_OP_CREATE_EQ:
  245. return "CREATE_EQ";
  246. case MLX5_CMD_OP_DESTROY_EQ:
  247. return "DESTROY_EQ";
  248. case MLX5_CMD_OP_QUERY_EQ:
  249. return "QUERY_EQ";
  250. case MLX5_CMD_OP_CREATE_CQ:
  251. return "CREATE_CQ";
  252. case MLX5_CMD_OP_DESTROY_CQ:
  253. return "DESTROY_CQ";
  254. case MLX5_CMD_OP_QUERY_CQ:
  255. return "QUERY_CQ";
  256. case MLX5_CMD_OP_MODIFY_CQ:
  257. return "MODIFY_CQ";
  258. case MLX5_CMD_OP_CREATE_QP:
  259. return "CREATE_QP";
  260. case MLX5_CMD_OP_DESTROY_QP:
  261. return "DESTROY_QP";
  262. case MLX5_CMD_OP_RST2INIT_QP:
  263. return "RST2INIT_QP";
  264. case MLX5_CMD_OP_INIT2RTR_QP:
  265. return "INIT2RTR_QP";
  266. case MLX5_CMD_OP_RTR2RTS_QP:
  267. return "RTR2RTS_QP";
  268. case MLX5_CMD_OP_RTS2RTS_QP:
  269. return "RTS2RTS_QP";
  270. case MLX5_CMD_OP_SQERR2RTS_QP:
  271. return "SQERR2RTS_QP";
  272. case MLX5_CMD_OP_2ERR_QP:
  273. return "2ERR_QP";
  274. case MLX5_CMD_OP_2RST_QP:
  275. return "2RST_QP";
  276. case MLX5_CMD_OP_QUERY_QP:
  277. return "QUERY_QP";
  278. case MLX5_CMD_OP_MAD_IFC:
  279. return "MAD_IFC";
  280. case MLX5_CMD_OP_INIT2INIT_QP:
  281. return "INIT2INIT_QP";
  282. case MLX5_CMD_OP_CREATE_PSV:
  283. return "CREATE_PSV";
  284. case MLX5_CMD_OP_DESTROY_PSV:
  285. return "DESTROY_PSV";
  286. case MLX5_CMD_OP_CREATE_SRQ:
  287. return "CREATE_SRQ";
  288. case MLX5_CMD_OP_DESTROY_SRQ:
  289. return "DESTROY_SRQ";
  290. case MLX5_CMD_OP_QUERY_SRQ:
  291. return "QUERY_SRQ";
  292. case MLX5_CMD_OP_ARM_RQ:
  293. return "ARM_RQ";
  294. case MLX5_CMD_OP_CREATE_XRC_SRQ:
  295. return "CREATE_XRC_SRQ";
  296. case MLX5_CMD_OP_DESTROY_XRC_SRQ:
  297. return "DESTROY_XRC_SRQ";
  298. case MLX5_CMD_OP_QUERY_XRC_SRQ:
  299. return "QUERY_XRC_SRQ";
  300. case MLX5_CMD_OP_ARM_XRC_SRQ:
  301. return "ARM_XRC_SRQ";
  302. case MLX5_CMD_OP_ALLOC_PD:
  303. return "ALLOC_PD";
  304. case MLX5_CMD_OP_DEALLOC_PD:
  305. return "DEALLOC_PD";
  306. case MLX5_CMD_OP_ALLOC_UAR:
  307. return "ALLOC_UAR";
  308. case MLX5_CMD_OP_DEALLOC_UAR:
  309. return "DEALLOC_UAR";
  310. case MLX5_CMD_OP_ATTACH_TO_MCG:
  311. return "ATTACH_TO_MCG";
  312. case MLX5_CMD_OP_DETTACH_FROM_MCG:
  313. return "DETTACH_FROM_MCG";
  314. case MLX5_CMD_OP_ALLOC_XRCD:
  315. return "ALLOC_XRCD";
  316. case MLX5_CMD_OP_DEALLOC_XRCD:
  317. return "DEALLOC_XRCD";
  318. case MLX5_CMD_OP_ACCESS_REG:
  319. return "MLX5_CMD_OP_ACCESS_REG";
  320. default: return "unknown command opcode";
  321. }
  322. }
  323. static void dump_command(struct mlx5_core_dev *dev,
  324. struct mlx5_cmd_work_ent *ent, int input)
  325. {
  326. u16 op = be16_to_cpu(((struct mlx5_inbox_hdr *)(ent->lay->in))->opcode);
  327. struct mlx5_cmd_msg *msg = input ? ent->in : ent->out;
  328. struct mlx5_cmd_mailbox *next = msg->next;
  329. int data_only;
  330. u32 offset = 0;
  331. int dump_len;
  332. data_only = !!(mlx5_core_debug_mask & (1 << MLX5_CMD_DATA));
  333. if (data_only)
  334. mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_DATA,
  335. "dump command data %s(0x%x) %s\n",
  336. mlx5_command_str(op), op,
  337. input ? "INPUT" : "OUTPUT");
  338. else
  339. mlx5_core_dbg(dev, "dump command %s(0x%x) %s\n",
  340. mlx5_command_str(op), op,
  341. input ? "INPUT" : "OUTPUT");
  342. if (data_only) {
  343. if (input) {
  344. dump_buf(ent->lay->in, sizeof(ent->lay->in), 1, offset);
  345. offset += sizeof(ent->lay->in);
  346. } else {
  347. dump_buf(ent->lay->out, sizeof(ent->lay->out), 1, offset);
  348. offset += sizeof(ent->lay->out);
  349. }
  350. } else {
  351. dump_buf(ent->lay, sizeof(*ent->lay), 0, offset);
  352. offset += sizeof(*ent->lay);
  353. }
  354. while (next && offset < msg->len) {
  355. if (data_only) {
  356. dump_len = min_t(int, MLX5_CMD_DATA_BLOCK_SIZE, msg->len - offset);
  357. dump_buf(next->buf, dump_len, 1, offset);
  358. offset += MLX5_CMD_DATA_BLOCK_SIZE;
  359. } else {
  360. mlx5_core_dbg(dev, "command block:\n");
  361. dump_buf(next->buf, sizeof(struct mlx5_cmd_prot_block), 0, offset);
  362. offset += sizeof(struct mlx5_cmd_prot_block);
  363. }
  364. next = next->next;
  365. }
  366. if (data_only)
  367. pr_debug("\n");
  368. }
  369. static void cmd_work_handler(struct work_struct *work)
  370. {
  371. struct mlx5_cmd_work_ent *ent = container_of(work, struct mlx5_cmd_work_ent, work);
  372. struct mlx5_cmd *cmd = ent->cmd;
  373. struct mlx5_core_dev *dev = container_of(cmd, struct mlx5_core_dev, cmd);
  374. struct mlx5_cmd_layout *lay;
  375. struct semaphore *sem;
  376. sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
  377. down(sem);
  378. if (!ent->page_queue) {
  379. ent->idx = alloc_ent(cmd);
  380. if (ent->idx < 0) {
  381. mlx5_core_err(dev, "failed to allocate command entry\n");
  382. up(sem);
  383. return;
  384. }
  385. } else {
  386. ent->idx = cmd->max_reg_cmds;
  387. }
  388. ent->token = alloc_token(cmd);
  389. cmd->ent_arr[ent->idx] = ent;
  390. lay = get_inst(cmd, ent->idx);
  391. ent->lay = lay;
  392. memset(lay, 0, sizeof(*lay));
  393. memcpy(lay->in, ent->in->first.data, sizeof(lay->in));
  394. ent->op = be32_to_cpu(lay->in[0]) >> 16;
  395. if (ent->in->next)
  396. lay->in_ptr = cpu_to_be64(ent->in->next->dma);
  397. lay->inlen = cpu_to_be32(ent->in->len);
  398. if (ent->out->next)
  399. lay->out_ptr = cpu_to_be64(ent->out->next->dma);
  400. lay->outlen = cpu_to_be32(ent->out->len);
  401. lay->type = MLX5_PCI_CMD_XPORT;
  402. lay->token = ent->token;
  403. lay->status_own = CMD_OWNER_HW;
  404. set_signature(ent, !cmd->checksum_disabled);
  405. dump_command(dev, ent, 1);
  406. ent->ts1 = ktime_get_ns();
  407. /* ring doorbell after the descriptor is valid */
  408. mlx5_core_dbg(dev, "writing 0x%x to command doorbell\n", 1 << ent->idx);
  409. wmb();
  410. iowrite32be(1 << ent->idx, &dev->iseg->cmd_dbell);
  411. mmiowb();
  412. /* if not in polling don't use ent after this point */
  413. if (cmd->mode == CMD_MODE_POLLING) {
  414. poll_timeout(ent);
  415. /* make sure we read the descriptor after ownership is SW */
  416. rmb();
  417. mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
  418. }
  419. }
  420. static const char *deliv_status_to_str(u8 status)
  421. {
  422. switch (status) {
  423. case MLX5_CMD_DELIVERY_STAT_OK:
  424. return "no errors";
  425. case MLX5_CMD_DELIVERY_STAT_SIGNAT_ERR:
  426. return "signature error";
  427. case MLX5_CMD_DELIVERY_STAT_TOK_ERR:
  428. return "token error";
  429. case MLX5_CMD_DELIVERY_STAT_BAD_BLK_NUM_ERR:
  430. return "bad block number";
  431. case MLX5_CMD_DELIVERY_STAT_OUT_PTR_ALIGN_ERR:
  432. return "output pointer not aligned to block size";
  433. case MLX5_CMD_DELIVERY_STAT_IN_PTR_ALIGN_ERR:
  434. return "input pointer not aligned to block size";
  435. case MLX5_CMD_DELIVERY_STAT_FW_ERR:
  436. return "firmware internal error";
  437. case MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR:
  438. return "command input length error";
  439. case MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR:
  440. return "command ouput length error";
  441. case MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR:
  442. return "reserved fields not cleared";
  443. case MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR:
  444. return "bad command descriptor type";
  445. default:
  446. return "unknown status code";
  447. }
  448. }
  449. static u16 msg_to_opcode(struct mlx5_cmd_msg *in)
  450. {
  451. struct mlx5_inbox_hdr *hdr = (struct mlx5_inbox_hdr *)(in->first.data);
  452. return be16_to_cpu(hdr->opcode);
  453. }
  454. static int wait_func(struct mlx5_core_dev *dev, struct mlx5_cmd_work_ent *ent)
  455. {
  456. unsigned long timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
  457. struct mlx5_cmd *cmd = &dev->cmd;
  458. int err;
  459. if (cmd->mode == CMD_MODE_POLLING) {
  460. wait_for_completion(&ent->done);
  461. err = ent->ret;
  462. } else {
  463. if (!wait_for_completion_timeout(&ent->done, timeout))
  464. err = -ETIMEDOUT;
  465. else
  466. err = 0;
  467. }
  468. if (err == -ETIMEDOUT) {
  469. mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
  470. mlx5_command_str(msg_to_opcode(ent->in)),
  471. msg_to_opcode(ent->in));
  472. }
  473. mlx5_core_dbg(dev, "err %d, delivery status %s(%d)\n",
  474. err, deliv_status_to_str(ent->status), ent->status);
  475. return err;
  476. }
  477. /* Notes:
  478. * 1. Callback functions may not sleep
  479. * 2. page queue commands do not support asynchrous completion
  480. */
  481. static int mlx5_cmd_invoke(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *in,
  482. struct mlx5_cmd_msg *out, void *uout, int uout_size,
  483. mlx5_cmd_cbk_t callback,
  484. void *context, int page_queue, u8 *status)
  485. {
  486. struct mlx5_cmd *cmd = &dev->cmd;
  487. struct mlx5_cmd_work_ent *ent;
  488. struct mlx5_cmd_stats *stats;
  489. int err = 0;
  490. s64 ds;
  491. u16 op;
  492. if (callback && page_queue)
  493. return -EINVAL;
  494. ent = alloc_cmd(cmd, in, out, uout, uout_size, callback, context,
  495. page_queue);
  496. if (IS_ERR(ent))
  497. return PTR_ERR(ent);
  498. if (!callback)
  499. init_completion(&ent->done);
  500. INIT_WORK(&ent->work, cmd_work_handler);
  501. if (page_queue) {
  502. cmd_work_handler(&ent->work);
  503. } else if (!queue_work(cmd->wq, &ent->work)) {
  504. mlx5_core_warn(dev, "failed to queue work\n");
  505. err = -ENOMEM;
  506. goto out_free;
  507. }
  508. if (!callback) {
  509. err = wait_func(dev, ent);
  510. if (err == -ETIMEDOUT)
  511. goto out;
  512. ds = ent->ts2 - ent->ts1;
  513. op = be16_to_cpu(((struct mlx5_inbox_hdr *)in->first.data)->opcode);
  514. if (op < ARRAY_SIZE(cmd->stats)) {
  515. stats = &cmd->stats[op];
  516. spin_lock_irq(&stats->lock);
  517. stats->sum += ds;
  518. ++stats->n;
  519. spin_unlock_irq(&stats->lock);
  520. }
  521. mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_TIME,
  522. "fw exec time for %s is %lld nsec\n",
  523. mlx5_command_str(op), ds);
  524. *status = ent->status;
  525. free_cmd(ent);
  526. }
  527. return err;
  528. out_free:
  529. free_cmd(ent);
  530. out:
  531. return err;
  532. }
  533. static ssize_t dbg_write(struct file *filp, const char __user *buf,
  534. size_t count, loff_t *pos)
  535. {
  536. struct mlx5_core_dev *dev = filp->private_data;
  537. struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
  538. char lbuf[3];
  539. int err;
  540. if (!dbg->in_msg || !dbg->out_msg)
  541. return -ENOMEM;
  542. if (copy_from_user(lbuf, buf, sizeof(lbuf)))
  543. return -EFAULT;
  544. lbuf[sizeof(lbuf) - 1] = 0;
  545. if (strcmp(lbuf, "go"))
  546. return -EINVAL;
  547. err = mlx5_cmd_exec(dev, dbg->in_msg, dbg->inlen, dbg->out_msg, dbg->outlen);
  548. return err ? err : count;
  549. }
  550. static const struct file_operations fops = {
  551. .owner = THIS_MODULE,
  552. .open = simple_open,
  553. .write = dbg_write,
  554. };
  555. static int mlx5_copy_to_msg(struct mlx5_cmd_msg *to, void *from, int size)
  556. {
  557. struct mlx5_cmd_prot_block *block;
  558. struct mlx5_cmd_mailbox *next;
  559. int copy;
  560. if (!to || !from)
  561. return -ENOMEM;
  562. copy = min_t(int, size, sizeof(to->first.data));
  563. memcpy(to->first.data, from, copy);
  564. size -= copy;
  565. from += copy;
  566. next = to->next;
  567. while (size) {
  568. if (!next) {
  569. /* this is a BUG */
  570. return -ENOMEM;
  571. }
  572. copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE);
  573. block = next->buf;
  574. memcpy(block->data, from, copy);
  575. from += copy;
  576. size -= copy;
  577. next = next->next;
  578. }
  579. return 0;
  580. }
  581. static int mlx5_copy_from_msg(void *to, struct mlx5_cmd_msg *from, int size)
  582. {
  583. struct mlx5_cmd_prot_block *block;
  584. struct mlx5_cmd_mailbox *next;
  585. int copy;
  586. if (!to || !from)
  587. return -ENOMEM;
  588. copy = min_t(int, size, sizeof(from->first.data));
  589. memcpy(to, from->first.data, copy);
  590. size -= copy;
  591. to += copy;
  592. next = from->next;
  593. while (size) {
  594. if (!next) {
  595. /* this is a BUG */
  596. return -ENOMEM;
  597. }
  598. copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE);
  599. block = next->buf;
  600. memcpy(to, block->data, copy);
  601. to += copy;
  602. size -= copy;
  603. next = next->next;
  604. }
  605. return 0;
  606. }
  607. static struct mlx5_cmd_mailbox *alloc_cmd_box(struct mlx5_core_dev *dev,
  608. gfp_t flags)
  609. {
  610. struct mlx5_cmd_mailbox *mailbox;
  611. mailbox = kmalloc(sizeof(*mailbox), flags);
  612. if (!mailbox)
  613. return ERR_PTR(-ENOMEM);
  614. mailbox->buf = pci_pool_alloc(dev->cmd.pool, flags,
  615. &mailbox->dma);
  616. if (!mailbox->buf) {
  617. mlx5_core_dbg(dev, "failed allocation\n");
  618. kfree(mailbox);
  619. return ERR_PTR(-ENOMEM);
  620. }
  621. memset(mailbox->buf, 0, sizeof(struct mlx5_cmd_prot_block));
  622. mailbox->next = NULL;
  623. return mailbox;
  624. }
  625. static void free_cmd_box(struct mlx5_core_dev *dev,
  626. struct mlx5_cmd_mailbox *mailbox)
  627. {
  628. pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
  629. kfree(mailbox);
  630. }
  631. static struct mlx5_cmd_msg *mlx5_alloc_cmd_msg(struct mlx5_core_dev *dev,
  632. gfp_t flags, int size)
  633. {
  634. struct mlx5_cmd_mailbox *tmp, *head = NULL;
  635. struct mlx5_cmd_prot_block *block;
  636. struct mlx5_cmd_msg *msg;
  637. int blen;
  638. int err;
  639. int n;
  640. int i;
  641. msg = kzalloc(sizeof(*msg), flags);
  642. if (!msg)
  643. return ERR_PTR(-ENOMEM);
  644. blen = size - min_t(int, sizeof(msg->first.data), size);
  645. n = (blen + MLX5_CMD_DATA_BLOCK_SIZE - 1) / MLX5_CMD_DATA_BLOCK_SIZE;
  646. for (i = 0; i < n; i++) {
  647. tmp = alloc_cmd_box(dev, flags);
  648. if (IS_ERR(tmp)) {
  649. mlx5_core_warn(dev, "failed allocating block\n");
  650. err = PTR_ERR(tmp);
  651. goto err_alloc;
  652. }
  653. block = tmp->buf;
  654. tmp->next = head;
  655. block->next = cpu_to_be64(tmp->next ? tmp->next->dma : 0);
  656. block->block_num = cpu_to_be32(n - i - 1);
  657. head = tmp;
  658. }
  659. msg->next = head;
  660. msg->len = size;
  661. return msg;
  662. err_alloc:
  663. while (head) {
  664. tmp = head->next;
  665. free_cmd_box(dev, head);
  666. head = tmp;
  667. }
  668. kfree(msg);
  669. return ERR_PTR(err);
  670. }
  671. static void mlx5_free_cmd_msg(struct mlx5_core_dev *dev,
  672. struct mlx5_cmd_msg *msg)
  673. {
  674. struct mlx5_cmd_mailbox *head = msg->next;
  675. struct mlx5_cmd_mailbox *next;
  676. while (head) {
  677. next = head->next;
  678. free_cmd_box(dev, head);
  679. head = next;
  680. }
  681. kfree(msg);
  682. }
  683. static ssize_t data_write(struct file *filp, const char __user *buf,
  684. size_t count, loff_t *pos)
  685. {
  686. struct mlx5_core_dev *dev = filp->private_data;
  687. struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
  688. void *ptr;
  689. int err;
  690. if (*pos != 0)
  691. return -EINVAL;
  692. kfree(dbg->in_msg);
  693. dbg->in_msg = NULL;
  694. dbg->inlen = 0;
  695. ptr = kzalloc(count, GFP_KERNEL);
  696. if (!ptr)
  697. return -ENOMEM;
  698. if (copy_from_user(ptr, buf, count)) {
  699. err = -EFAULT;
  700. goto out;
  701. }
  702. dbg->in_msg = ptr;
  703. dbg->inlen = count;
  704. *pos = count;
  705. return count;
  706. out:
  707. kfree(ptr);
  708. return err;
  709. }
  710. static ssize_t data_read(struct file *filp, char __user *buf, size_t count,
  711. loff_t *pos)
  712. {
  713. struct mlx5_core_dev *dev = filp->private_data;
  714. struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
  715. int copy;
  716. if (*pos)
  717. return 0;
  718. if (!dbg->out_msg)
  719. return -ENOMEM;
  720. copy = min_t(int, count, dbg->outlen);
  721. if (copy_to_user(buf, dbg->out_msg, copy))
  722. return -EFAULT;
  723. *pos += copy;
  724. return copy;
  725. }
  726. static const struct file_operations dfops = {
  727. .owner = THIS_MODULE,
  728. .open = simple_open,
  729. .write = data_write,
  730. .read = data_read,
  731. };
  732. static ssize_t outlen_read(struct file *filp, char __user *buf, size_t count,
  733. loff_t *pos)
  734. {
  735. struct mlx5_core_dev *dev = filp->private_data;
  736. struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
  737. char outlen[8];
  738. int err;
  739. if (*pos)
  740. return 0;
  741. err = snprintf(outlen, sizeof(outlen), "%d", dbg->outlen);
  742. if (err < 0)
  743. return err;
  744. if (copy_to_user(buf, &outlen, err))
  745. return -EFAULT;
  746. *pos += err;
  747. return err;
  748. }
  749. static ssize_t outlen_write(struct file *filp, const char __user *buf,
  750. size_t count, loff_t *pos)
  751. {
  752. struct mlx5_core_dev *dev = filp->private_data;
  753. struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
  754. char outlen_str[8];
  755. int outlen;
  756. void *ptr;
  757. int err;
  758. if (*pos != 0 || count > 6)
  759. return -EINVAL;
  760. kfree(dbg->out_msg);
  761. dbg->out_msg = NULL;
  762. dbg->outlen = 0;
  763. if (copy_from_user(outlen_str, buf, count))
  764. return -EFAULT;
  765. outlen_str[7] = 0;
  766. err = sscanf(outlen_str, "%d", &outlen);
  767. if (err < 0)
  768. return err;
  769. ptr = kzalloc(outlen, GFP_KERNEL);
  770. if (!ptr)
  771. return -ENOMEM;
  772. dbg->out_msg = ptr;
  773. dbg->outlen = outlen;
  774. *pos = count;
  775. return count;
  776. }
  777. static const struct file_operations olfops = {
  778. .owner = THIS_MODULE,
  779. .open = simple_open,
  780. .write = outlen_write,
  781. .read = outlen_read,
  782. };
  783. static void set_wqname(struct mlx5_core_dev *dev)
  784. {
  785. struct mlx5_cmd *cmd = &dev->cmd;
  786. snprintf(cmd->wq_name, sizeof(cmd->wq_name), "mlx5_cmd_%s",
  787. dev_name(&dev->pdev->dev));
  788. }
  789. static void clean_debug_files(struct mlx5_core_dev *dev)
  790. {
  791. struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
  792. if (!mlx5_debugfs_root)
  793. return;
  794. mlx5_cmdif_debugfs_cleanup(dev);
  795. debugfs_remove_recursive(dbg->dbg_root);
  796. }
  797. static int create_debugfs_files(struct mlx5_core_dev *dev)
  798. {
  799. struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
  800. int err = -ENOMEM;
  801. if (!mlx5_debugfs_root)
  802. return 0;
  803. dbg->dbg_root = debugfs_create_dir("cmd", dev->priv.dbg_root);
  804. if (!dbg->dbg_root)
  805. return err;
  806. dbg->dbg_in = debugfs_create_file("in", 0400, dbg->dbg_root,
  807. dev, &dfops);
  808. if (!dbg->dbg_in)
  809. goto err_dbg;
  810. dbg->dbg_out = debugfs_create_file("out", 0200, dbg->dbg_root,
  811. dev, &dfops);
  812. if (!dbg->dbg_out)
  813. goto err_dbg;
  814. dbg->dbg_outlen = debugfs_create_file("out_len", 0600, dbg->dbg_root,
  815. dev, &olfops);
  816. if (!dbg->dbg_outlen)
  817. goto err_dbg;
  818. dbg->dbg_status = debugfs_create_u8("status", 0600, dbg->dbg_root,
  819. &dbg->status);
  820. if (!dbg->dbg_status)
  821. goto err_dbg;
  822. dbg->dbg_run = debugfs_create_file("run", 0200, dbg->dbg_root, dev, &fops);
  823. if (!dbg->dbg_run)
  824. goto err_dbg;
  825. mlx5_cmdif_debugfs_init(dev);
  826. return 0;
  827. err_dbg:
  828. clean_debug_files(dev);
  829. return err;
  830. }
  831. void mlx5_cmd_use_events(struct mlx5_core_dev *dev)
  832. {
  833. struct mlx5_cmd *cmd = &dev->cmd;
  834. int i;
  835. for (i = 0; i < cmd->max_reg_cmds; i++)
  836. down(&cmd->sem);
  837. down(&cmd->pages_sem);
  838. flush_workqueue(cmd->wq);
  839. cmd->mode = CMD_MODE_EVENTS;
  840. up(&cmd->pages_sem);
  841. for (i = 0; i < cmd->max_reg_cmds; i++)
  842. up(&cmd->sem);
  843. }
  844. void mlx5_cmd_use_polling(struct mlx5_core_dev *dev)
  845. {
  846. struct mlx5_cmd *cmd = &dev->cmd;
  847. int i;
  848. for (i = 0; i < cmd->max_reg_cmds; i++)
  849. down(&cmd->sem);
  850. down(&cmd->pages_sem);
  851. flush_workqueue(cmd->wq);
  852. cmd->mode = CMD_MODE_POLLING;
  853. up(&cmd->pages_sem);
  854. for (i = 0; i < cmd->max_reg_cmds; i++)
  855. up(&cmd->sem);
  856. }
  857. static void free_msg(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *msg)
  858. {
  859. unsigned long flags;
  860. if (msg->cache) {
  861. spin_lock_irqsave(&msg->cache->lock, flags);
  862. list_add_tail(&msg->list, &msg->cache->head);
  863. spin_unlock_irqrestore(&msg->cache->lock, flags);
  864. } else {
  865. mlx5_free_cmd_msg(dev, msg);
  866. }
  867. }
  868. void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, unsigned long vector)
  869. {
  870. struct mlx5_cmd *cmd = &dev->cmd;
  871. struct mlx5_cmd_work_ent *ent;
  872. mlx5_cmd_cbk_t callback;
  873. void *context;
  874. int err;
  875. int i;
  876. s64 ds;
  877. struct mlx5_cmd_stats *stats;
  878. unsigned long flags;
  879. for (i = 0; i < (1 << cmd->log_sz); i++) {
  880. if (test_bit(i, &vector)) {
  881. struct semaphore *sem;
  882. ent = cmd->ent_arr[i];
  883. if (ent->page_queue)
  884. sem = &cmd->pages_sem;
  885. else
  886. sem = &cmd->sem;
  887. ent->ts2 = ktime_get_ns();
  888. memcpy(ent->out->first.data, ent->lay->out, sizeof(ent->lay->out));
  889. dump_command(dev, ent, 0);
  890. if (!ent->ret) {
  891. if (!cmd->checksum_disabled)
  892. ent->ret = verify_signature(ent);
  893. else
  894. ent->ret = 0;
  895. ent->status = ent->lay->status_own >> 1;
  896. mlx5_core_dbg(dev, "command completed. ret 0x%x, delivery status %s(0x%x)\n",
  897. ent->ret, deliv_status_to_str(ent->status), ent->status);
  898. }
  899. free_ent(cmd, ent->idx);
  900. if (ent->callback) {
  901. ds = ent->ts2 - ent->ts1;
  902. if (ent->op < ARRAY_SIZE(cmd->stats)) {
  903. stats = &cmd->stats[ent->op];
  904. spin_lock_irqsave(&stats->lock, flags);
  905. stats->sum += ds;
  906. ++stats->n;
  907. spin_unlock_irqrestore(&stats->lock, flags);
  908. }
  909. callback = ent->callback;
  910. context = ent->context;
  911. err = ent->ret;
  912. if (!err)
  913. err = mlx5_copy_from_msg(ent->uout,
  914. ent->out,
  915. ent->uout_size);
  916. mlx5_free_cmd_msg(dev, ent->out);
  917. free_msg(dev, ent->in);
  918. free_cmd(ent);
  919. callback(err, context);
  920. } else {
  921. complete(&ent->done);
  922. }
  923. up(sem);
  924. }
  925. }
  926. }
  927. EXPORT_SYMBOL(mlx5_cmd_comp_handler);
  928. static int status_to_err(u8 status)
  929. {
  930. return status ? -1 : 0; /* TBD more meaningful codes */
  931. }
  932. static struct mlx5_cmd_msg *alloc_msg(struct mlx5_core_dev *dev, int in_size,
  933. gfp_t gfp)
  934. {
  935. struct mlx5_cmd_msg *msg = ERR_PTR(-ENOMEM);
  936. struct mlx5_cmd *cmd = &dev->cmd;
  937. struct cache_ent *ent = NULL;
  938. if (in_size > MED_LIST_SIZE && in_size <= LONG_LIST_SIZE)
  939. ent = &cmd->cache.large;
  940. else if (in_size > 16 && in_size <= MED_LIST_SIZE)
  941. ent = &cmd->cache.med;
  942. if (ent) {
  943. spin_lock_irq(&ent->lock);
  944. if (!list_empty(&ent->head)) {
  945. msg = list_entry(ent->head.next, typeof(*msg), list);
  946. /* For cached lists, we must explicitly state what is
  947. * the real size
  948. */
  949. msg->len = in_size;
  950. list_del(&msg->list);
  951. }
  952. spin_unlock_irq(&ent->lock);
  953. }
  954. if (IS_ERR(msg))
  955. msg = mlx5_alloc_cmd_msg(dev, gfp, in_size);
  956. return msg;
  957. }
  958. static int is_manage_pages(struct mlx5_inbox_hdr *in)
  959. {
  960. return be16_to_cpu(in->opcode) == MLX5_CMD_OP_MANAGE_PAGES;
  961. }
  962. static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
  963. int out_size, mlx5_cmd_cbk_t callback, void *context)
  964. {
  965. struct mlx5_cmd_msg *inb;
  966. struct mlx5_cmd_msg *outb;
  967. int pages_queue;
  968. gfp_t gfp;
  969. int err;
  970. u8 status = 0;
  971. pages_queue = is_manage_pages(in);
  972. gfp = callback ? GFP_ATOMIC : GFP_KERNEL;
  973. inb = alloc_msg(dev, in_size, gfp);
  974. if (IS_ERR(inb)) {
  975. err = PTR_ERR(inb);
  976. return err;
  977. }
  978. err = mlx5_copy_to_msg(inb, in, in_size);
  979. if (err) {
  980. mlx5_core_warn(dev, "err %d\n", err);
  981. goto out_in;
  982. }
  983. outb = mlx5_alloc_cmd_msg(dev, gfp, out_size);
  984. if (IS_ERR(outb)) {
  985. err = PTR_ERR(outb);
  986. goto out_in;
  987. }
  988. err = mlx5_cmd_invoke(dev, inb, outb, out, out_size, callback, context,
  989. pages_queue, &status);
  990. if (err)
  991. goto out_out;
  992. mlx5_core_dbg(dev, "err %d, status %d\n", err, status);
  993. if (status) {
  994. err = status_to_err(status);
  995. goto out_out;
  996. }
  997. if (!callback)
  998. err = mlx5_copy_from_msg(out, outb, out_size);
  999. out_out:
  1000. if (!callback)
  1001. mlx5_free_cmd_msg(dev, outb);
  1002. out_in:
  1003. if (!callback)
  1004. free_msg(dev, inb);
  1005. return err;
  1006. }
  1007. int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
  1008. int out_size)
  1009. {
  1010. return cmd_exec(dev, in, in_size, out, out_size, NULL, NULL);
  1011. }
  1012. EXPORT_SYMBOL(mlx5_cmd_exec);
  1013. int mlx5_cmd_exec_cb(struct mlx5_core_dev *dev, void *in, int in_size,
  1014. void *out, int out_size, mlx5_cmd_cbk_t callback,
  1015. void *context)
  1016. {
  1017. return cmd_exec(dev, in, in_size, out, out_size, callback, context);
  1018. }
  1019. EXPORT_SYMBOL(mlx5_cmd_exec_cb);
  1020. static void destroy_msg_cache(struct mlx5_core_dev *dev)
  1021. {
  1022. struct mlx5_cmd *cmd = &dev->cmd;
  1023. struct mlx5_cmd_msg *msg;
  1024. struct mlx5_cmd_msg *n;
  1025. list_for_each_entry_safe(msg, n, &cmd->cache.large.head, list) {
  1026. list_del(&msg->list);
  1027. mlx5_free_cmd_msg(dev, msg);
  1028. }
  1029. list_for_each_entry_safe(msg, n, &cmd->cache.med.head, list) {
  1030. list_del(&msg->list);
  1031. mlx5_free_cmd_msg(dev, msg);
  1032. }
  1033. }
  1034. static int create_msg_cache(struct mlx5_core_dev *dev)
  1035. {
  1036. struct mlx5_cmd *cmd = &dev->cmd;
  1037. struct mlx5_cmd_msg *msg;
  1038. int err;
  1039. int i;
  1040. spin_lock_init(&cmd->cache.large.lock);
  1041. INIT_LIST_HEAD(&cmd->cache.large.head);
  1042. spin_lock_init(&cmd->cache.med.lock);
  1043. INIT_LIST_HEAD(&cmd->cache.med.head);
  1044. for (i = 0; i < NUM_LONG_LISTS; i++) {
  1045. msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, LONG_LIST_SIZE);
  1046. if (IS_ERR(msg)) {
  1047. err = PTR_ERR(msg);
  1048. goto ex_err;
  1049. }
  1050. msg->cache = &cmd->cache.large;
  1051. list_add_tail(&msg->list, &cmd->cache.large.head);
  1052. }
  1053. for (i = 0; i < NUM_MED_LISTS; i++) {
  1054. msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, MED_LIST_SIZE);
  1055. if (IS_ERR(msg)) {
  1056. err = PTR_ERR(msg);
  1057. goto ex_err;
  1058. }
  1059. msg->cache = &cmd->cache.med;
  1060. list_add_tail(&msg->list, &cmd->cache.med.head);
  1061. }
  1062. return 0;
  1063. ex_err:
  1064. destroy_msg_cache(dev);
  1065. return err;
  1066. }
  1067. static int alloc_cmd_page(struct mlx5_core_dev *dev, struct mlx5_cmd *cmd)
  1068. {
  1069. struct device *ddev = &dev->pdev->dev;
  1070. cmd->cmd_alloc_buf = dma_zalloc_coherent(ddev, MLX5_ADAPTER_PAGE_SIZE,
  1071. &cmd->alloc_dma, GFP_KERNEL);
  1072. if (!cmd->cmd_alloc_buf)
  1073. return -ENOMEM;
  1074. /* make sure it is aligned to 4K */
  1075. if (!((uintptr_t)cmd->cmd_alloc_buf & (MLX5_ADAPTER_PAGE_SIZE - 1))) {
  1076. cmd->cmd_buf = cmd->cmd_alloc_buf;
  1077. cmd->dma = cmd->alloc_dma;
  1078. cmd->alloc_size = MLX5_ADAPTER_PAGE_SIZE;
  1079. return 0;
  1080. }
  1081. dma_free_coherent(ddev, MLX5_ADAPTER_PAGE_SIZE, cmd->cmd_alloc_buf,
  1082. cmd->alloc_dma);
  1083. cmd->cmd_alloc_buf = dma_zalloc_coherent(ddev,
  1084. 2 * MLX5_ADAPTER_PAGE_SIZE - 1,
  1085. &cmd->alloc_dma, GFP_KERNEL);
  1086. if (!cmd->cmd_alloc_buf)
  1087. return -ENOMEM;
  1088. cmd->cmd_buf = PTR_ALIGN(cmd->cmd_alloc_buf, MLX5_ADAPTER_PAGE_SIZE);
  1089. cmd->dma = ALIGN(cmd->alloc_dma, MLX5_ADAPTER_PAGE_SIZE);
  1090. cmd->alloc_size = 2 * MLX5_ADAPTER_PAGE_SIZE - 1;
  1091. return 0;
  1092. }
  1093. static void free_cmd_page(struct mlx5_core_dev *dev, struct mlx5_cmd *cmd)
  1094. {
  1095. struct device *ddev = &dev->pdev->dev;
  1096. dma_free_coherent(ddev, cmd->alloc_size, cmd->cmd_alloc_buf,
  1097. cmd->alloc_dma);
  1098. }
  1099. int mlx5_cmd_init(struct mlx5_core_dev *dev)
  1100. {
  1101. int size = sizeof(struct mlx5_cmd_prot_block);
  1102. int align = roundup_pow_of_two(size);
  1103. struct mlx5_cmd *cmd = &dev->cmd;
  1104. u32 cmd_h, cmd_l;
  1105. u16 cmd_if_rev;
  1106. int err;
  1107. int i;
  1108. cmd_if_rev = cmdif_rev(dev);
  1109. if (cmd_if_rev != CMD_IF_REV) {
  1110. dev_err(&dev->pdev->dev,
  1111. "Driver cmdif rev(%d) differs from firmware's(%d)\n",
  1112. CMD_IF_REV, cmd_if_rev);
  1113. return -EINVAL;
  1114. }
  1115. cmd->pool = pci_pool_create("mlx5_cmd", dev->pdev, size, align, 0);
  1116. if (!cmd->pool)
  1117. return -ENOMEM;
  1118. err = alloc_cmd_page(dev, cmd);
  1119. if (err)
  1120. goto err_free_pool;
  1121. cmd_l = ioread32be(&dev->iseg->cmdq_addr_l_sz) & 0xff;
  1122. cmd->log_sz = cmd_l >> 4 & 0xf;
  1123. cmd->log_stride = cmd_l & 0xf;
  1124. if (1 << cmd->log_sz > MLX5_MAX_COMMANDS) {
  1125. dev_err(&dev->pdev->dev, "firmware reports too many outstanding commands %d\n",
  1126. 1 << cmd->log_sz);
  1127. err = -EINVAL;
  1128. goto err_free_page;
  1129. }
  1130. if (cmd->log_sz + cmd->log_stride > MLX5_ADAPTER_PAGE_SHIFT) {
  1131. dev_err(&dev->pdev->dev, "command queue size overflow\n");
  1132. err = -EINVAL;
  1133. goto err_free_page;
  1134. }
  1135. cmd->checksum_disabled = 1;
  1136. cmd->max_reg_cmds = (1 << cmd->log_sz) - 1;
  1137. cmd->bitmask = (1 << cmd->max_reg_cmds) - 1;
  1138. cmd->cmdif_rev = ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16;
  1139. if (cmd->cmdif_rev > CMD_IF_REV) {
  1140. dev_err(&dev->pdev->dev, "driver does not support command interface version. driver %d, firmware %d\n",
  1141. CMD_IF_REV, cmd->cmdif_rev);
  1142. err = -ENOTSUPP;
  1143. goto err_free_page;
  1144. }
  1145. spin_lock_init(&cmd->alloc_lock);
  1146. spin_lock_init(&cmd->token_lock);
  1147. for (i = 0; i < ARRAY_SIZE(cmd->stats); i++)
  1148. spin_lock_init(&cmd->stats[i].lock);
  1149. sema_init(&cmd->sem, cmd->max_reg_cmds);
  1150. sema_init(&cmd->pages_sem, 1);
  1151. cmd_h = (u32)((u64)(cmd->dma) >> 32);
  1152. cmd_l = (u32)(cmd->dma);
  1153. if (cmd_l & 0xfff) {
  1154. dev_err(&dev->pdev->dev, "invalid command queue address\n");
  1155. err = -ENOMEM;
  1156. goto err_free_page;
  1157. }
  1158. iowrite32be(cmd_h, &dev->iseg->cmdq_addr_h);
  1159. iowrite32be(cmd_l, &dev->iseg->cmdq_addr_l_sz);
  1160. /* Make sure firmware sees the complete address before we proceed */
  1161. wmb();
  1162. mlx5_core_dbg(dev, "descriptor at dma 0x%llx\n", (unsigned long long)(cmd->dma));
  1163. cmd->mode = CMD_MODE_POLLING;
  1164. err = create_msg_cache(dev);
  1165. if (err) {
  1166. dev_err(&dev->pdev->dev, "failed to create command cache\n");
  1167. goto err_free_page;
  1168. }
  1169. set_wqname(dev);
  1170. cmd->wq = create_singlethread_workqueue(cmd->wq_name);
  1171. if (!cmd->wq) {
  1172. dev_err(&dev->pdev->dev, "failed to create command workqueue\n");
  1173. err = -ENOMEM;
  1174. goto err_cache;
  1175. }
  1176. err = create_debugfs_files(dev);
  1177. if (err) {
  1178. err = -ENOMEM;
  1179. goto err_wq;
  1180. }
  1181. return 0;
  1182. err_wq:
  1183. destroy_workqueue(cmd->wq);
  1184. err_cache:
  1185. destroy_msg_cache(dev);
  1186. err_free_page:
  1187. free_cmd_page(dev, cmd);
  1188. err_free_pool:
  1189. pci_pool_destroy(cmd->pool);
  1190. return err;
  1191. }
  1192. EXPORT_SYMBOL(mlx5_cmd_init);
  1193. void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
  1194. {
  1195. struct mlx5_cmd *cmd = &dev->cmd;
  1196. clean_debug_files(dev);
  1197. destroy_workqueue(cmd->wq);
  1198. destroy_msg_cache(dev);
  1199. free_cmd_page(dev, cmd);
  1200. pci_pool_destroy(cmd->pool);
  1201. }
  1202. EXPORT_SYMBOL(mlx5_cmd_cleanup);
  1203. static const char *cmd_status_str(u8 status)
  1204. {
  1205. switch (status) {
  1206. case MLX5_CMD_STAT_OK:
  1207. return "OK";
  1208. case MLX5_CMD_STAT_INT_ERR:
  1209. return "internal error";
  1210. case MLX5_CMD_STAT_BAD_OP_ERR:
  1211. return "bad operation";
  1212. case MLX5_CMD_STAT_BAD_PARAM_ERR:
  1213. return "bad parameter";
  1214. case MLX5_CMD_STAT_BAD_SYS_STATE_ERR:
  1215. return "bad system state";
  1216. case MLX5_CMD_STAT_BAD_RES_ERR:
  1217. return "bad resource";
  1218. case MLX5_CMD_STAT_RES_BUSY:
  1219. return "resource busy";
  1220. case MLX5_CMD_STAT_LIM_ERR:
  1221. return "limits exceeded";
  1222. case MLX5_CMD_STAT_BAD_RES_STATE_ERR:
  1223. return "bad resource state";
  1224. case MLX5_CMD_STAT_IX_ERR:
  1225. return "bad index";
  1226. case MLX5_CMD_STAT_NO_RES_ERR:
  1227. return "no resources";
  1228. case MLX5_CMD_STAT_BAD_INP_LEN_ERR:
  1229. return "bad input length";
  1230. case MLX5_CMD_STAT_BAD_OUTP_LEN_ERR:
  1231. return "bad output length";
  1232. case MLX5_CMD_STAT_BAD_QP_STATE_ERR:
  1233. return "bad QP state";
  1234. case MLX5_CMD_STAT_BAD_PKT_ERR:
  1235. return "bad packet (discarded)";
  1236. case MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR:
  1237. return "bad size too many outstanding CQEs";
  1238. default:
  1239. return "unknown status";
  1240. }
  1241. }
  1242. static int cmd_status_to_err(u8 status)
  1243. {
  1244. switch (status) {
  1245. case MLX5_CMD_STAT_OK: return 0;
  1246. case MLX5_CMD_STAT_INT_ERR: return -EIO;
  1247. case MLX5_CMD_STAT_BAD_OP_ERR: return -EINVAL;
  1248. case MLX5_CMD_STAT_BAD_PARAM_ERR: return -EINVAL;
  1249. case MLX5_CMD_STAT_BAD_SYS_STATE_ERR: return -EIO;
  1250. case MLX5_CMD_STAT_BAD_RES_ERR: return -EINVAL;
  1251. case MLX5_CMD_STAT_RES_BUSY: return -EBUSY;
  1252. case MLX5_CMD_STAT_LIM_ERR: return -ENOMEM;
  1253. case MLX5_CMD_STAT_BAD_RES_STATE_ERR: return -EINVAL;
  1254. case MLX5_CMD_STAT_IX_ERR: return -EINVAL;
  1255. case MLX5_CMD_STAT_NO_RES_ERR: return -EAGAIN;
  1256. case MLX5_CMD_STAT_BAD_INP_LEN_ERR: return -EIO;
  1257. case MLX5_CMD_STAT_BAD_OUTP_LEN_ERR: return -EIO;
  1258. case MLX5_CMD_STAT_BAD_QP_STATE_ERR: return -EINVAL;
  1259. case MLX5_CMD_STAT_BAD_PKT_ERR: return -EINVAL;
  1260. case MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR: return -EINVAL;
  1261. default: return -EIO;
  1262. }
  1263. }
  1264. /* this will be available till all the commands use set/get macros */
  1265. int mlx5_cmd_status_to_err(struct mlx5_outbox_hdr *hdr)
  1266. {
  1267. if (!hdr->status)
  1268. return 0;
  1269. pr_warn("command failed, status %s(0x%x), syndrome 0x%x\n",
  1270. cmd_status_str(hdr->status), hdr->status,
  1271. be32_to_cpu(hdr->syndrome));
  1272. return cmd_status_to_err(hdr->status);
  1273. }
  1274. int mlx5_cmd_status_to_err_v2(void *ptr)
  1275. {
  1276. u32 syndrome;
  1277. u8 status;
  1278. status = be32_to_cpu(*(__be32 *)ptr) >> 24;
  1279. if (!status)
  1280. return 0;
  1281. syndrome = be32_to_cpu(*(__be32 *)(ptr + 4));
  1282. pr_warn("command failed, status %s(0x%x), syndrome 0x%x\n",
  1283. cmd_status_str(status), status, syndrome);
  1284. return cmd_status_to_err(status);
  1285. }