twl6040.c 20 KB

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  1. /*
  2. * MFD driver for TWL6040 audio device
  3. *
  4. * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
  5. * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
  6. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  7. *
  8. * Copyright: (C) 2011 Texas Instruments, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22. * 02110-1301 USA
  23. *
  24. */
  25. #include <linux/module.h>
  26. #include <linux/types.h>
  27. #include <linux/slab.h>
  28. #include <linux/kernel.h>
  29. #include <linux/err.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/of.h>
  32. #include <linux/of_irq.h>
  33. #include <linux/of_gpio.h>
  34. #include <linux/of_platform.h>
  35. #include <linux/gpio.h>
  36. #include <linux/delay.h>
  37. #include <linux/i2c.h>
  38. #include <linux/regmap.h>
  39. #include <linux/mfd/core.h>
  40. #include <linux/mfd/twl6040.h>
  41. #include <linux/regulator/consumer.h>
  42. #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
  43. #define TWL6040_NUM_SUPPLIES (2)
  44. static const struct reg_default twl6040_defaults[] = {
  45. { 0x01, 0x4B }, /* REG_ASICID (ro) */
  46. { 0x02, 0x00 }, /* REG_ASICREV (ro) */
  47. { 0x03, 0x00 }, /* REG_INTID */
  48. { 0x04, 0x00 }, /* REG_INTMR */
  49. { 0x05, 0x00 }, /* REG_NCPCTRL */
  50. { 0x06, 0x00 }, /* REG_LDOCTL */
  51. { 0x07, 0x60 }, /* REG_HPPLLCTL */
  52. { 0x08, 0x00 }, /* REG_LPPLLCTL */
  53. { 0x09, 0x4A }, /* REG_LPPLLDIV */
  54. { 0x0A, 0x00 }, /* REG_AMICBCTL */
  55. { 0x0B, 0x00 }, /* REG_DMICBCTL */
  56. { 0x0C, 0x00 }, /* REG_MICLCTL */
  57. { 0x0D, 0x00 }, /* REG_MICRCTL */
  58. { 0x0E, 0x00 }, /* REG_MICGAIN */
  59. { 0x0F, 0x1B }, /* REG_LINEGAIN */
  60. { 0x10, 0x00 }, /* REG_HSLCTL */
  61. { 0x11, 0x00 }, /* REG_HSRCTL */
  62. { 0x12, 0x00 }, /* REG_HSGAIN */
  63. { 0x13, 0x00 }, /* REG_EARCTL */
  64. { 0x14, 0x00 }, /* REG_HFLCTL */
  65. { 0x15, 0x00 }, /* REG_HFLGAIN */
  66. { 0x16, 0x00 }, /* REG_HFRCTL */
  67. { 0x17, 0x00 }, /* REG_HFRGAIN */
  68. { 0x18, 0x00 }, /* REG_VIBCTLL */
  69. { 0x19, 0x00 }, /* REG_VIBDATL */
  70. { 0x1A, 0x00 }, /* REG_VIBCTLR */
  71. { 0x1B, 0x00 }, /* REG_VIBDATR */
  72. { 0x1C, 0x00 }, /* REG_HKCTL1 */
  73. { 0x1D, 0x00 }, /* REG_HKCTL2 */
  74. { 0x1E, 0x00 }, /* REG_GPOCTL */
  75. { 0x1F, 0x00 }, /* REG_ALB */
  76. { 0x20, 0x00 }, /* REG_DLB */
  77. /* 0x28, REG_TRIM1 */
  78. /* 0x29, REG_TRIM2 */
  79. /* 0x2A, REG_TRIM3 */
  80. /* 0x2B, REG_HSOTRIM */
  81. /* 0x2C, REG_HFOTRIM */
  82. { 0x2D, 0x08 }, /* REG_ACCCTL */
  83. { 0x2E, 0x00 }, /* REG_STATUS (ro) */
  84. };
  85. static struct reg_default twl6040_patch[] = {
  86. /*
  87. * Select I2C bus access to dual access registers
  88. * Interrupt register is cleared on read
  89. * Select fast mode for i2c (400KHz)
  90. */
  91. { TWL6040_REG_ACCCTL,
  92. TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
  93. };
  94. static bool twl6040_has_vibra(struct device_node *node)
  95. {
  96. #ifdef CONFIG_OF
  97. if (of_find_node_by_name(node, "vibra"))
  98. return true;
  99. #endif
  100. return false;
  101. }
  102. int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
  103. {
  104. int ret;
  105. unsigned int val;
  106. ret = regmap_read(twl6040->regmap, reg, &val);
  107. if (ret < 0)
  108. return ret;
  109. return val;
  110. }
  111. EXPORT_SYMBOL(twl6040_reg_read);
  112. int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
  113. {
  114. int ret;
  115. ret = regmap_write(twl6040->regmap, reg, val);
  116. return ret;
  117. }
  118. EXPORT_SYMBOL(twl6040_reg_write);
  119. int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  120. {
  121. return regmap_update_bits(twl6040->regmap, reg, mask, mask);
  122. }
  123. EXPORT_SYMBOL(twl6040_set_bits);
  124. int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  125. {
  126. return regmap_update_bits(twl6040->regmap, reg, mask, 0);
  127. }
  128. EXPORT_SYMBOL(twl6040_clear_bits);
  129. /* twl6040 codec manual power-up sequence */
  130. static int twl6040_power_up_manual(struct twl6040 *twl6040)
  131. {
  132. u8 ldoctl, ncpctl, lppllctl;
  133. int ret;
  134. /* enable high-side LDO, reference system and internal oscillator */
  135. ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
  136. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  137. if (ret)
  138. return ret;
  139. usleep_range(10000, 10500);
  140. /* enable negative charge pump */
  141. ncpctl = TWL6040_NCPENA;
  142. ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  143. if (ret)
  144. goto ncp_err;
  145. usleep_range(1000, 1500);
  146. /* enable low-side LDO */
  147. ldoctl |= TWL6040_LSLDOENA;
  148. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  149. if (ret)
  150. goto lsldo_err;
  151. usleep_range(1000, 1500);
  152. /* enable low-power PLL */
  153. lppllctl = TWL6040_LPLLENA;
  154. ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  155. if (ret)
  156. goto lppll_err;
  157. usleep_range(5000, 5500);
  158. /* disable internal oscillator */
  159. ldoctl &= ~TWL6040_OSCENA;
  160. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  161. if (ret)
  162. goto osc_err;
  163. return 0;
  164. osc_err:
  165. lppllctl &= ~TWL6040_LPLLENA;
  166. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  167. lppll_err:
  168. ldoctl &= ~TWL6040_LSLDOENA;
  169. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  170. lsldo_err:
  171. ncpctl &= ~TWL6040_NCPENA;
  172. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  173. ncp_err:
  174. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  175. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  176. dev_err(twl6040->dev, "manual power-up failed\n");
  177. return ret;
  178. }
  179. /* twl6040 manual power-down sequence */
  180. static void twl6040_power_down_manual(struct twl6040 *twl6040)
  181. {
  182. u8 ncpctl, ldoctl, lppllctl;
  183. ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
  184. ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
  185. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  186. /* enable internal oscillator */
  187. ldoctl |= TWL6040_OSCENA;
  188. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  189. usleep_range(1000, 1500);
  190. /* disable low-power PLL */
  191. lppllctl &= ~TWL6040_LPLLENA;
  192. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  193. /* disable low-side LDO */
  194. ldoctl &= ~TWL6040_LSLDOENA;
  195. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  196. /* disable negative charge pump */
  197. ncpctl &= ~TWL6040_NCPENA;
  198. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  199. /* disable high-side LDO, reference system and internal oscillator */
  200. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  201. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  202. }
  203. static irqreturn_t twl6040_readyint_handler(int irq, void *data)
  204. {
  205. struct twl6040 *twl6040 = data;
  206. complete(&twl6040->ready);
  207. return IRQ_HANDLED;
  208. }
  209. static irqreturn_t twl6040_thint_handler(int irq, void *data)
  210. {
  211. struct twl6040 *twl6040 = data;
  212. u8 status;
  213. status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
  214. if (status & TWL6040_TSHUTDET) {
  215. dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
  216. twl6040_power(twl6040, 0);
  217. } else {
  218. dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
  219. twl6040_power(twl6040, 1);
  220. }
  221. return IRQ_HANDLED;
  222. }
  223. static int twl6040_power_up_automatic(struct twl6040 *twl6040)
  224. {
  225. int time_left;
  226. gpio_set_value(twl6040->audpwron, 1);
  227. time_left = wait_for_completion_timeout(&twl6040->ready,
  228. msecs_to_jiffies(144));
  229. if (!time_left) {
  230. u8 intid;
  231. dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
  232. intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  233. if (!(intid & TWL6040_READYINT)) {
  234. dev_err(twl6040->dev, "automatic power-up failed\n");
  235. gpio_set_value(twl6040->audpwron, 0);
  236. return -ETIMEDOUT;
  237. }
  238. }
  239. return 0;
  240. }
  241. int twl6040_power(struct twl6040 *twl6040, int on)
  242. {
  243. int ret = 0;
  244. mutex_lock(&twl6040->mutex);
  245. if (on) {
  246. /* already powered-up */
  247. if (twl6040->power_count++)
  248. goto out;
  249. clk_prepare_enable(twl6040->clk32k);
  250. /* Allow writes to the chip */
  251. regcache_cache_only(twl6040->regmap, false);
  252. if (gpio_is_valid(twl6040->audpwron)) {
  253. /* use automatic power-up sequence */
  254. ret = twl6040_power_up_automatic(twl6040);
  255. if (ret) {
  256. twl6040->power_count = 0;
  257. goto out;
  258. }
  259. } else {
  260. /* use manual power-up sequence */
  261. ret = twl6040_power_up_manual(twl6040);
  262. if (ret) {
  263. twl6040->power_count = 0;
  264. goto out;
  265. }
  266. }
  267. /* Sync with the HW */
  268. regcache_sync(twl6040->regmap);
  269. /* Default PLL configuration after power up */
  270. twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
  271. twl6040->sysclk = 19200000;
  272. twl6040->mclk = 32768;
  273. } else {
  274. /* already powered-down */
  275. if (!twl6040->power_count) {
  276. dev_err(twl6040->dev,
  277. "device is already powered-off\n");
  278. ret = -EPERM;
  279. goto out;
  280. }
  281. if (--twl6040->power_count)
  282. goto out;
  283. if (gpio_is_valid(twl6040->audpwron)) {
  284. /* use AUDPWRON line */
  285. gpio_set_value(twl6040->audpwron, 0);
  286. /* power-down sequence latency */
  287. usleep_range(500, 700);
  288. } else {
  289. /* use manual power-down sequence */
  290. twl6040_power_down_manual(twl6040);
  291. }
  292. /* Set regmap to cache only and mark it as dirty */
  293. regcache_cache_only(twl6040->regmap, true);
  294. regcache_mark_dirty(twl6040->regmap);
  295. twl6040->sysclk = 0;
  296. twl6040->mclk = 0;
  297. clk_disable_unprepare(twl6040->clk32k);
  298. }
  299. out:
  300. mutex_unlock(&twl6040->mutex);
  301. return ret;
  302. }
  303. EXPORT_SYMBOL(twl6040_power);
  304. int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
  305. unsigned int freq_in, unsigned int freq_out)
  306. {
  307. u8 hppllctl, lppllctl;
  308. int ret = 0;
  309. mutex_lock(&twl6040->mutex);
  310. hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
  311. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  312. /* Force full reconfiguration when switching between PLL */
  313. if (pll_id != twl6040->pll) {
  314. twl6040->sysclk = 0;
  315. twl6040->mclk = 0;
  316. }
  317. switch (pll_id) {
  318. case TWL6040_SYSCLK_SEL_LPPLL:
  319. /* low-power PLL divider */
  320. /* Change the sysclk configuration only if it has been canged */
  321. if (twl6040->sysclk != freq_out) {
  322. switch (freq_out) {
  323. case 17640000:
  324. lppllctl |= TWL6040_LPLLFIN;
  325. break;
  326. case 19200000:
  327. lppllctl &= ~TWL6040_LPLLFIN;
  328. break;
  329. default:
  330. dev_err(twl6040->dev,
  331. "freq_out %d not supported\n",
  332. freq_out);
  333. ret = -EINVAL;
  334. goto pll_out;
  335. }
  336. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  337. lppllctl);
  338. }
  339. /* The PLL in use has not been change, we can exit */
  340. if (twl6040->pll == pll_id)
  341. break;
  342. switch (freq_in) {
  343. case 32768:
  344. lppllctl |= TWL6040_LPLLENA;
  345. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  346. lppllctl);
  347. mdelay(5);
  348. lppllctl &= ~TWL6040_HPLLSEL;
  349. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  350. lppllctl);
  351. hppllctl &= ~TWL6040_HPLLENA;
  352. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  353. hppllctl);
  354. break;
  355. default:
  356. dev_err(twl6040->dev,
  357. "freq_in %d not supported\n", freq_in);
  358. ret = -EINVAL;
  359. goto pll_out;
  360. }
  361. break;
  362. case TWL6040_SYSCLK_SEL_HPPLL:
  363. /* high-performance PLL can provide only 19.2 MHz */
  364. if (freq_out != 19200000) {
  365. dev_err(twl6040->dev,
  366. "freq_out %d not supported\n", freq_out);
  367. ret = -EINVAL;
  368. goto pll_out;
  369. }
  370. if (twl6040->mclk != freq_in) {
  371. hppllctl &= ~TWL6040_MCLK_MSK;
  372. switch (freq_in) {
  373. case 12000000:
  374. /* PLL enabled, active mode */
  375. hppllctl |= TWL6040_MCLK_12000KHZ |
  376. TWL6040_HPLLENA;
  377. break;
  378. case 19200000:
  379. /* PLL enabled, bypass mode */
  380. hppllctl |= TWL6040_MCLK_19200KHZ |
  381. TWL6040_HPLLBP | TWL6040_HPLLENA;
  382. break;
  383. case 26000000:
  384. /* PLL enabled, active mode */
  385. hppllctl |= TWL6040_MCLK_26000KHZ |
  386. TWL6040_HPLLENA;
  387. break;
  388. case 38400000:
  389. /* PLL enabled, bypass mode */
  390. hppllctl |= TWL6040_MCLK_38400KHZ |
  391. TWL6040_HPLLBP | TWL6040_HPLLENA;
  392. break;
  393. default:
  394. dev_err(twl6040->dev,
  395. "freq_in %d not supported\n", freq_in);
  396. ret = -EINVAL;
  397. goto pll_out;
  398. }
  399. /*
  400. * enable clock slicer to ensure input waveform is
  401. * square
  402. */
  403. hppllctl |= TWL6040_HPLLSQRENA;
  404. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  405. hppllctl);
  406. usleep_range(500, 700);
  407. lppllctl |= TWL6040_HPLLSEL;
  408. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  409. lppllctl);
  410. lppllctl &= ~TWL6040_LPLLENA;
  411. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  412. lppllctl);
  413. }
  414. break;
  415. default:
  416. dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
  417. ret = -EINVAL;
  418. goto pll_out;
  419. }
  420. twl6040->sysclk = freq_out;
  421. twl6040->mclk = freq_in;
  422. twl6040->pll = pll_id;
  423. pll_out:
  424. mutex_unlock(&twl6040->mutex);
  425. return ret;
  426. }
  427. EXPORT_SYMBOL(twl6040_set_pll);
  428. int twl6040_get_pll(struct twl6040 *twl6040)
  429. {
  430. if (twl6040->power_count)
  431. return twl6040->pll;
  432. else
  433. return -ENODEV;
  434. }
  435. EXPORT_SYMBOL(twl6040_get_pll);
  436. unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
  437. {
  438. return twl6040->sysclk;
  439. }
  440. EXPORT_SYMBOL(twl6040_get_sysclk);
  441. /* Get the combined status of the vibra control register */
  442. int twl6040_get_vibralr_status(struct twl6040 *twl6040)
  443. {
  444. unsigned int reg;
  445. int ret;
  446. u8 status;
  447. ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
  448. if (ret != 0)
  449. return ret;
  450. status = reg;
  451. ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
  452. if (ret != 0)
  453. return ret;
  454. status |= reg;
  455. status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
  456. return status;
  457. }
  458. EXPORT_SYMBOL(twl6040_get_vibralr_status);
  459. static struct resource twl6040_vibra_rsrc[] = {
  460. {
  461. .flags = IORESOURCE_IRQ,
  462. },
  463. };
  464. static struct resource twl6040_codec_rsrc[] = {
  465. {
  466. .flags = IORESOURCE_IRQ,
  467. },
  468. };
  469. static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
  470. {
  471. /* Register 0 is not readable */
  472. if (!reg)
  473. return false;
  474. return true;
  475. }
  476. static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
  477. {
  478. switch (reg) {
  479. case TWL6040_REG_ASICID:
  480. case TWL6040_REG_ASICREV:
  481. case TWL6040_REG_INTID:
  482. case TWL6040_REG_LPPLLCTL:
  483. case TWL6040_REG_HPPLLCTL:
  484. case TWL6040_REG_STATUS:
  485. return true;
  486. default:
  487. return false;
  488. }
  489. }
  490. static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
  491. {
  492. switch (reg) {
  493. case TWL6040_REG_ASICID:
  494. case TWL6040_REG_ASICREV:
  495. case TWL6040_REG_STATUS:
  496. return false;
  497. default:
  498. return true;
  499. }
  500. }
  501. static const struct regmap_config twl6040_regmap_config = {
  502. .reg_bits = 8,
  503. .val_bits = 8,
  504. .reg_defaults = twl6040_defaults,
  505. .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
  506. .max_register = TWL6040_REG_STATUS, /* 0x2e */
  507. .readable_reg = twl6040_readable_reg,
  508. .volatile_reg = twl6040_volatile_reg,
  509. .writeable_reg = twl6040_writeable_reg,
  510. .cache_type = REGCACHE_RBTREE,
  511. };
  512. static const struct regmap_irq twl6040_irqs[] = {
  513. { .reg_offset = 0, .mask = TWL6040_THINT, },
  514. { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
  515. { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
  516. { .reg_offset = 0, .mask = TWL6040_HFINT, },
  517. { .reg_offset = 0, .mask = TWL6040_VIBINT, },
  518. { .reg_offset = 0, .mask = TWL6040_READYINT, },
  519. };
  520. static struct regmap_irq_chip twl6040_irq_chip = {
  521. .name = "twl6040",
  522. .irqs = twl6040_irqs,
  523. .num_irqs = ARRAY_SIZE(twl6040_irqs),
  524. .num_regs = 1,
  525. .status_base = TWL6040_REG_INTID,
  526. .mask_base = TWL6040_REG_INTMR,
  527. };
  528. static int twl6040_probe(struct i2c_client *client,
  529. const struct i2c_device_id *id)
  530. {
  531. struct device_node *node = client->dev.of_node;
  532. struct twl6040 *twl6040;
  533. struct mfd_cell *cell = NULL;
  534. int irq, ret, children = 0;
  535. if (!node) {
  536. dev_err(&client->dev, "of node is missing\n");
  537. return -EINVAL;
  538. }
  539. /* In order to operate correctly we need valid interrupt config */
  540. if (!client->irq) {
  541. dev_err(&client->dev, "Invalid IRQ configuration\n");
  542. return -EINVAL;
  543. }
  544. twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
  545. GFP_KERNEL);
  546. if (!twl6040)
  547. return -ENOMEM;
  548. twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
  549. if (IS_ERR(twl6040->regmap))
  550. return PTR_ERR(twl6040->regmap);
  551. i2c_set_clientdata(client, twl6040);
  552. twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
  553. if (IS_ERR(twl6040->clk32k)) {
  554. dev_info(&client->dev, "clk32k is not handled\n");
  555. twl6040->clk32k = NULL;
  556. }
  557. twl6040->supplies[0].supply = "vio";
  558. twl6040->supplies[1].supply = "v2v1";
  559. ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
  560. twl6040->supplies);
  561. if (ret != 0) {
  562. dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
  563. return ret;
  564. }
  565. ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  566. if (ret != 0) {
  567. dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
  568. return ret;
  569. }
  570. twl6040->dev = &client->dev;
  571. twl6040->irq = client->irq;
  572. mutex_init(&twl6040->mutex);
  573. init_completion(&twl6040->ready);
  574. regmap_register_patch(twl6040->regmap, twl6040_patch,
  575. ARRAY_SIZE(twl6040_patch));
  576. twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
  577. if (twl6040->rev < 0) {
  578. dev_err(&client->dev, "Failed to read revision register: %d\n",
  579. twl6040->rev);
  580. ret = twl6040->rev;
  581. goto gpio_err;
  582. }
  583. /* ERRATA: Automatic power-up is not possible in ES1.0 */
  584. if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
  585. twl6040->audpwron = of_get_named_gpio(node,
  586. "ti,audpwron-gpio", 0);
  587. else
  588. twl6040->audpwron = -EINVAL;
  589. if (gpio_is_valid(twl6040->audpwron)) {
  590. ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
  591. GPIOF_OUT_INIT_LOW, "audpwron");
  592. if (ret)
  593. goto gpio_err;
  594. /* Clear any pending interrupt */
  595. twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  596. }
  597. ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
  598. 0, &twl6040_irq_chip, &twl6040->irq_data);
  599. if (ret < 0)
  600. goto gpio_err;
  601. twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
  602. TWL6040_IRQ_READY);
  603. twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
  604. TWL6040_IRQ_TH);
  605. ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
  606. twl6040_readyint_handler, IRQF_ONESHOT,
  607. "twl6040_irq_ready", twl6040);
  608. if (ret) {
  609. dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
  610. goto readyirq_err;
  611. }
  612. ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
  613. twl6040_thint_handler, IRQF_ONESHOT,
  614. "twl6040_irq_th", twl6040);
  615. if (ret) {
  616. dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
  617. goto readyirq_err;
  618. }
  619. /*
  620. * The main functionality of twl6040 to provide audio on OMAP4+ systems.
  621. * We can add the ASoC codec child whenever this driver has been loaded.
  622. */
  623. irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
  624. cell = &twl6040->cells[children];
  625. cell->name = "twl6040-codec";
  626. twl6040_codec_rsrc[0].start = irq;
  627. twl6040_codec_rsrc[0].end = irq;
  628. cell->resources = twl6040_codec_rsrc;
  629. cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
  630. children++;
  631. /* Vibra input driver support */
  632. if (twl6040_has_vibra(node)) {
  633. irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
  634. cell = &twl6040->cells[children];
  635. cell->name = "twl6040-vibra";
  636. twl6040_vibra_rsrc[0].start = irq;
  637. twl6040_vibra_rsrc[0].end = irq;
  638. cell->resources = twl6040_vibra_rsrc;
  639. cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
  640. children++;
  641. }
  642. /* GPO support */
  643. cell = &twl6040->cells[children];
  644. cell->name = "twl6040-gpo";
  645. children++;
  646. /* The chip is powered down so mark regmap to cache only and dirty */
  647. regcache_cache_only(twl6040->regmap, true);
  648. regcache_mark_dirty(twl6040->regmap);
  649. ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
  650. NULL, 0, NULL);
  651. if (ret)
  652. goto readyirq_err;
  653. return 0;
  654. readyirq_err:
  655. regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
  656. gpio_err:
  657. regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  658. return ret;
  659. }
  660. static int twl6040_remove(struct i2c_client *client)
  661. {
  662. struct twl6040 *twl6040 = i2c_get_clientdata(client);
  663. if (twl6040->power_count)
  664. twl6040_power(twl6040, 0);
  665. regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
  666. mfd_remove_devices(&client->dev);
  667. regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  668. return 0;
  669. }
  670. static const struct i2c_device_id twl6040_i2c_id[] = {
  671. { "twl6040", 0, },
  672. { "twl6041", 0, },
  673. { },
  674. };
  675. MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
  676. static struct i2c_driver twl6040_driver = {
  677. .driver = {
  678. .name = "twl6040",
  679. .owner = THIS_MODULE,
  680. },
  681. .probe = twl6040_probe,
  682. .remove = twl6040_remove,
  683. .id_table = twl6040_i2c_id,
  684. };
  685. module_i2c_driver(twl6040_driver);
  686. MODULE_DESCRIPTION("TWL6040 MFD");
  687. MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
  688. MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
  689. MODULE_LICENSE("GPL");