rts5229.c 7.8 KB

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  1. /* Driver for Realtek PCI-Express card reader
  2. *
  3. * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2, or (at your option) any
  8. * later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program; if not, see <http://www.gnu.org/licenses/>.
  17. *
  18. * Author:
  19. * Wei WANG <wei_wang@realsil.com.cn>
  20. */
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/mfd/rtsx_pci.h>
  24. #include "rtsx_pcr.h"
  25. static u8 rts5229_get_ic_version(struct rtsx_pcr *pcr)
  26. {
  27. u8 val;
  28. rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
  29. return val & 0x0F;
  30. }
  31. static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
  32. {
  33. u32 reg;
  34. rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
  35. pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
  36. if (!rtsx_vendor_setting_valid(reg))
  37. return;
  38. pcr->aspm_en = rtsx_reg_to_aspm(reg);
  39. pcr->sd30_drive_sel_1v8 =
  40. map_sd_drive(rtsx_reg_to_sd30_drive_sel_1v8(reg));
  41. pcr->card_drive_sel &= 0x3F;
  42. pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
  43. rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
  44. pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
  45. pcr->sd30_drive_sel_3v3 =
  46. map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg));
  47. }
  48. static void rts5229_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
  49. {
  50. rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);
  51. }
  52. static int rts5229_extra_init_hw(struct rtsx_pcr *pcr)
  53. {
  54. rtsx_pci_init_cmd(pcr);
  55. /* Configure GPIO as output */
  56. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
  57. /* Reset ASPM state to default value */
  58. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
  59. /* Force CLKREQ# PIN to drive 0 to request clock */
  60. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
  61. /* Switch LDO3318 source from DV33 to card_3v3 */
  62. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);
  63. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);
  64. /* LED shine disabled, set initial shine cycle period */
  65. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);
  66. /* Configure driving */
  67. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
  68. 0xFF, pcr->sd30_drive_sel_3v3);
  69. return rtsx_pci_send_cmd(pcr, 100);
  70. }
  71. static int rts5229_optimize_phy(struct rtsx_pcr *pcr)
  72. {
  73. /* Optimize RX sensitivity */
  74. return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42);
  75. }
  76. static int rts5229_turn_on_led(struct rtsx_pcr *pcr)
  77. {
  78. return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
  79. }
  80. static int rts5229_turn_off_led(struct rtsx_pcr *pcr)
  81. {
  82. return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
  83. }
  84. static int rts5229_enable_auto_blink(struct rtsx_pcr *pcr)
  85. {
  86. return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
  87. }
  88. static int rts5229_disable_auto_blink(struct rtsx_pcr *pcr)
  89. {
  90. return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
  91. }
  92. static int rts5229_card_power_on(struct rtsx_pcr *pcr, int card)
  93. {
  94. int err;
  95. rtsx_pci_init_cmd(pcr);
  96. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
  97. SD_POWER_MASK, SD_PARTIAL_POWER_ON);
  98. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
  99. LDO3318_PWR_MASK, 0x02);
  100. err = rtsx_pci_send_cmd(pcr, 100);
  101. if (err < 0)
  102. return err;
  103. /* To avoid too large in-rush current */
  104. udelay(150);
  105. rtsx_pci_init_cmd(pcr);
  106. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
  107. SD_POWER_MASK, SD_POWER_ON);
  108. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
  109. LDO3318_PWR_MASK, 0x06);
  110. err = rtsx_pci_send_cmd(pcr, 100);
  111. if (err < 0)
  112. return err;
  113. return 0;
  114. }
  115. static int rts5229_card_power_off(struct rtsx_pcr *pcr, int card)
  116. {
  117. rtsx_pci_init_cmd(pcr);
  118. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
  119. SD_POWER_MASK | PMOS_STRG_MASK,
  120. SD_POWER_OFF | PMOS_STRG_400mA);
  121. rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
  122. LDO3318_PWR_MASK, 0x00);
  123. return rtsx_pci_send_cmd(pcr, 100);
  124. }
  125. static int rts5229_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
  126. {
  127. int err;
  128. if (voltage == OUTPUT_3V3) {
  129. err = rtsx_pci_write_register(pcr,
  130. SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
  131. if (err < 0)
  132. return err;
  133. err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
  134. if (err < 0)
  135. return err;
  136. } else if (voltage == OUTPUT_1V8) {
  137. err = rtsx_pci_write_register(pcr,
  138. SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
  139. if (err < 0)
  140. return err;
  141. err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
  142. if (err < 0)
  143. return err;
  144. } else {
  145. return -EINVAL;
  146. }
  147. return 0;
  148. }
  149. static const struct pcr_ops rts5229_pcr_ops = {
  150. .fetch_vendor_settings = rts5229_fetch_vendor_settings,
  151. .extra_init_hw = rts5229_extra_init_hw,
  152. .optimize_phy = rts5229_optimize_phy,
  153. .turn_on_led = rts5229_turn_on_led,
  154. .turn_off_led = rts5229_turn_off_led,
  155. .enable_auto_blink = rts5229_enable_auto_blink,
  156. .disable_auto_blink = rts5229_disable_auto_blink,
  157. .card_power_on = rts5229_card_power_on,
  158. .card_power_off = rts5229_card_power_off,
  159. .switch_output_voltage = rts5229_switch_output_voltage,
  160. .cd_deglitch = NULL,
  161. .conv_clk_and_div_n = NULL,
  162. .force_power_down = rts5229_force_power_down,
  163. };
  164. /* SD Pull Control Enable:
  165. * SD_DAT[3:0] ==> pull up
  166. * SD_CD ==> pull up
  167. * SD_WP ==> pull up
  168. * SD_CMD ==> pull up
  169. * SD_CLK ==> pull down
  170. */
  171. static const u32 rts5229_sd_pull_ctl_enable_tbl1[] = {
  172. RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
  173. RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
  174. 0,
  175. };
  176. /* For RTS5229 version C */
  177. static const u32 rts5229_sd_pull_ctl_enable_tbl2[] = {
  178. RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
  179. RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD9),
  180. 0,
  181. };
  182. /* SD Pull Control Disable:
  183. * SD_DAT[3:0] ==> pull down
  184. * SD_CD ==> pull up
  185. * SD_WP ==> pull down
  186. * SD_CMD ==> pull down
  187. * SD_CLK ==> pull down
  188. */
  189. static const u32 rts5229_sd_pull_ctl_disable_tbl1[] = {
  190. RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
  191. RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
  192. 0,
  193. };
  194. /* For RTS5229 version C */
  195. static const u32 rts5229_sd_pull_ctl_disable_tbl2[] = {
  196. RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
  197. RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE5),
  198. 0,
  199. };
  200. /* MS Pull Control Enable:
  201. * MS CD ==> pull up
  202. * others ==> pull down
  203. */
  204. static const u32 rts5229_ms_pull_ctl_enable_tbl[] = {
  205. RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
  206. RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
  207. 0,
  208. };
  209. /* MS Pull Control Disable:
  210. * MS CD ==> pull up
  211. * others ==> pull down
  212. */
  213. static const u32 rts5229_ms_pull_ctl_disable_tbl[] = {
  214. RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
  215. RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
  216. 0,
  217. };
  218. void rts5229_init_params(struct rtsx_pcr *pcr)
  219. {
  220. pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
  221. pcr->num_slots = 2;
  222. pcr->ops = &rts5229_pcr_ops;
  223. pcr->flags = 0;
  224. pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
  225. pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
  226. pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
  227. pcr->aspm_en = ASPM_L1_EN;
  228. pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);
  229. pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 6, 6);
  230. pcr->ic_version = rts5229_get_ic_version(pcr);
  231. if (pcr->ic_version == IC_VER_C) {
  232. pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl2;
  233. pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl2;
  234. } else {
  235. pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl1;
  236. pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl1;
  237. }
  238. pcr->ms_pull_ctl_enable_tbl = rts5229_ms_pull_ctl_enable_tbl;
  239. pcr->ms_pull_ctl_disable_tbl = rts5229_ms_pull_ctl_disable_tbl;
  240. }