via-pmu.c 62 KB

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  1. /*
  2. * Device driver for the via-pmu on Apple Powermacs.
  3. *
  4. * The VIA (versatile interface adapter) interfaces to the PMU,
  5. * a 6805 microprocessor core whose primary function is to control
  6. * battery charging and system power on the PowerBook 3400 and 2400.
  7. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  8. * to the keyboard and mouse, as well as the non-volatile RAM
  9. * and the RTC (real time clock) chip.
  10. *
  11. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  12. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  13. * Copyright (C) 2006-2007 Johannes Berg
  14. *
  15. * THIS DRIVER IS BECOMING A TOTAL MESS !
  16. * - Cleanup atomically disabling reply to PMU events after
  17. * a sleep or a freq. switch
  18. *
  19. */
  20. #include <stdarg.h>
  21. #include <linux/mutex.h>
  22. #include <linux/types.h>
  23. #include <linux/errno.h>
  24. #include <linux/kernel.h>
  25. #include <linux/delay.h>
  26. #include <linux/sched.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/poll.h>
  32. #include <linux/adb.h>
  33. #include <linux/pmu.h>
  34. #include <linux/cuda.h>
  35. #include <linux/module.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/pm.h>
  38. #include <linux/proc_fs.h>
  39. #include <linux/seq_file.h>
  40. #include <linux/init.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/device.h>
  43. #include <linux/syscore_ops.h>
  44. #include <linux/freezer.h>
  45. #include <linux/syscalls.h>
  46. #include <linux/suspend.h>
  47. #include <linux/cpu.h>
  48. #include <linux/compat.h>
  49. #include <linux/of_address.h>
  50. #include <linux/of_irq.h>
  51. #include <asm/prom.h>
  52. #include <asm/machdep.h>
  53. #include <asm/io.h>
  54. #include <asm/pgtable.h>
  55. #include <asm/sections.h>
  56. #include <asm/irq.h>
  57. #include <asm/pmac_feature.h>
  58. #include <asm/pmac_pfunc.h>
  59. #include <asm/pmac_low_i2c.h>
  60. #include <asm/uaccess.h>
  61. #include <asm/mmu_context.h>
  62. #include <asm/cputable.h>
  63. #include <asm/time.h>
  64. #include <asm/backlight.h>
  65. #include "via-pmu-event.h"
  66. /* Some compile options */
  67. #undef DEBUG_SLEEP
  68. /* Misc minor number allocated for /dev/pmu */
  69. #define PMU_MINOR 154
  70. /* How many iterations between battery polls */
  71. #define BATTERY_POLLING_COUNT 2
  72. static DEFINE_MUTEX(pmu_info_proc_mutex);
  73. static volatile unsigned char __iomem *via;
  74. /* VIA registers - spaced 0x200 bytes apart */
  75. #define RS 0x200 /* skip between registers */
  76. #define B 0 /* B-side data */
  77. #define A RS /* A-side data */
  78. #define DIRB (2*RS) /* B-side direction (1=output) */
  79. #define DIRA (3*RS) /* A-side direction (1=output) */
  80. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  81. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  82. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  83. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  84. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  85. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  86. #define SR (10*RS) /* Shift register */
  87. #define ACR (11*RS) /* Auxiliary control register */
  88. #define PCR (12*RS) /* Peripheral control register */
  89. #define IFR (13*RS) /* Interrupt flag register */
  90. #define IER (14*RS) /* Interrupt enable register */
  91. #define ANH (15*RS) /* A-side data, no handshake */
  92. /* Bits in B data register: both active low */
  93. #define TACK 0x08 /* Transfer acknowledge (input) */
  94. #define TREQ 0x10 /* Transfer request (output) */
  95. /* Bits in ACR */
  96. #define SR_CTRL 0x1c /* Shift register control bits */
  97. #define SR_EXT 0x0c /* Shift on external clock */
  98. #define SR_OUT 0x10 /* Shift out if 1 */
  99. /* Bits in IFR and IER */
  100. #define IER_SET 0x80 /* set bits in IER */
  101. #define IER_CLR 0 /* clear bits in IER */
  102. #define SR_INT 0x04 /* Shift register full/empty */
  103. #define CB2_INT 0x08
  104. #define CB1_INT 0x10 /* transition on CB1 input */
  105. static volatile enum pmu_state {
  106. idle,
  107. sending,
  108. intack,
  109. reading,
  110. reading_intr,
  111. locked,
  112. } pmu_state;
  113. static volatile enum int_data_state {
  114. int_data_empty,
  115. int_data_fill,
  116. int_data_ready,
  117. int_data_flush
  118. } int_data_state[2] = { int_data_empty, int_data_empty };
  119. static struct adb_request *current_req;
  120. static struct adb_request *last_req;
  121. static struct adb_request *req_awaiting_reply;
  122. static unsigned char interrupt_data[2][32];
  123. static int interrupt_data_len[2];
  124. static int int_data_last;
  125. static unsigned char *reply_ptr;
  126. static int data_index;
  127. static int data_len;
  128. static volatile int adb_int_pending;
  129. static volatile int disable_poll;
  130. static struct device_node *vias;
  131. static int pmu_kind = PMU_UNKNOWN;
  132. static int pmu_fully_inited;
  133. static int pmu_has_adb;
  134. static struct device_node *gpio_node;
  135. static unsigned char __iomem *gpio_reg;
  136. static int gpio_irq = NO_IRQ;
  137. static int gpio_irq_enabled = -1;
  138. static volatile int pmu_suspended;
  139. static spinlock_t pmu_lock;
  140. static u8 pmu_intr_mask;
  141. static int pmu_version;
  142. static int drop_interrupts;
  143. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  144. static int option_lid_wakeup = 1;
  145. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  146. static unsigned long async_req_locks;
  147. static unsigned int pmu_irq_stats[11];
  148. static struct proc_dir_entry *proc_pmu_root;
  149. static struct proc_dir_entry *proc_pmu_info;
  150. static struct proc_dir_entry *proc_pmu_irqstats;
  151. static struct proc_dir_entry *proc_pmu_options;
  152. static int option_server_mode;
  153. int pmu_battery_count;
  154. int pmu_cur_battery;
  155. unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
  156. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  157. static int query_batt_timer = BATTERY_POLLING_COUNT;
  158. static struct adb_request batt_req;
  159. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  160. int __fake_sleep;
  161. int asleep;
  162. #ifdef CONFIG_ADB
  163. static int adb_dev_map;
  164. static int pmu_adb_flags;
  165. static int pmu_probe(void);
  166. static int pmu_init(void);
  167. static int pmu_send_request(struct adb_request *req, int sync);
  168. static int pmu_adb_autopoll(int devs);
  169. static int pmu_adb_reset_bus(void);
  170. #endif /* CONFIG_ADB */
  171. static int init_pmu(void);
  172. static void pmu_start(void);
  173. static irqreturn_t via_pmu_interrupt(int irq, void *arg);
  174. static irqreturn_t gpio1_interrupt(int irq, void *arg);
  175. static const struct file_operations pmu_info_proc_fops;
  176. static const struct file_operations pmu_irqstats_proc_fops;
  177. static void pmu_pass_intr(unsigned char *data, int len);
  178. static const struct file_operations pmu_battery_proc_fops;
  179. static const struct file_operations pmu_options_proc_fops;
  180. #ifdef CONFIG_ADB
  181. struct adb_driver via_pmu_driver = {
  182. "PMU",
  183. pmu_probe,
  184. pmu_init,
  185. pmu_send_request,
  186. pmu_adb_autopoll,
  187. pmu_poll_adb,
  188. pmu_adb_reset_bus
  189. };
  190. #endif /* CONFIG_ADB */
  191. extern void low_sleep_handler(void);
  192. extern void enable_kernel_altivec(void);
  193. extern void enable_kernel_fp(void);
  194. #ifdef DEBUG_SLEEP
  195. int pmu_polled_request(struct adb_request *req);
  196. void pmu_blink(int n);
  197. #endif
  198. /*
  199. * This table indicates for each PMU opcode:
  200. * - the number of data bytes to be sent with the command, or -1
  201. * if a length byte should be sent,
  202. * - the number of response bytes which the PMU will return, or
  203. * -1 if it will send a length byte.
  204. */
  205. static const s8 pmu_data_len[256][2] = {
  206. /* 0 1 2 3 4 5 6 7 */
  207. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  208. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  209. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  210. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  211. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  212. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  213. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  214. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  215. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  216. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  217. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  218. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  219. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  220. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  221. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  222. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  223. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  224. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  225. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  226. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  227. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  228. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  229. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  230. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  231. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  232. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  233. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  234. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  235. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  236. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  237. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  238. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  239. };
  240. static char *pbook_type[] = {
  241. "Unknown PowerBook",
  242. "PowerBook 2400/3400/3500(G3)",
  243. "PowerBook G3 Series",
  244. "1999 PowerBook G3",
  245. "Core99"
  246. };
  247. int __init find_via_pmu(void)
  248. {
  249. u64 taddr;
  250. const u32 *reg;
  251. if (via != 0)
  252. return 1;
  253. vias = of_find_node_by_name(NULL, "via-pmu");
  254. if (vias == NULL)
  255. return 0;
  256. reg = of_get_property(vias, "reg", NULL);
  257. if (reg == NULL) {
  258. printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
  259. goto fail;
  260. }
  261. taddr = of_translate_address(vias, reg);
  262. if (taddr == OF_BAD_ADDR) {
  263. printk(KERN_ERR "via-pmu: Can't translate address !\n");
  264. goto fail;
  265. }
  266. spin_lock_init(&pmu_lock);
  267. pmu_has_adb = 1;
  268. pmu_intr_mask = PMU_INT_PCEJECT |
  269. PMU_INT_SNDBRT |
  270. PMU_INT_ADB |
  271. PMU_INT_TICK;
  272. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  273. || of_device_is_compatible(vias->parent, "ohare")))
  274. pmu_kind = PMU_OHARE_BASED;
  275. else if (of_device_is_compatible(vias->parent, "paddington"))
  276. pmu_kind = PMU_PADDINGTON_BASED;
  277. else if (of_device_is_compatible(vias->parent, "heathrow"))
  278. pmu_kind = PMU_HEATHROW_BASED;
  279. else if (of_device_is_compatible(vias->parent, "Keylargo")
  280. || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
  281. struct device_node *gpiop;
  282. struct device_node *adbp;
  283. u64 gaddr = OF_BAD_ADDR;
  284. pmu_kind = PMU_KEYLARGO_BASED;
  285. adbp = of_find_node_by_type(NULL, "adb");
  286. pmu_has_adb = (adbp != NULL);
  287. of_node_put(adbp);
  288. pmu_intr_mask = PMU_INT_PCEJECT |
  289. PMU_INT_SNDBRT |
  290. PMU_INT_ADB |
  291. PMU_INT_TICK |
  292. PMU_INT_ENVIRONMENT;
  293. gpiop = of_find_node_by_name(NULL, "gpio");
  294. if (gpiop) {
  295. reg = of_get_property(gpiop, "reg", NULL);
  296. if (reg)
  297. gaddr = of_translate_address(gpiop, reg);
  298. if (gaddr != OF_BAD_ADDR)
  299. gpio_reg = ioremap(gaddr, 0x10);
  300. of_node_put(gpiop);
  301. }
  302. if (gpio_reg == NULL) {
  303. printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
  304. goto fail;
  305. }
  306. } else
  307. pmu_kind = PMU_UNKNOWN;
  308. via = ioremap(taddr, 0x2000);
  309. if (via == NULL) {
  310. printk(KERN_ERR "via-pmu: Can't map address !\n");
  311. goto fail_via_remap;
  312. }
  313. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  314. out_8(&via[IFR], 0x7f); /* clear IFR */
  315. pmu_state = idle;
  316. if (!init_pmu())
  317. goto fail_init;
  318. printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
  319. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  320. sys_ctrler = SYS_CTRLER_PMU;
  321. return 1;
  322. fail_init:
  323. iounmap(via);
  324. via = NULL;
  325. fail_via_remap:
  326. iounmap(gpio_reg);
  327. gpio_reg = NULL;
  328. fail:
  329. of_node_put(vias);
  330. vias = NULL;
  331. return 0;
  332. }
  333. #ifdef CONFIG_ADB
  334. static int pmu_probe(void)
  335. {
  336. return vias == NULL? -ENODEV: 0;
  337. }
  338. static int __init pmu_init(void)
  339. {
  340. if (vias == NULL)
  341. return -ENODEV;
  342. return 0;
  343. }
  344. #endif /* CONFIG_ADB */
  345. /*
  346. * We can't wait until pmu_init gets called, that happens too late.
  347. * It happens after IDE and SCSI initialization, which can take a few
  348. * seconds, and by that time the PMU could have given up on us and
  349. * turned us off.
  350. * Thus this is called with arch_initcall rather than device_initcall.
  351. */
  352. static int __init via_pmu_start(void)
  353. {
  354. unsigned int irq;
  355. if (vias == NULL)
  356. return -ENODEV;
  357. batt_req.complete = 1;
  358. irq = irq_of_parse_and_map(vias, 0);
  359. if (irq == NO_IRQ) {
  360. printk(KERN_ERR "via-pmu: can't map interrupt\n");
  361. return -ENODEV;
  362. }
  363. /* We set IRQF_NO_SUSPEND because we don't want the interrupt
  364. * to be disabled between the 2 passes of driver suspend, we
  365. * control our own disabling for that one
  366. */
  367. if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
  368. "VIA-PMU", (void *)0)) {
  369. printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
  370. return -ENODEV;
  371. }
  372. if (pmu_kind == PMU_KEYLARGO_BASED) {
  373. gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
  374. if (gpio_node == NULL)
  375. gpio_node = of_find_node_by_name(NULL,
  376. "pmu-interrupt");
  377. if (gpio_node)
  378. gpio_irq = irq_of_parse_and_map(gpio_node, 0);
  379. if (gpio_irq != NO_IRQ) {
  380. if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
  381. "GPIO1 ADB", (void *)0))
  382. printk(KERN_ERR "pmu: can't get irq %d"
  383. " (GPIO1)\n", gpio_irq);
  384. else
  385. gpio_irq_enabled = 1;
  386. }
  387. }
  388. /* Enable interrupts */
  389. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  390. pmu_fully_inited = 1;
  391. /* Make sure PMU settle down before continuing. This is _very_ important
  392. * since the IDE probe may shut interrupts down for quite a bit of time. If
  393. * a PMU communication is pending while this happens, the PMU may timeout
  394. * Not that on Core99 machines, the PMU keeps sending us environement
  395. * messages, we should find a way to either fix IDE or make it call
  396. * pmu_suspend() before masking interrupts. This can also happens while
  397. * scolling with some fbdevs.
  398. */
  399. do {
  400. pmu_poll();
  401. } while (pmu_state != idle);
  402. return 0;
  403. }
  404. arch_initcall(via_pmu_start);
  405. /*
  406. * This has to be done after pci_init, which is a subsys_initcall.
  407. */
  408. static int __init via_pmu_dev_init(void)
  409. {
  410. if (vias == NULL)
  411. return -ENODEV;
  412. #ifdef CONFIG_PMAC_BACKLIGHT
  413. /* Initialize backlight */
  414. pmu_backlight_init();
  415. #endif
  416. #ifdef CONFIG_PPC32
  417. if (of_machine_is_compatible("AAPL,3400/2400") ||
  418. of_machine_is_compatible("AAPL,3500")) {
  419. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  420. NULL, PMAC_MB_INFO_MODEL, 0);
  421. pmu_battery_count = 1;
  422. if (mb == PMAC_TYPE_COMET)
  423. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  424. else
  425. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  426. } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
  427. of_machine_is_compatible("PowerBook1,1")) {
  428. pmu_battery_count = 2;
  429. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  430. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  431. } else {
  432. struct device_node* prim =
  433. of_find_node_by_name(NULL, "power-mgt");
  434. const u32 *prim_info = NULL;
  435. if (prim)
  436. prim_info = of_get_property(prim, "prim-info", NULL);
  437. if (prim_info) {
  438. /* Other stuffs here yet unknown */
  439. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  440. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  441. if (pmu_battery_count > 1)
  442. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  443. }
  444. of_node_put(prim);
  445. }
  446. #endif /* CONFIG_PPC32 */
  447. /* Create /proc/pmu */
  448. proc_pmu_root = proc_mkdir("pmu", NULL);
  449. if (proc_pmu_root) {
  450. long i;
  451. for (i=0; i<pmu_battery_count; i++) {
  452. char title[16];
  453. sprintf(title, "battery_%ld", i);
  454. proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
  455. &pmu_battery_proc_fops, (void *)i);
  456. }
  457. proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
  458. proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
  459. &pmu_irqstats_proc_fops);
  460. proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
  461. &pmu_options_proc_fops);
  462. }
  463. return 0;
  464. }
  465. device_initcall(via_pmu_dev_init);
  466. static int
  467. init_pmu(void)
  468. {
  469. int timeout;
  470. struct adb_request req;
  471. out_8(&via[B], via[B] | TREQ); /* negate TREQ */
  472. out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
  473. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  474. timeout = 100000;
  475. while (!req.complete) {
  476. if (--timeout < 0) {
  477. printk(KERN_ERR "init_pmu: no response from PMU\n");
  478. return 0;
  479. }
  480. udelay(10);
  481. pmu_poll();
  482. }
  483. /* ack all pending interrupts */
  484. timeout = 100000;
  485. interrupt_data[0][0] = 1;
  486. while (interrupt_data[0][0] || pmu_state != idle) {
  487. if (--timeout < 0) {
  488. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  489. return 0;
  490. }
  491. if (pmu_state == idle)
  492. adb_int_pending = 1;
  493. via_pmu_interrupt(0, NULL);
  494. udelay(10);
  495. }
  496. /* Tell PMU we are ready. */
  497. if (pmu_kind == PMU_KEYLARGO_BASED) {
  498. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  499. while (!req.complete)
  500. pmu_poll();
  501. }
  502. /* Read PMU version */
  503. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  504. pmu_wait_complete(&req);
  505. if (req.reply_len > 0)
  506. pmu_version = req.reply[0];
  507. /* Read server mode setting */
  508. if (pmu_kind == PMU_KEYLARGO_BASED) {
  509. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  510. PMU_PWR_GET_POWERUP_EVENTS);
  511. pmu_wait_complete(&req);
  512. if (req.reply_len == 2) {
  513. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  514. option_server_mode = 1;
  515. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  516. option_server_mode ? "enabled" : "disabled");
  517. }
  518. }
  519. return 1;
  520. }
  521. int
  522. pmu_get_model(void)
  523. {
  524. return pmu_kind;
  525. }
  526. static void pmu_set_server_mode(int server_mode)
  527. {
  528. struct adb_request req;
  529. if (pmu_kind != PMU_KEYLARGO_BASED)
  530. return;
  531. option_server_mode = server_mode;
  532. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  533. pmu_wait_complete(&req);
  534. if (req.reply_len < 2)
  535. return;
  536. if (server_mode)
  537. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  538. PMU_PWR_SET_POWERUP_EVENTS,
  539. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  540. else
  541. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  542. PMU_PWR_CLR_POWERUP_EVENTS,
  543. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  544. pmu_wait_complete(&req);
  545. }
  546. /* This new version of the code for 2400/3400/3500 powerbooks
  547. * is inspired from the implementation in gkrellm-pmu
  548. */
  549. static void
  550. done_battery_state_ohare(struct adb_request* req)
  551. {
  552. /* format:
  553. * [0] : flags
  554. * 0x01 : AC indicator
  555. * 0x02 : charging
  556. * 0x04 : battery exist
  557. * 0x08 :
  558. * 0x10 :
  559. * 0x20 : full charged
  560. * 0x40 : pcharge reset
  561. * 0x80 : battery exist
  562. *
  563. * [1][2] : battery voltage
  564. * [3] : CPU temperature
  565. * [4] : battery temperature
  566. * [5] : current
  567. * [6][7] : pcharge
  568. * --tkoba
  569. */
  570. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  571. long pcharge, charge, vb, vmax, lmax;
  572. long vmax_charging, vmax_charged;
  573. long amperage, voltage, time, max;
  574. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  575. NULL, PMAC_MB_INFO_MODEL, 0);
  576. if (req->reply[0] & 0x01)
  577. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  578. else
  579. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  580. if (mb == PMAC_TYPE_COMET) {
  581. vmax_charged = 189;
  582. vmax_charging = 213;
  583. lmax = 6500;
  584. } else {
  585. vmax_charged = 330;
  586. vmax_charging = 330;
  587. lmax = 6500;
  588. }
  589. vmax = vmax_charged;
  590. /* If battery installed */
  591. if (req->reply[0] & 0x04) {
  592. bat_flags |= PMU_BATT_PRESENT;
  593. if (req->reply[0] & 0x02)
  594. bat_flags |= PMU_BATT_CHARGING;
  595. vb = (req->reply[1] << 8) | req->reply[2];
  596. voltage = (vb * 265 + 72665) / 10;
  597. amperage = req->reply[5];
  598. if ((req->reply[0] & 0x01) == 0) {
  599. if (amperage > 200)
  600. vb += ((amperage - 200) * 15)/100;
  601. } else if (req->reply[0] & 0x02) {
  602. vb = (vb * 97) / 100;
  603. vmax = vmax_charging;
  604. }
  605. charge = (100 * vb) / vmax;
  606. if (req->reply[0] & 0x40) {
  607. pcharge = (req->reply[6] << 8) + req->reply[7];
  608. if (pcharge > lmax)
  609. pcharge = lmax;
  610. pcharge *= 100;
  611. pcharge = 100 - pcharge / lmax;
  612. if (pcharge < charge)
  613. charge = pcharge;
  614. }
  615. if (amperage > 0)
  616. time = (charge * 16440) / amperage;
  617. else
  618. time = 0;
  619. max = 100;
  620. amperage = -amperage;
  621. } else
  622. charge = max = amperage = voltage = time = 0;
  623. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  624. pmu_batteries[pmu_cur_battery].charge = charge;
  625. pmu_batteries[pmu_cur_battery].max_charge = max;
  626. pmu_batteries[pmu_cur_battery].amperage = amperage;
  627. pmu_batteries[pmu_cur_battery].voltage = voltage;
  628. pmu_batteries[pmu_cur_battery].time_remaining = time;
  629. clear_bit(0, &async_req_locks);
  630. }
  631. static void
  632. done_battery_state_smart(struct adb_request* req)
  633. {
  634. /* format:
  635. * [0] : format of this structure (known: 3,4,5)
  636. * [1] : flags
  637. *
  638. * format 3 & 4:
  639. *
  640. * [2] : charge
  641. * [3] : max charge
  642. * [4] : current
  643. * [5] : voltage
  644. *
  645. * format 5:
  646. *
  647. * [2][3] : charge
  648. * [4][5] : max charge
  649. * [6][7] : current
  650. * [8][9] : voltage
  651. */
  652. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  653. int amperage;
  654. unsigned int capa, max, voltage;
  655. if (req->reply[1] & 0x01)
  656. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  657. else
  658. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  659. capa = max = amperage = voltage = 0;
  660. if (req->reply[1] & 0x04) {
  661. bat_flags |= PMU_BATT_PRESENT;
  662. switch(req->reply[0]) {
  663. case 3:
  664. case 4: capa = req->reply[2];
  665. max = req->reply[3];
  666. amperage = *((signed char *)&req->reply[4]);
  667. voltage = req->reply[5];
  668. break;
  669. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  670. max = (req->reply[4] << 8) | req->reply[5];
  671. amperage = *((signed short *)&req->reply[6]);
  672. voltage = (req->reply[8] << 8) | req->reply[9];
  673. break;
  674. default:
  675. pr_warn("pmu.c: unrecognized battery info, "
  676. "len: %d, %4ph\n", req->reply_len,
  677. req->reply);
  678. break;
  679. }
  680. }
  681. if ((req->reply[1] & 0x01) && (amperage > 0))
  682. bat_flags |= PMU_BATT_CHARGING;
  683. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  684. pmu_batteries[pmu_cur_battery].charge = capa;
  685. pmu_batteries[pmu_cur_battery].max_charge = max;
  686. pmu_batteries[pmu_cur_battery].amperage = amperage;
  687. pmu_batteries[pmu_cur_battery].voltage = voltage;
  688. if (amperage) {
  689. if ((req->reply[1] & 0x01) && (amperage > 0))
  690. pmu_batteries[pmu_cur_battery].time_remaining
  691. = ((max-capa) * 3600) / amperage;
  692. else
  693. pmu_batteries[pmu_cur_battery].time_remaining
  694. = (capa * 3600) / (-amperage);
  695. } else
  696. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  697. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  698. clear_bit(0, &async_req_locks);
  699. }
  700. static void
  701. query_battery_state(void)
  702. {
  703. if (test_and_set_bit(0, &async_req_locks))
  704. return;
  705. if (pmu_kind == PMU_OHARE_BASED)
  706. pmu_request(&batt_req, done_battery_state_ohare,
  707. 1, PMU_BATTERY_STATE);
  708. else
  709. pmu_request(&batt_req, done_battery_state_smart,
  710. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  711. }
  712. static int pmu_info_proc_show(struct seq_file *m, void *v)
  713. {
  714. seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  715. seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
  716. seq_printf(m, "AC Power : %d\n",
  717. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
  718. seq_printf(m, "Battery count : %d\n", pmu_battery_count);
  719. return 0;
  720. }
  721. static int pmu_info_proc_open(struct inode *inode, struct file *file)
  722. {
  723. return single_open(file, pmu_info_proc_show, NULL);
  724. }
  725. static const struct file_operations pmu_info_proc_fops = {
  726. .owner = THIS_MODULE,
  727. .open = pmu_info_proc_open,
  728. .read = seq_read,
  729. .llseek = seq_lseek,
  730. .release = single_release,
  731. };
  732. static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
  733. {
  734. int i;
  735. static const char *irq_names[] = {
  736. "Total CB1 triggered events",
  737. "Total GPIO1 triggered events",
  738. "PC-Card eject button",
  739. "Sound/Brightness button",
  740. "ADB message",
  741. "Battery state change",
  742. "Environment interrupt",
  743. "Tick timer",
  744. "Ghost interrupt (zero len)",
  745. "Empty interrupt (empty mask)",
  746. "Max irqs in a row"
  747. };
  748. for (i=0; i<11; i++) {
  749. seq_printf(m, " %2u: %10u (%s)\n",
  750. i, pmu_irq_stats[i], irq_names[i]);
  751. }
  752. return 0;
  753. }
  754. static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
  755. {
  756. return single_open(file, pmu_irqstats_proc_show, NULL);
  757. }
  758. static const struct file_operations pmu_irqstats_proc_fops = {
  759. .owner = THIS_MODULE,
  760. .open = pmu_irqstats_proc_open,
  761. .read = seq_read,
  762. .llseek = seq_lseek,
  763. .release = single_release,
  764. };
  765. static int pmu_battery_proc_show(struct seq_file *m, void *v)
  766. {
  767. long batnum = (long)m->private;
  768. seq_putc(m, '\n');
  769. seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
  770. seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
  771. seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
  772. seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
  773. seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
  774. seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
  775. return 0;
  776. }
  777. static int pmu_battery_proc_open(struct inode *inode, struct file *file)
  778. {
  779. return single_open(file, pmu_battery_proc_show, PDE_DATA(inode));
  780. }
  781. static const struct file_operations pmu_battery_proc_fops = {
  782. .owner = THIS_MODULE,
  783. .open = pmu_battery_proc_open,
  784. .read = seq_read,
  785. .llseek = seq_lseek,
  786. .release = single_release,
  787. };
  788. static int pmu_options_proc_show(struct seq_file *m, void *v)
  789. {
  790. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  791. if (pmu_kind == PMU_KEYLARGO_BASED &&
  792. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  793. seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
  794. #endif
  795. if (pmu_kind == PMU_KEYLARGO_BASED)
  796. seq_printf(m, "server_mode=%d\n", option_server_mode);
  797. return 0;
  798. }
  799. static int pmu_options_proc_open(struct inode *inode, struct file *file)
  800. {
  801. return single_open(file, pmu_options_proc_show, NULL);
  802. }
  803. static ssize_t pmu_options_proc_write(struct file *file,
  804. const char __user *buffer, size_t count, loff_t *pos)
  805. {
  806. char tmp[33];
  807. char *label, *val;
  808. size_t fcount = count;
  809. if (!count)
  810. return -EINVAL;
  811. if (count > 32)
  812. count = 32;
  813. if (copy_from_user(tmp, buffer, count))
  814. return -EFAULT;
  815. tmp[count] = 0;
  816. label = tmp;
  817. while(*label == ' ')
  818. label++;
  819. val = label;
  820. while(*val && (*val != '=')) {
  821. if (*val == ' ')
  822. *val = 0;
  823. val++;
  824. }
  825. if ((*val) == 0)
  826. return -EINVAL;
  827. *(val++) = 0;
  828. while(*val == ' ')
  829. val++;
  830. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  831. if (pmu_kind == PMU_KEYLARGO_BASED &&
  832. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  833. if (!strcmp(label, "lid_wakeup"))
  834. option_lid_wakeup = ((*val) == '1');
  835. #endif
  836. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  837. int new_value;
  838. new_value = ((*val) == '1');
  839. if (new_value != option_server_mode)
  840. pmu_set_server_mode(new_value);
  841. }
  842. return fcount;
  843. }
  844. static const struct file_operations pmu_options_proc_fops = {
  845. .owner = THIS_MODULE,
  846. .open = pmu_options_proc_open,
  847. .read = seq_read,
  848. .llseek = seq_lseek,
  849. .release = single_release,
  850. .write = pmu_options_proc_write,
  851. };
  852. #ifdef CONFIG_ADB
  853. /* Send an ADB command */
  854. static int pmu_send_request(struct adb_request *req, int sync)
  855. {
  856. int i, ret;
  857. if ((vias == NULL) || (!pmu_fully_inited)) {
  858. req->complete = 1;
  859. return -ENXIO;
  860. }
  861. ret = -EINVAL;
  862. switch (req->data[0]) {
  863. case PMU_PACKET:
  864. for (i = 0; i < req->nbytes - 1; ++i)
  865. req->data[i] = req->data[i+1];
  866. --req->nbytes;
  867. if (pmu_data_len[req->data[0]][1] != 0) {
  868. req->reply[0] = ADB_RET_OK;
  869. req->reply_len = 1;
  870. } else
  871. req->reply_len = 0;
  872. ret = pmu_queue_request(req);
  873. break;
  874. case CUDA_PACKET:
  875. switch (req->data[1]) {
  876. case CUDA_GET_TIME:
  877. if (req->nbytes != 2)
  878. break;
  879. req->data[0] = PMU_READ_RTC;
  880. req->nbytes = 1;
  881. req->reply_len = 3;
  882. req->reply[0] = CUDA_PACKET;
  883. req->reply[1] = 0;
  884. req->reply[2] = CUDA_GET_TIME;
  885. ret = pmu_queue_request(req);
  886. break;
  887. case CUDA_SET_TIME:
  888. if (req->nbytes != 6)
  889. break;
  890. req->data[0] = PMU_SET_RTC;
  891. req->nbytes = 5;
  892. for (i = 1; i <= 4; ++i)
  893. req->data[i] = req->data[i+1];
  894. req->reply_len = 3;
  895. req->reply[0] = CUDA_PACKET;
  896. req->reply[1] = 0;
  897. req->reply[2] = CUDA_SET_TIME;
  898. ret = pmu_queue_request(req);
  899. break;
  900. }
  901. break;
  902. case ADB_PACKET:
  903. if (!pmu_has_adb)
  904. return -ENXIO;
  905. for (i = req->nbytes - 1; i > 1; --i)
  906. req->data[i+2] = req->data[i];
  907. req->data[3] = req->nbytes - 2;
  908. req->data[2] = pmu_adb_flags;
  909. /*req->data[1] = req->data[1];*/
  910. req->data[0] = PMU_ADB_CMD;
  911. req->nbytes += 2;
  912. req->reply_expected = 1;
  913. req->reply_len = 0;
  914. ret = pmu_queue_request(req);
  915. break;
  916. }
  917. if (ret) {
  918. req->complete = 1;
  919. return ret;
  920. }
  921. if (sync)
  922. while (!req->complete)
  923. pmu_poll();
  924. return 0;
  925. }
  926. /* Enable/disable autopolling */
  927. static int __pmu_adb_autopoll(int devs)
  928. {
  929. struct adb_request req;
  930. if (devs) {
  931. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  932. adb_dev_map >> 8, adb_dev_map);
  933. pmu_adb_flags = 2;
  934. } else {
  935. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  936. pmu_adb_flags = 0;
  937. }
  938. while (!req.complete)
  939. pmu_poll();
  940. return 0;
  941. }
  942. static int pmu_adb_autopoll(int devs)
  943. {
  944. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  945. return -ENXIO;
  946. adb_dev_map = devs;
  947. return __pmu_adb_autopoll(devs);
  948. }
  949. /* Reset the ADB bus */
  950. static int pmu_adb_reset_bus(void)
  951. {
  952. struct adb_request req;
  953. int save_autopoll = adb_dev_map;
  954. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  955. return -ENXIO;
  956. /* anyone got a better idea?? */
  957. __pmu_adb_autopoll(0);
  958. req.nbytes = 4;
  959. req.done = NULL;
  960. req.data[0] = PMU_ADB_CMD;
  961. req.data[1] = ADB_BUSRESET;
  962. req.data[2] = 0;
  963. req.data[3] = 0;
  964. req.data[4] = 0;
  965. req.reply_len = 0;
  966. req.reply_expected = 1;
  967. if (pmu_queue_request(&req) != 0) {
  968. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  969. return -EIO;
  970. }
  971. pmu_wait_complete(&req);
  972. if (save_autopoll != 0)
  973. __pmu_adb_autopoll(save_autopoll);
  974. return 0;
  975. }
  976. #endif /* CONFIG_ADB */
  977. /* Construct and send a pmu request */
  978. int
  979. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  980. int nbytes, ...)
  981. {
  982. va_list list;
  983. int i;
  984. if (vias == NULL)
  985. return -ENXIO;
  986. if (nbytes < 0 || nbytes > 32) {
  987. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  988. req->complete = 1;
  989. return -EINVAL;
  990. }
  991. req->nbytes = nbytes;
  992. req->done = done;
  993. va_start(list, nbytes);
  994. for (i = 0; i < nbytes; ++i)
  995. req->data[i] = va_arg(list, int);
  996. va_end(list);
  997. req->reply_len = 0;
  998. req->reply_expected = 0;
  999. return pmu_queue_request(req);
  1000. }
  1001. int
  1002. pmu_queue_request(struct adb_request *req)
  1003. {
  1004. unsigned long flags;
  1005. int nsend;
  1006. if (via == NULL) {
  1007. req->complete = 1;
  1008. return -ENXIO;
  1009. }
  1010. if (req->nbytes <= 0) {
  1011. req->complete = 1;
  1012. return 0;
  1013. }
  1014. nsend = pmu_data_len[req->data[0]][0];
  1015. if (nsend >= 0 && req->nbytes != nsend + 1) {
  1016. req->complete = 1;
  1017. return -EINVAL;
  1018. }
  1019. req->next = NULL;
  1020. req->sent = 0;
  1021. req->complete = 0;
  1022. spin_lock_irqsave(&pmu_lock, flags);
  1023. if (current_req != 0) {
  1024. last_req->next = req;
  1025. last_req = req;
  1026. } else {
  1027. current_req = req;
  1028. last_req = req;
  1029. if (pmu_state == idle)
  1030. pmu_start();
  1031. }
  1032. spin_unlock_irqrestore(&pmu_lock, flags);
  1033. return 0;
  1034. }
  1035. static inline void
  1036. wait_for_ack(void)
  1037. {
  1038. /* Sightly increased the delay, I had one occurrence of the message
  1039. * reported
  1040. */
  1041. int timeout = 4000;
  1042. while ((in_8(&via[B]) & TACK) == 0) {
  1043. if (--timeout < 0) {
  1044. printk(KERN_ERR "PMU not responding (!ack)\n");
  1045. return;
  1046. }
  1047. udelay(10);
  1048. }
  1049. }
  1050. /* New PMU seems to be very sensitive to those timings, so we make sure
  1051. * PCI is flushed immediately */
  1052. static inline void
  1053. send_byte(int x)
  1054. {
  1055. volatile unsigned char __iomem *v = via;
  1056. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1057. out_8(&v[SR], x);
  1058. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1059. (void)in_8(&v[B]);
  1060. }
  1061. static inline void
  1062. recv_byte(void)
  1063. {
  1064. volatile unsigned char __iomem *v = via;
  1065. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1066. in_8(&v[SR]); /* resets SR */
  1067. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1068. (void)in_8(&v[B]);
  1069. }
  1070. static inline void
  1071. pmu_done(struct adb_request *req)
  1072. {
  1073. void (*done)(struct adb_request *) = req->done;
  1074. mb();
  1075. req->complete = 1;
  1076. /* Here, we assume that if the request has a done member, the
  1077. * struct request will survive to setting req->complete to 1
  1078. */
  1079. if (done)
  1080. (*done)(req);
  1081. }
  1082. static void
  1083. pmu_start(void)
  1084. {
  1085. struct adb_request *req;
  1086. /* assert pmu_state == idle */
  1087. /* get the packet to send */
  1088. req = current_req;
  1089. if (req == 0 || pmu_state != idle
  1090. || (/*req->reply_expected && */req_awaiting_reply))
  1091. return;
  1092. pmu_state = sending;
  1093. data_index = 1;
  1094. data_len = pmu_data_len[req->data[0]][0];
  1095. /* Sounds safer to make sure ACK is high before writing. This helped
  1096. * kill a problem with ADB and some iBooks
  1097. */
  1098. wait_for_ack();
  1099. /* set the shift register to shift out and send a byte */
  1100. send_byte(req->data[0]);
  1101. }
  1102. void
  1103. pmu_poll(void)
  1104. {
  1105. if (!via)
  1106. return;
  1107. if (disable_poll)
  1108. return;
  1109. via_pmu_interrupt(0, NULL);
  1110. }
  1111. void
  1112. pmu_poll_adb(void)
  1113. {
  1114. if (!via)
  1115. return;
  1116. if (disable_poll)
  1117. return;
  1118. /* Kicks ADB read when PMU is suspended */
  1119. adb_int_pending = 1;
  1120. do {
  1121. via_pmu_interrupt(0, NULL);
  1122. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1123. || req_awaiting_reply));
  1124. }
  1125. void
  1126. pmu_wait_complete(struct adb_request *req)
  1127. {
  1128. if (!via)
  1129. return;
  1130. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1131. via_pmu_interrupt(0, NULL);
  1132. }
  1133. /* This function loops until the PMU is idle and prevents it from
  1134. * anwsering to ADB interrupts. pmu_request can still be called.
  1135. * This is done to avoid spurrious shutdowns when we know we'll have
  1136. * interrupts switched off for a long time
  1137. */
  1138. void
  1139. pmu_suspend(void)
  1140. {
  1141. unsigned long flags;
  1142. if (!via)
  1143. return;
  1144. spin_lock_irqsave(&pmu_lock, flags);
  1145. pmu_suspended++;
  1146. if (pmu_suspended > 1) {
  1147. spin_unlock_irqrestore(&pmu_lock, flags);
  1148. return;
  1149. }
  1150. do {
  1151. spin_unlock_irqrestore(&pmu_lock, flags);
  1152. if (req_awaiting_reply)
  1153. adb_int_pending = 1;
  1154. via_pmu_interrupt(0, NULL);
  1155. spin_lock_irqsave(&pmu_lock, flags);
  1156. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1157. if (gpio_irq >= 0)
  1158. disable_irq_nosync(gpio_irq);
  1159. out_8(&via[IER], CB1_INT | IER_CLR);
  1160. spin_unlock_irqrestore(&pmu_lock, flags);
  1161. break;
  1162. }
  1163. } while (1);
  1164. }
  1165. void
  1166. pmu_resume(void)
  1167. {
  1168. unsigned long flags;
  1169. if (!via || (pmu_suspended < 1))
  1170. return;
  1171. spin_lock_irqsave(&pmu_lock, flags);
  1172. pmu_suspended--;
  1173. if (pmu_suspended > 0) {
  1174. spin_unlock_irqrestore(&pmu_lock, flags);
  1175. return;
  1176. }
  1177. adb_int_pending = 1;
  1178. if (gpio_irq >= 0)
  1179. enable_irq(gpio_irq);
  1180. out_8(&via[IER], CB1_INT | IER_SET);
  1181. spin_unlock_irqrestore(&pmu_lock, flags);
  1182. pmu_poll();
  1183. }
  1184. /* Interrupt data could be the result data from an ADB cmd */
  1185. static void
  1186. pmu_handle_data(unsigned char *data, int len)
  1187. {
  1188. unsigned char ints, pirq;
  1189. int i = 0;
  1190. asleep = 0;
  1191. if (drop_interrupts || len < 1) {
  1192. adb_int_pending = 0;
  1193. pmu_irq_stats[8]++;
  1194. return;
  1195. }
  1196. /* Get PMU interrupt mask */
  1197. ints = data[0];
  1198. /* Record zero interrupts for stats */
  1199. if (ints == 0)
  1200. pmu_irq_stats[9]++;
  1201. /* Hack to deal with ADB autopoll flag */
  1202. if (ints & PMU_INT_ADB)
  1203. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1204. next:
  1205. if (ints == 0) {
  1206. if (i > pmu_irq_stats[10])
  1207. pmu_irq_stats[10] = i;
  1208. return;
  1209. }
  1210. for (pirq = 0; pirq < 8; pirq++)
  1211. if (ints & (1 << pirq))
  1212. break;
  1213. pmu_irq_stats[pirq]++;
  1214. i++;
  1215. ints &= ~(1 << pirq);
  1216. /* Note: for some reason, we get an interrupt with len=1,
  1217. * data[0]==0 after each normal ADB interrupt, at least
  1218. * on the Pismo. Still investigating... --BenH
  1219. */
  1220. if ((1 << pirq) & PMU_INT_ADB) {
  1221. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1222. struct adb_request *req = req_awaiting_reply;
  1223. if (req == 0) {
  1224. printk(KERN_ERR "PMU: extra ADB reply\n");
  1225. return;
  1226. }
  1227. req_awaiting_reply = NULL;
  1228. if (len <= 2)
  1229. req->reply_len = 0;
  1230. else {
  1231. memcpy(req->reply, data + 1, len - 1);
  1232. req->reply_len = len - 1;
  1233. }
  1234. pmu_done(req);
  1235. } else {
  1236. if (len == 4 && data[1] == 0x2c) {
  1237. extern int xmon_wants_key, xmon_adb_keycode;
  1238. if (xmon_wants_key) {
  1239. xmon_adb_keycode = data[2];
  1240. return;
  1241. }
  1242. }
  1243. #ifdef CONFIG_ADB
  1244. /*
  1245. * XXX On the [23]400 the PMU gives us an up
  1246. * event for keycodes 0x74 or 0x75 when the PC
  1247. * card eject buttons are released, so we
  1248. * ignore those events.
  1249. */
  1250. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1251. && data[1] == 0x2c && data[3] == 0xff
  1252. && (data[2] & ~1) == 0xf4))
  1253. adb_input(data+1, len-1, 1);
  1254. #endif /* CONFIG_ADB */
  1255. }
  1256. }
  1257. /* Sound/brightness button pressed */
  1258. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1259. #ifdef CONFIG_PMAC_BACKLIGHT
  1260. if (len == 3)
  1261. pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
  1262. #endif
  1263. }
  1264. /* Tick interrupt */
  1265. else if ((1 << pirq) & PMU_INT_TICK) {
  1266. /* Environement or tick interrupt, query batteries */
  1267. if (pmu_battery_count) {
  1268. if ((--query_batt_timer) == 0) {
  1269. query_battery_state();
  1270. query_batt_timer = BATTERY_POLLING_COUNT;
  1271. }
  1272. }
  1273. }
  1274. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1275. if (pmu_battery_count)
  1276. query_battery_state();
  1277. pmu_pass_intr(data, len);
  1278. /* len == 6 is probably a bad check. But how do I
  1279. * know what PMU versions send what events here? */
  1280. if (len == 6) {
  1281. via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
  1282. via_pmu_event(PMU_EVT_LID, data[1]&1);
  1283. }
  1284. } else {
  1285. pmu_pass_intr(data, len);
  1286. }
  1287. goto next;
  1288. }
  1289. static struct adb_request*
  1290. pmu_sr_intr(void)
  1291. {
  1292. struct adb_request *req;
  1293. int bite = 0;
  1294. if (via[B] & TREQ) {
  1295. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
  1296. out_8(&via[IFR], SR_INT);
  1297. return NULL;
  1298. }
  1299. /* The ack may not yet be low when we get the interrupt */
  1300. while ((in_8(&via[B]) & TACK) != 0)
  1301. ;
  1302. /* if reading grab the byte, and reset the interrupt */
  1303. if (pmu_state == reading || pmu_state == reading_intr)
  1304. bite = in_8(&via[SR]);
  1305. /* reset TREQ and wait for TACK to go high */
  1306. out_8(&via[B], in_8(&via[B]) | TREQ);
  1307. wait_for_ack();
  1308. switch (pmu_state) {
  1309. case sending:
  1310. req = current_req;
  1311. if (data_len < 0) {
  1312. data_len = req->nbytes - 1;
  1313. send_byte(data_len);
  1314. break;
  1315. }
  1316. if (data_index <= data_len) {
  1317. send_byte(req->data[data_index++]);
  1318. break;
  1319. }
  1320. req->sent = 1;
  1321. data_len = pmu_data_len[req->data[0]][1];
  1322. if (data_len == 0) {
  1323. pmu_state = idle;
  1324. current_req = req->next;
  1325. if (req->reply_expected)
  1326. req_awaiting_reply = req;
  1327. else
  1328. return req;
  1329. } else {
  1330. pmu_state = reading;
  1331. data_index = 0;
  1332. reply_ptr = req->reply + req->reply_len;
  1333. recv_byte();
  1334. }
  1335. break;
  1336. case intack:
  1337. data_index = 0;
  1338. data_len = -1;
  1339. pmu_state = reading_intr;
  1340. reply_ptr = interrupt_data[int_data_last];
  1341. recv_byte();
  1342. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1343. enable_irq(gpio_irq);
  1344. gpio_irq_enabled = 1;
  1345. }
  1346. break;
  1347. case reading:
  1348. case reading_intr:
  1349. if (data_len == -1) {
  1350. data_len = bite;
  1351. if (bite > 32)
  1352. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1353. } else if (data_index < 32) {
  1354. reply_ptr[data_index++] = bite;
  1355. }
  1356. if (data_index < data_len) {
  1357. recv_byte();
  1358. break;
  1359. }
  1360. if (pmu_state == reading_intr) {
  1361. pmu_state = idle;
  1362. int_data_state[int_data_last] = int_data_ready;
  1363. interrupt_data_len[int_data_last] = data_len;
  1364. } else {
  1365. req = current_req;
  1366. /*
  1367. * For PMU sleep and freq change requests, we lock the
  1368. * PMU until it's explicitly unlocked. This avoids any
  1369. * spurrious event polling getting in
  1370. */
  1371. current_req = req->next;
  1372. req->reply_len += data_index;
  1373. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1374. pmu_state = locked;
  1375. else
  1376. pmu_state = idle;
  1377. return req;
  1378. }
  1379. break;
  1380. default:
  1381. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1382. pmu_state);
  1383. }
  1384. return NULL;
  1385. }
  1386. static irqreturn_t
  1387. via_pmu_interrupt(int irq, void *arg)
  1388. {
  1389. unsigned long flags;
  1390. int intr;
  1391. int nloop = 0;
  1392. int int_data = -1;
  1393. struct adb_request *req = NULL;
  1394. int handled = 0;
  1395. /* This is a bit brutal, we can probably do better */
  1396. spin_lock_irqsave(&pmu_lock, flags);
  1397. ++disable_poll;
  1398. for (;;) {
  1399. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1400. if (intr == 0)
  1401. break;
  1402. handled = 1;
  1403. if (++nloop > 1000) {
  1404. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1405. "intr=%x, ier=%x pmu_state=%d\n",
  1406. intr, in_8(&via[IER]), pmu_state);
  1407. break;
  1408. }
  1409. out_8(&via[IFR], intr);
  1410. if (intr & CB1_INT) {
  1411. adb_int_pending = 1;
  1412. pmu_irq_stats[0]++;
  1413. }
  1414. if (intr & SR_INT) {
  1415. req = pmu_sr_intr();
  1416. if (req)
  1417. break;
  1418. }
  1419. }
  1420. recheck:
  1421. if (pmu_state == idle) {
  1422. if (adb_int_pending) {
  1423. if (int_data_state[0] == int_data_empty)
  1424. int_data_last = 0;
  1425. else if (int_data_state[1] == int_data_empty)
  1426. int_data_last = 1;
  1427. else
  1428. goto no_free_slot;
  1429. pmu_state = intack;
  1430. int_data_state[int_data_last] = int_data_fill;
  1431. /* Sounds safer to make sure ACK is high before writing.
  1432. * This helped kill a problem with ADB and some iBooks
  1433. */
  1434. wait_for_ack();
  1435. send_byte(PMU_INT_ACK);
  1436. adb_int_pending = 0;
  1437. } else if (current_req)
  1438. pmu_start();
  1439. }
  1440. no_free_slot:
  1441. /* Mark the oldest buffer for flushing */
  1442. if (int_data_state[!int_data_last] == int_data_ready) {
  1443. int_data_state[!int_data_last] = int_data_flush;
  1444. int_data = !int_data_last;
  1445. } else if (int_data_state[int_data_last] == int_data_ready) {
  1446. int_data_state[int_data_last] = int_data_flush;
  1447. int_data = int_data_last;
  1448. }
  1449. --disable_poll;
  1450. spin_unlock_irqrestore(&pmu_lock, flags);
  1451. /* Deal with completed PMU requests outside of the lock */
  1452. if (req) {
  1453. pmu_done(req);
  1454. req = NULL;
  1455. }
  1456. /* Deal with interrupt datas outside of the lock */
  1457. if (int_data >= 0) {
  1458. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
  1459. spin_lock_irqsave(&pmu_lock, flags);
  1460. ++disable_poll;
  1461. int_data_state[int_data] = int_data_empty;
  1462. int_data = -1;
  1463. goto recheck;
  1464. }
  1465. return IRQ_RETVAL(handled);
  1466. }
  1467. void
  1468. pmu_unlock(void)
  1469. {
  1470. unsigned long flags;
  1471. spin_lock_irqsave(&pmu_lock, flags);
  1472. if (pmu_state == locked)
  1473. pmu_state = idle;
  1474. adb_int_pending = 1;
  1475. spin_unlock_irqrestore(&pmu_lock, flags);
  1476. }
  1477. static irqreturn_t
  1478. gpio1_interrupt(int irq, void *arg)
  1479. {
  1480. unsigned long flags;
  1481. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1482. spin_lock_irqsave(&pmu_lock, flags);
  1483. if (gpio_irq_enabled > 0) {
  1484. disable_irq_nosync(gpio_irq);
  1485. gpio_irq_enabled = 0;
  1486. }
  1487. pmu_irq_stats[1]++;
  1488. adb_int_pending = 1;
  1489. spin_unlock_irqrestore(&pmu_lock, flags);
  1490. via_pmu_interrupt(0, NULL);
  1491. return IRQ_HANDLED;
  1492. }
  1493. return IRQ_NONE;
  1494. }
  1495. void
  1496. pmu_enable_irled(int on)
  1497. {
  1498. struct adb_request req;
  1499. if (vias == NULL)
  1500. return ;
  1501. if (pmu_kind == PMU_KEYLARGO_BASED)
  1502. return ;
  1503. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1504. (on ? PMU_POW_ON : PMU_POW_OFF));
  1505. pmu_wait_complete(&req);
  1506. }
  1507. void
  1508. pmu_restart(void)
  1509. {
  1510. struct adb_request req;
  1511. if (via == NULL)
  1512. return;
  1513. local_irq_disable();
  1514. drop_interrupts = 1;
  1515. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1516. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1517. PMU_INT_TICK );
  1518. while(!req.complete)
  1519. pmu_poll();
  1520. }
  1521. pmu_request(&req, NULL, 1, PMU_RESET);
  1522. pmu_wait_complete(&req);
  1523. for (;;)
  1524. ;
  1525. }
  1526. void
  1527. pmu_shutdown(void)
  1528. {
  1529. struct adb_request req;
  1530. if (via == NULL)
  1531. return;
  1532. local_irq_disable();
  1533. drop_interrupts = 1;
  1534. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1535. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1536. PMU_INT_TICK );
  1537. pmu_wait_complete(&req);
  1538. } else {
  1539. /* Disable server mode on shutdown or we'll just
  1540. * wake up again
  1541. */
  1542. pmu_set_server_mode(0);
  1543. }
  1544. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1545. 'M', 'A', 'T', 'T');
  1546. pmu_wait_complete(&req);
  1547. for (;;)
  1548. ;
  1549. }
  1550. int
  1551. pmu_present(void)
  1552. {
  1553. return via != 0;
  1554. }
  1555. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1556. /*
  1557. * Put the powerbook to sleep.
  1558. */
  1559. static u32 save_via[8];
  1560. static void
  1561. save_via_state(void)
  1562. {
  1563. save_via[0] = in_8(&via[ANH]);
  1564. save_via[1] = in_8(&via[DIRA]);
  1565. save_via[2] = in_8(&via[B]);
  1566. save_via[3] = in_8(&via[DIRB]);
  1567. save_via[4] = in_8(&via[PCR]);
  1568. save_via[5] = in_8(&via[ACR]);
  1569. save_via[6] = in_8(&via[T1CL]);
  1570. save_via[7] = in_8(&via[T1CH]);
  1571. }
  1572. static void
  1573. restore_via_state(void)
  1574. {
  1575. out_8(&via[ANH], save_via[0]);
  1576. out_8(&via[DIRA], save_via[1]);
  1577. out_8(&via[B], save_via[2]);
  1578. out_8(&via[DIRB], save_via[3]);
  1579. out_8(&via[PCR], save_via[4]);
  1580. out_8(&via[ACR], save_via[5]);
  1581. out_8(&via[T1CL], save_via[6]);
  1582. out_8(&via[T1CH], save_via[7]);
  1583. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  1584. out_8(&via[IFR], 0x7f); /* clear IFR */
  1585. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  1586. }
  1587. #define GRACKLE_PM (1<<7)
  1588. #define GRACKLE_DOZE (1<<5)
  1589. #define GRACKLE_NAP (1<<4)
  1590. #define GRACKLE_SLEEP (1<<3)
  1591. static int powerbook_sleep_grackle(void)
  1592. {
  1593. unsigned long save_l2cr;
  1594. unsigned short pmcr1;
  1595. struct adb_request req;
  1596. struct pci_dev *grackle;
  1597. grackle = pci_get_bus_and_slot(0, 0);
  1598. if (!grackle)
  1599. return -ENODEV;
  1600. /* Turn off various things. Darwin does some retry tests here... */
  1601. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  1602. pmu_wait_complete(&req);
  1603. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1604. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1605. pmu_wait_complete(&req);
  1606. /* For 750, save backside cache setting and disable it */
  1607. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1608. if (!__fake_sleep) {
  1609. /* Ask the PMU to put us to sleep */
  1610. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1611. pmu_wait_complete(&req);
  1612. }
  1613. /* The VIA is supposed not to be restored correctly*/
  1614. save_via_state();
  1615. /* We shut down some HW */
  1616. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  1617. pci_read_config_word(grackle, 0x70, &pmcr1);
  1618. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  1619. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  1620. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  1621. pci_write_config_word(grackle, 0x70, pmcr1);
  1622. /* Call low-level ASM sleep handler */
  1623. if (__fake_sleep)
  1624. mdelay(5000);
  1625. else
  1626. low_sleep_handler();
  1627. /* We're awake again, stop grackle PM */
  1628. pci_read_config_word(grackle, 0x70, &pmcr1);
  1629. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  1630. pci_write_config_word(grackle, 0x70, pmcr1);
  1631. pci_dev_put(grackle);
  1632. /* Make sure the PMU is idle */
  1633. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  1634. restore_via_state();
  1635. /* Restore L2 cache */
  1636. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1637. _set_L2CR(save_l2cr);
  1638. /* Restore userland MMU context */
  1639. switch_mmu_context(NULL, current->active_mm);
  1640. /* Power things up */
  1641. pmu_unlock();
  1642. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1643. pmu_wait_complete(&req);
  1644. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  1645. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  1646. pmu_wait_complete(&req);
  1647. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1648. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1649. pmu_wait_complete(&req);
  1650. return 0;
  1651. }
  1652. static int
  1653. powerbook_sleep_Core99(void)
  1654. {
  1655. unsigned long save_l2cr;
  1656. unsigned long save_l3cr;
  1657. struct adb_request req;
  1658. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  1659. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  1660. return -ENOSYS;
  1661. }
  1662. if (num_online_cpus() > 1 || cpu_is_offline(0))
  1663. return -EAGAIN;
  1664. /* Stop environment and ADB interrupts */
  1665. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1666. pmu_wait_complete(&req);
  1667. /* Tell PMU what events will wake us up */
  1668. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  1669. 0xff, 0xff);
  1670. pmu_wait_complete(&req);
  1671. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  1672. 0, PMU_PWR_WAKEUP_KEY |
  1673. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  1674. pmu_wait_complete(&req);
  1675. /* Save the state of the L2 and L3 caches */
  1676. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  1677. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1678. if (!__fake_sleep) {
  1679. /* Ask the PMU to put us to sleep */
  1680. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1681. pmu_wait_complete(&req);
  1682. }
  1683. /* The VIA is supposed not to be restored correctly*/
  1684. save_via_state();
  1685. /* Shut down various ASICs. There's a chance that we can no longer
  1686. * talk to the PMU after this, so I moved it to _after_ sending the
  1687. * sleep command to it. Still need to be checked.
  1688. */
  1689. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1690. /* Call low-level ASM sleep handler */
  1691. if (__fake_sleep)
  1692. mdelay(5000);
  1693. else
  1694. low_sleep_handler();
  1695. /* Restore Apple core ASICs state */
  1696. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1697. /* Restore VIA */
  1698. restore_via_state();
  1699. /* tweak LPJ before cpufreq is there */
  1700. loops_per_jiffy *= 2;
  1701. /* Restore video */
  1702. pmac_call_early_video_resume();
  1703. /* Restore L2 cache */
  1704. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1705. _set_L2CR(save_l2cr);
  1706. /* Restore L3 cache */
  1707. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  1708. _set_L3CR(save_l3cr);
  1709. /* Restore userland MMU context */
  1710. switch_mmu_context(NULL, current->active_mm);
  1711. /* Tell PMU we are ready */
  1712. pmu_unlock();
  1713. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  1714. pmu_wait_complete(&req);
  1715. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1716. pmu_wait_complete(&req);
  1717. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  1718. loops_per_jiffy /= 2;
  1719. return 0;
  1720. }
  1721. #define PB3400_MEM_CTRL 0xf8000000
  1722. #define PB3400_MEM_CTRL_SLEEP 0x70
  1723. static void __iomem *pb3400_mem_ctrl;
  1724. static void powerbook_sleep_init_3400(void)
  1725. {
  1726. /* map in the memory controller registers */
  1727. pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  1728. if (pb3400_mem_ctrl == NULL)
  1729. printk(KERN_WARNING "ioremap failed: sleep won't be possible");
  1730. }
  1731. static int powerbook_sleep_3400(void)
  1732. {
  1733. int i, x;
  1734. unsigned int hid0;
  1735. unsigned long msr;
  1736. struct adb_request sleep_req;
  1737. unsigned int __iomem *mem_ctrl_sleep;
  1738. if (pb3400_mem_ctrl == NULL)
  1739. return -ENOMEM;
  1740. mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  1741. /* Set the memory controller to keep the memory refreshed
  1742. while we're asleep */
  1743. for (i = 0x403f; i >= 0x4000; --i) {
  1744. out_be32(mem_ctrl_sleep, i);
  1745. do {
  1746. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  1747. } while (x == 0);
  1748. if (x >= 0x100)
  1749. break;
  1750. }
  1751. /* Ask the PMU to put us to sleep */
  1752. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1753. pmu_wait_complete(&sleep_req);
  1754. pmu_unlock();
  1755. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1756. asleep = 1;
  1757. /* Put the CPU into sleep mode */
  1758. hid0 = mfspr(SPRN_HID0);
  1759. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  1760. mtspr(SPRN_HID0, hid0);
  1761. local_irq_enable();
  1762. msr = mfmsr() | MSR_POW;
  1763. while (asleep) {
  1764. mb();
  1765. mtmsr(msr);
  1766. isync();
  1767. }
  1768. local_irq_disable();
  1769. /* OK, we're awake again, start restoring things */
  1770. out_be32(mem_ctrl_sleep, 0x3f);
  1771. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1772. return 0;
  1773. }
  1774. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  1775. /*
  1776. * Support for /dev/pmu device
  1777. */
  1778. #define RB_SIZE 0x10
  1779. struct pmu_private {
  1780. struct list_head list;
  1781. int rb_get;
  1782. int rb_put;
  1783. struct rb_entry {
  1784. unsigned short len;
  1785. unsigned char data[16];
  1786. } rb_buf[RB_SIZE];
  1787. wait_queue_head_t wait;
  1788. spinlock_t lock;
  1789. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1790. int backlight_locker;
  1791. #endif
  1792. };
  1793. static LIST_HEAD(all_pmu_pvt);
  1794. static DEFINE_SPINLOCK(all_pvt_lock);
  1795. static void
  1796. pmu_pass_intr(unsigned char *data, int len)
  1797. {
  1798. struct pmu_private *pp;
  1799. struct list_head *list;
  1800. int i;
  1801. unsigned long flags;
  1802. if (len > sizeof(pp->rb_buf[0].data))
  1803. len = sizeof(pp->rb_buf[0].data);
  1804. spin_lock_irqsave(&all_pvt_lock, flags);
  1805. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  1806. pp = list_entry(list, struct pmu_private, list);
  1807. spin_lock(&pp->lock);
  1808. i = pp->rb_put + 1;
  1809. if (i >= RB_SIZE)
  1810. i = 0;
  1811. if (i != pp->rb_get) {
  1812. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  1813. rp->len = len;
  1814. memcpy(rp->data, data, len);
  1815. pp->rb_put = i;
  1816. wake_up_interruptible(&pp->wait);
  1817. }
  1818. spin_unlock(&pp->lock);
  1819. }
  1820. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1821. }
  1822. static int
  1823. pmu_open(struct inode *inode, struct file *file)
  1824. {
  1825. struct pmu_private *pp;
  1826. unsigned long flags;
  1827. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  1828. if (pp == 0)
  1829. return -ENOMEM;
  1830. pp->rb_get = pp->rb_put = 0;
  1831. spin_lock_init(&pp->lock);
  1832. init_waitqueue_head(&pp->wait);
  1833. mutex_lock(&pmu_info_proc_mutex);
  1834. spin_lock_irqsave(&all_pvt_lock, flags);
  1835. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1836. pp->backlight_locker = 0;
  1837. #endif
  1838. list_add(&pp->list, &all_pmu_pvt);
  1839. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1840. file->private_data = pp;
  1841. mutex_unlock(&pmu_info_proc_mutex);
  1842. return 0;
  1843. }
  1844. static ssize_t
  1845. pmu_read(struct file *file, char __user *buf,
  1846. size_t count, loff_t *ppos)
  1847. {
  1848. struct pmu_private *pp = file->private_data;
  1849. DECLARE_WAITQUEUE(wait, current);
  1850. unsigned long flags;
  1851. int ret = 0;
  1852. if (count < 1 || pp == 0)
  1853. return -EINVAL;
  1854. if (!access_ok(VERIFY_WRITE, buf, count))
  1855. return -EFAULT;
  1856. spin_lock_irqsave(&pp->lock, flags);
  1857. add_wait_queue(&pp->wait, &wait);
  1858. set_current_state(TASK_INTERRUPTIBLE);
  1859. for (;;) {
  1860. ret = -EAGAIN;
  1861. if (pp->rb_get != pp->rb_put) {
  1862. int i = pp->rb_get;
  1863. struct rb_entry *rp = &pp->rb_buf[i];
  1864. ret = rp->len;
  1865. spin_unlock_irqrestore(&pp->lock, flags);
  1866. if (ret > count)
  1867. ret = count;
  1868. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  1869. ret = -EFAULT;
  1870. if (++i >= RB_SIZE)
  1871. i = 0;
  1872. spin_lock_irqsave(&pp->lock, flags);
  1873. pp->rb_get = i;
  1874. }
  1875. if (ret >= 0)
  1876. break;
  1877. if (file->f_flags & O_NONBLOCK)
  1878. break;
  1879. ret = -ERESTARTSYS;
  1880. if (signal_pending(current))
  1881. break;
  1882. spin_unlock_irqrestore(&pp->lock, flags);
  1883. schedule();
  1884. spin_lock_irqsave(&pp->lock, flags);
  1885. }
  1886. __set_current_state(TASK_RUNNING);
  1887. remove_wait_queue(&pp->wait, &wait);
  1888. spin_unlock_irqrestore(&pp->lock, flags);
  1889. return ret;
  1890. }
  1891. static ssize_t
  1892. pmu_write(struct file *file, const char __user *buf,
  1893. size_t count, loff_t *ppos)
  1894. {
  1895. return 0;
  1896. }
  1897. static unsigned int
  1898. pmu_fpoll(struct file *filp, poll_table *wait)
  1899. {
  1900. struct pmu_private *pp = filp->private_data;
  1901. unsigned int mask = 0;
  1902. unsigned long flags;
  1903. if (pp == 0)
  1904. return 0;
  1905. poll_wait(filp, &pp->wait, wait);
  1906. spin_lock_irqsave(&pp->lock, flags);
  1907. if (pp->rb_get != pp->rb_put)
  1908. mask |= POLLIN;
  1909. spin_unlock_irqrestore(&pp->lock, flags);
  1910. return mask;
  1911. }
  1912. static int
  1913. pmu_release(struct inode *inode, struct file *file)
  1914. {
  1915. struct pmu_private *pp = file->private_data;
  1916. unsigned long flags;
  1917. if (pp != 0) {
  1918. file->private_data = NULL;
  1919. spin_lock_irqsave(&all_pvt_lock, flags);
  1920. list_del(&pp->list);
  1921. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1922. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1923. if (pp->backlight_locker)
  1924. pmac_backlight_enable();
  1925. #endif
  1926. kfree(pp);
  1927. }
  1928. return 0;
  1929. }
  1930. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1931. static void pmac_suspend_disable_irqs(void)
  1932. {
  1933. /* Call platform functions marked "on sleep" */
  1934. pmac_pfunc_i2c_suspend();
  1935. pmac_pfunc_base_suspend();
  1936. }
  1937. static int powerbook_sleep(suspend_state_t state)
  1938. {
  1939. int error = 0;
  1940. /* Wait for completion of async requests */
  1941. while (!batt_req.complete)
  1942. pmu_poll();
  1943. /* Giveup the lazy FPU & vec so we don't have to back them
  1944. * up from the low level code
  1945. */
  1946. enable_kernel_fp();
  1947. #ifdef CONFIG_ALTIVEC
  1948. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  1949. enable_kernel_altivec();
  1950. #endif /* CONFIG_ALTIVEC */
  1951. switch (pmu_kind) {
  1952. case PMU_OHARE_BASED:
  1953. error = powerbook_sleep_3400();
  1954. break;
  1955. case PMU_HEATHROW_BASED:
  1956. case PMU_PADDINGTON_BASED:
  1957. error = powerbook_sleep_grackle();
  1958. break;
  1959. case PMU_KEYLARGO_BASED:
  1960. error = powerbook_sleep_Core99();
  1961. break;
  1962. default:
  1963. return -ENOSYS;
  1964. }
  1965. if (error)
  1966. return error;
  1967. mdelay(100);
  1968. return 0;
  1969. }
  1970. static void pmac_suspend_enable_irqs(void)
  1971. {
  1972. /* Force a poll of ADB interrupts */
  1973. adb_int_pending = 1;
  1974. via_pmu_interrupt(0, NULL);
  1975. mdelay(10);
  1976. /* Call platform functions marked "on wake" */
  1977. pmac_pfunc_base_resume();
  1978. pmac_pfunc_i2c_resume();
  1979. }
  1980. static int pmu_sleep_valid(suspend_state_t state)
  1981. {
  1982. return state == PM_SUSPEND_MEM
  1983. && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
  1984. }
  1985. static const struct platform_suspend_ops pmu_pm_ops = {
  1986. .enter = powerbook_sleep,
  1987. .valid = pmu_sleep_valid,
  1988. };
  1989. static int register_pmu_pm_ops(void)
  1990. {
  1991. if (pmu_kind == PMU_OHARE_BASED)
  1992. powerbook_sleep_init_3400();
  1993. ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
  1994. ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
  1995. suspend_set_ops(&pmu_pm_ops);
  1996. return 0;
  1997. }
  1998. device_initcall(register_pmu_pm_ops);
  1999. #endif
  2000. static int pmu_ioctl(struct file *filp,
  2001. u_int cmd, u_long arg)
  2002. {
  2003. __u32 __user *argp = (__u32 __user *)arg;
  2004. int error = -EINVAL;
  2005. switch (cmd) {
  2006. case PMU_IOC_SLEEP:
  2007. if (!capable(CAP_SYS_ADMIN))
  2008. return -EACCES;
  2009. return pm_suspend(PM_SUSPEND_MEM);
  2010. case PMU_IOC_CAN_SLEEP:
  2011. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
  2012. return put_user(0, argp);
  2013. else
  2014. return put_user(1, argp);
  2015. #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
  2016. /* Compatibility ioctl's for backlight */
  2017. case PMU_IOC_GET_BACKLIGHT:
  2018. {
  2019. int brightness;
  2020. brightness = pmac_backlight_get_legacy_brightness();
  2021. if (brightness < 0)
  2022. return brightness;
  2023. else
  2024. return put_user(brightness, argp);
  2025. }
  2026. case PMU_IOC_SET_BACKLIGHT:
  2027. {
  2028. int brightness;
  2029. error = get_user(brightness, argp);
  2030. if (error)
  2031. return error;
  2032. return pmac_backlight_set_legacy_brightness(brightness);
  2033. }
  2034. #ifdef CONFIG_INPUT_ADBHID
  2035. case PMU_IOC_GRAB_BACKLIGHT: {
  2036. struct pmu_private *pp = filp->private_data;
  2037. if (pp->backlight_locker)
  2038. return 0;
  2039. pp->backlight_locker = 1;
  2040. pmac_backlight_disable();
  2041. return 0;
  2042. }
  2043. #endif /* CONFIG_INPUT_ADBHID */
  2044. #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
  2045. case PMU_IOC_GET_MODEL:
  2046. return put_user(pmu_kind, argp);
  2047. case PMU_IOC_HAS_ADB:
  2048. return put_user(pmu_has_adb, argp);
  2049. }
  2050. return error;
  2051. }
  2052. static long pmu_unlocked_ioctl(struct file *filp,
  2053. u_int cmd, u_long arg)
  2054. {
  2055. int ret;
  2056. mutex_lock(&pmu_info_proc_mutex);
  2057. ret = pmu_ioctl(filp, cmd, arg);
  2058. mutex_unlock(&pmu_info_proc_mutex);
  2059. return ret;
  2060. }
  2061. #ifdef CONFIG_COMPAT
  2062. #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
  2063. #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
  2064. #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
  2065. #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
  2066. #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
  2067. #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
  2068. static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
  2069. {
  2070. switch (cmd) {
  2071. case PMU_IOC_SLEEP:
  2072. break;
  2073. case PMU_IOC_GET_BACKLIGHT32:
  2074. cmd = PMU_IOC_GET_BACKLIGHT;
  2075. break;
  2076. case PMU_IOC_SET_BACKLIGHT32:
  2077. cmd = PMU_IOC_SET_BACKLIGHT;
  2078. break;
  2079. case PMU_IOC_GET_MODEL32:
  2080. cmd = PMU_IOC_GET_MODEL;
  2081. break;
  2082. case PMU_IOC_HAS_ADB32:
  2083. cmd = PMU_IOC_HAS_ADB;
  2084. break;
  2085. case PMU_IOC_CAN_SLEEP32:
  2086. cmd = PMU_IOC_CAN_SLEEP;
  2087. break;
  2088. case PMU_IOC_GRAB_BACKLIGHT32:
  2089. cmd = PMU_IOC_GRAB_BACKLIGHT;
  2090. break;
  2091. default:
  2092. return -ENOIOCTLCMD;
  2093. }
  2094. return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
  2095. }
  2096. #endif
  2097. static const struct file_operations pmu_device_fops = {
  2098. .read = pmu_read,
  2099. .write = pmu_write,
  2100. .poll = pmu_fpoll,
  2101. .unlocked_ioctl = pmu_unlocked_ioctl,
  2102. #ifdef CONFIG_COMPAT
  2103. .compat_ioctl = compat_pmu_ioctl,
  2104. #endif
  2105. .open = pmu_open,
  2106. .release = pmu_release,
  2107. .llseek = noop_llseek,
  2108. };
  2109. static struct miscdevice pmu_device = {
  2110. PMU_MINOR, "pmu", &pmu_device_fops
  2111. };
  2112. static int pmu_device_init(void)
  2113. {
  2114. if (!via)
  2115. return 0;
  2116. if (misc_register(&pmu_device) < 0)
  2117. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2118. return 0;
  2119. }
  2120. device_initcall(pmu_device_init);
  2121. #ifdef DEBUG_SLEEP
  2122. static inline void
  2123. polled_handshake(volatile unsigned char __iomem *via)
  2124. {
  2125. via[B] &= ~TREQ; eieio();
  2126. while ((via[B] & TACK) != 0)
  2127. ;
  2128. via[B] |= TREQ; eieio();
  2129. while ((via[B] & TACK) == 0)
  2130. ;
  2131. }
  2132. static inline void
  2133. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2134. {
  2135. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2136. via[SR] = x; eieio();
  2137. polled_handshake(via);
  2138. }
  2139. static inline int
  2140. polled_recv_byte(volatile unsigned char __iomem *via)
  2141. {
  2142. int x;
  2143. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2144. x = via[SR]; eieio();
  2145. polled_handshake(via);
  2146. x = via[SR]; eieio();
  2147. return x;
  2148. }
  2149. int
  2150. pmu_polled_request(struct adb_request *req)
  2151. {
  2152. unsigned long flags;
  2153. int i, l, c;
  2154. volatile unsigned char __iomem *v = via;
  2155. req->complete = 1;
  2156. c = req->data[0];
  2157. l = pmu_data_len[c][0];
  2158. if (l >= 0 && req->nbytes != l + 1)
  2159. return -EINVAL;
  2160. local_irq_save(flags);
  2161. while (pmu_state != idle)
  2162. pmu_poll();
  2163. while ((via[B] & TACK) == 0)
  2164. ;
  2165. polled_send_byte(v, c);
  2166. if (l < 0) {
  2167. l = req->nbytes - 1;
  2168. polled_send_byte(v, l);
  2169. }
  2170. for (i = 1; i <= l; ++i)
  2171. polled_send_byte(v, req->data[i]);
  2172. l = pmu_data_len[c][1];
  2173. if (l < 0)
  2174. l = polled_recv_byte(v);
  2175. for (i = 0; i < l; ++i)
  2176. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2177. if (req->done)
  2178. (*req->done)(req);
  2179. local_irq_restore(flags);
  2180. return 0;
  2181. }
  2182. /* N.B. This doesn't work on the 3400 */
  2183. void pmu_blink(int n)
  2184. {
  2185. struct adb_request req;
  2186. memset(&req, 0, sizeof(req));
  2187. for (; n > 0; --n) {
  2188. req.nbytes = 4;
  2189. req.done = NULL;
  2190. req.data[0] = 0xee;
  2191. req.data[1] = 4;
  2192. req.data[2] = 0;
  2193. req.data[3] = 1;
  2194. req.reply[0] = ADB_RET_OK;
  2195. req.reply_len = 1;
  2196. req.reply_expected = 0;
  2197. pmu_polled_request(&req);
  2198. mdelay(50);
  2199. req.nbytes = 4;
  2200. req.done = NULL;
  2201. req.data[0] = 0xee;
  2202. req.data[1] = 4;
  2203. req.data[2] = 0;
  2204. req.data[3] = 0;
  2205. req.reply[0] = ADB_RET_OK;
  2206. req.reply_len = 1;
  2207. req.reply_expected = 0;
  2208. pmu_polled_request(&req);
  2209. mdelay(50);
  2210. }
  2211. mdelay(50);
  2212. }
  2213. #endif /* DEBUG_SLEEP */
  2214. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2215. int pmu_sys_suspended;
  2216. static int pmu_syscore_suspend(void)
  2217. {
  2218. /* Suspend PMU event interrupts */
  2219. pmu_suspend();
  2220. pmu_sys_suspended = 1;
  2221. #ifdef CONFIG_PMAC_BACKLIGHT
  2222. /* Tell backlight code not to muck around with the chip anymore */
  2223. pmu_backlight_set_sleep(1);
  2224. #endif
  2225. return 0;
  2226. }
  2227. static void pmu_syscore_resume(void)
  2228. {
  2229. struct adb_request req;
  2230. if (!pmu_sys_suspended)
  2231. return;
  2232. /* Tell PMU we are ready */
  2233. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2234. pmu_wait_complete(&req);
  2235. #ifdef CONFIG_PMAC_BACKLIGHT
  2236. /* Tell backlight code it can use the chip again */
  2237. pmu_backlight_set_sleep(0);
  2238. #endif
  2239. /* Resume PMU event interrupts */
  2240. pmu_resume();
  2241. pmu_sys_suspended = 0;
  2242. }
  2243. static struct syscore_ops pmu_syscore_ops = {
  2244. .suspend = pmu_syscore_suspend,
  2245. .resume = pmu_syscore_resume,
  2246. };
  2247. static int pmu_syscore_register(void)
  2248. {
  2249. register_syscore_ops(&pmu_syscore_ops);
  2250. return 0;
  2251. }
  2252. subsys_initcall(pmu_syscore_register);
  2253. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2254. EXPORT_SYMBOL(pmu_request);
  2255. EXPORT_SYMBOL(pmu_queue_request);
  2256. EXPORT_SYMBOL(pmu_poll);
  2257. EXPORT_SYMBOL(pmu_poll_adb);
  2258. EXPORT_SYMBOL(pmu_wait_complete);
  2259. EXPORT_SYMBOL(pmu_suspend);
  2260. EXPORT_SYMBOL(pmu_resume);
  2261. EXPORT_SYMBOL(pmu_unlock);
  2262. #if defined(CONFIG_PPC32)
  2263. EXPORT_SYMBOL(pmu_enable_irled);
  2264. EXPORT_SYMBOL(pmu_battery_count);
  2265. EXPORT_SYMBOL(pmu_batteries);
  2266. EXPORT_SYMBOL(pmu_power_flags);
  2267. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */