st_accel_core.c 20 KB

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  1. /*
  2. * STMicroelectronics accelerometers driver
  3. *
  4. * Copyright 2012-2013 STMicroelectronics Inc.
  5. *
  6. * Denis Ciocca <denis.ciocca@st.com>
  7. *
  8. * Licensed under the GPL-2.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/slab.h>
  13. #include <linux/errno.h>
  14. #include <linux/types.h>
  15. #include <linux/mutex.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/i2c.h>
  18. #include <linux/gpio.h>
  19. #include <linux/irq.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/sysfs.h>
  22. #include <linux/iio/trigger.h>
  23. #include <linux/iio/buffer.h>
  24. #include <linux/iio/common/st_sensors.h>
  25. #include "st_accel.h"
  26. #define ST_ACCEL_NUMBER_DATA_CHANNELS 3
  27. /* DEFAULT VALUE FOR SENSORS */
  28. #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
  29. #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
  30. #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
  31. /* FULLSCALE */
  32. #define ST_ACCEL_FS_AVL_2G 2
  33. #define ST_ACCEL_FS_AVL_4G 4
  34. #define ST_ACCEL_FS_AVL_6G 6
  35. #define ST_ACCEL_FS_AVL_8G 8
  36. #define ST_ACCEL_FS_AVL_16G 16
  37. /* CUSTOM VALUES FOR SENSOR 1 */
  38. #define ST_ACCEL_1_WAI_EXP 0x33
  39. #define ST_ACCEL_1_ODR_ADDR 0x20
  40. #define ST_ACCEL_1_ODR_MASK 0xf0
  41. #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01
  42. #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02
  43. #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03
  44. #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04
  45. #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05
  46. #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06
  47. #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07
  48. #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08
  49. #define ST_ACCEL_1_FS_ADDR 0x23
  50. #define ST_ACCEL_1_FS_MASK 0x30
  51. #define ST_ACCEL_1_FS_AVL_2_VAL 0x00
  52. #define ST_ACCEL_1_FS_AVL_4_VAL 0x01
  53. #define ST_ACCEL_1_FS_AVL_8_VAL 0x02
  54. #define ST_ACCEL_1_FS_AVL_16_VAL 0x03
  55. #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
  56. #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
  57. #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000)
  58. #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000)
  59. #define ST_ACCEL_1_BDU_ADDR 0x23
  60. #define ST_ACCEL_1_BDU_MASK 0x80
  61. #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22
  62. #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10
  63. #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08
  64. #define ST_ACCEL_1_MULTIREAD_BIT true
  65. /* CUSTOM VALUES FOR SENSOR 2 */
  66. #define ST_ACCEL_2_WAI_EXP 0x32
  67. #define ST_ACCEL_2_ODR_ADDR 0x20
  68. #define ST_ACCEL_2_ODR_MASK 0x18
  69. #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00
  70. #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01
  71. #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02
  72. #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03
  73. #define ST_ACCEL_2_PW_ADDR 0x20
  74. #define ST_ACCEL_2_PW_MASK 0xe0
  75. #define ST_ACCEL_2_FS_ADDR 0x23
  76. #define ST_ACCEL_2_FS_MASK 0x30
  77. #define ST_ACCEL_2_FS_AVL_2_VAL 0X00
  78. #define ST_ACCEL_2_FS_AVL_4_VAL 0X01
  79. #define ST_ACCEL_2_FS_AVL_8_VAL 0x03
  80. #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
  81. #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
  82. #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900)
  83. #define ST_ACCEL_2_BDU_ADDR 0x23
  84. #define ST_ACCEL_2_BDU_MASK 0x80
  85. #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22
  86. #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02
  87. #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10
  88. #define ST_ACCEL_2_MULTIREAD_BIT true
  89. /* CUSTOM VALUES FOR SENSOR 3 */
  90. #define ST_ACCEL_3_WAI_EXP 0x40
  91. #define ST_ACCEL_3_ODR_ADDR 0x20
  92. #define ST_ACCEL_3_ODR_MASK 0xf0
  93. #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01
  94. #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02
  95. #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03
  96. #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04
  97. #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05
  98. #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06
  99. #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07
  100. #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08
  101. #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09
  102. #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a
  103. #define ST_ACCEL_3_FS_ADDR 0x24
  104. #define ST_ACCEL_3_FS_MASK 0x38
  105. #define ST_ACCEL_3_FS_AVL_2_VAL 0X00
  106. #define ST_ACCEL_3_FS_AVL_4_VAL 0X01
  107. #define ST_ACCEL_3_FS_AVL_6_VAL 0x02
  108. #define ST_ACCEL_3_FS_AVL_8_VAL 0x03
  109. #define ST_ACCEL_3_FS_AVL_16_VAL 0x04
  110. #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61)
  111. #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122)
  112. #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183)
  113. #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244)
  114. #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732)
  115. #define ST_ACCEL_3_BDU_ADDR 0x20
  116. #define ST_ACCEL_3_BDU_MASK 0x08
  117. #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23
  118. #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80
  119. #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00
  120. #define ST_ACCEL_3_IG1_EN_ADDR 0x23
  121. #define ST_ACCEL_3_IG1_EN_MASK 0x08
  122. #define ST_ACCEL_3_MULTIREAD_BIT false
  123. /* CUSTOM VALUES FOR SENSOR 4 */
  124. #define ST_ACCEL_4_WAI_EXP 0x3a
  125. #define ST_ACCEL_4_ODR_ADDR 0x20
  126. #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */
  127. #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00
  128. #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01
  129. #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02
  130. #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03
  131. #define ST_ACCEL_4_PW_ADDR 0x20
  132. #define ST_ACCEL_4_PW_MASK 0xc0
  133. #define ST_ACCEL_4_FS_ADDR 0x21
  134. #define ST_ACCEL_4_FS_MASK 0x80
  135. #define ST_ACCEL_4_FS_AVL_2_VAL 0X00
  136. #define ST_ACCEL_4_FS_AVL_6_VAL 0X01
  137. #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024)
  138. #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340)
  139. #define ST_ACCEL_4_BDU_ADDR 0x21
  140. #define ST_ACCEL_4_BDU_MASK 0x40
  141. #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
  142. #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
  143. #define ST_ACCEL_4_IG1_EN_ADDR 0x21
  144. #define ST_ACCEL_4_IG1_EN_MASK 0x08
  145. #define ST_ACCEL_4_MULTIREAD_BIT true
  146. /* CUSTOM VALUES FOR SENSOR 5 */
  147. #define ST_ACCEL_5_WAI_EXP 0x3b
  148. #define ST_ACCEL_5_ODR_ADDR 0x20
  149. #define ST_ACCEL_5_ODR_MASK 0x80
  150. #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
  151. #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
  152. #define ST_ACCEL_5_PW_ADDR 0x20
  153. #define ST_ACCEL_5_PW_MASK 0x40
  154. #define ST_ACCEL_5_FS_ADDR 0x20
  155. #define ST_ACCEL_5_FS_MASK 0x20
  156. #define ST_ACCEL_5_FS_AVL_2_VAL 0X00
  157. #define ST_ACCEL_5_FS_AVL_8_VAL 0X01
  158. /* TODO: check these resulting gain settings, these are not in the datsheet */
  159. #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
  160. #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
  161. #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
  162. #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
  163. #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
  164. #define ST_ACCEL_5_IG1_EN_ADDR 0x21
  165. #define ST_ACCEL_5_IG1_EN_MASK 0x08
  166. #define ST_ACCEL_5_MULTIREAD_BIT false
  167. static const struct iio_chan_spec st_accel_8bit_channels[] = {
  168. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  169. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  170. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
  171. ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1),
  172. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  173. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  174. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
  175. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1),
  176. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  177. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  178. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
  179. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1),
  180. IIO_CHAN_SOFT_TIMESTAMP(3)
  181. };
  182. static const struct iio_chan_spec st_accel_12bit_channels[] = {
  183. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  184. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  185. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
  186. ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
  187. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  188. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  189. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
  190. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
  191. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  192. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  193. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
  194. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
  195. IIO_CHAN_SOFT_TIMESTAMP(3)
  196. };
  197. static const struct iio_chan_spec st_accel_16bit_channels[] = {
  198. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  199. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  200. ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
  201. ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
  202. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  203. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  204. ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
  205. ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
  206. ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
  207. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  208. ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
  209. ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
  210. IIO_CHAN_SOFT_TIMESTAMP(3)
  211. };
  212. static const struct st_sensor_settings st_accel_sensors_settings[] = {
  213. {
  214. .wai = ST_ACCEL_1_WAI_EXP,
  215. .sensors_supported = {
  216. [0] = LIS3DH_ACCEL_DEV_NAME,
  217. [1] = LSM303DLHC_ACCEL_DEV_NAME,
  218. [2] = LSM330D_ACCEL_DEV_NAME,
  219. [3] = LSM330DL_ACCEL_DEV_NAME,
  220. [4] = LSM330DLC_ACCEL_DEV_NAME,
  221. },
  222. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  223. .odr = {
  224. .addr = ST_ACCEL_1_ODR_ADDR,
  225. .mask = ST_ACCEL_1_ODR_MASK,
  226. .odr_avl = {
  227. { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, },
  228. { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, },
  229. { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, },
  230. { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, },
  231. { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, },
  232. { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, },
  233. { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, },
  234. { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, },
  235. },
  236. },
  237. .pw = {
  238. .addr = ST_ACCEL_1_ODR_ADDR,
  239. .mask = ST_ACCEL_1_ODR_MASK,
  240. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  241. },
  242. .enable_axis = {
  243. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  244. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  245. },
  246. .fs = {
  247. .addr = ST_ACCEL_1_FS_ADDR,
  248. .mask = ST_ACCEL_1_FS_MASK,
  249. .fs_avl = {
  250. [0] = {
  251. .num = ST_ACCEL_FS_AVL_2G,
  252. .value = ST_ACCEL_1_FS_AVL_2_VAL,
  253. .gain = ST_ACCEL_1_FS_AVL_2_GAIN,
  254. },
  255. [1] = {
  256. .num = ST_ACCEL_FS_AVL_4G,
  257. .value = ST_ACCEL_1_FS_AVL_4_VAL,
  258. .gain = ST_ACCEL_1_FS_AVL_4_GAIN,
  259. },
  260. [2] = {
  261. .num = ST_ACCEL_FS_AVL_8G,
  262. .value = ST_ACCEL_1_FS_AVL_8_VAL,
  263. .gain = ST_ACCEL_1_FS_AVL_8_GAIN,
  264. },
  265. [3] = {
  266. .num = ST_ACCEL_FS_AVL_16G,
  267. .value = ST_ACCEL_1_FS_AVL_16_VAL,
  268. .gain = ST_ACCEL_1_FS_AVL_16_GAIN,
  269. },
  270. },
  271. },
  272. .bdu = {
  273. .addr = ST_ACCEL_1_BDU_ADDR,
  274. .mask = ST_ACCEL_1_BDU_MASK,
  275. },
  276. .drdy_irq = {
  277. .addr = ST_ACCEL_1_DRDY_IRQ_ADDR,
  278. .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK,
  279. .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK,
  280. },
  281. .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT,
  282. .bootime = 2,
  283. },
  284. {
  285. .wai = ST_ACCEL_2_WAI_EXP,
  286. .sensors_supported = {
  287. [0] = LIS331DLH_ACCEL_DEV_NAME,
  288. [1] = LSM303DL_ACCEL_DEV_NAME,
  289. [2] = LSM303DLH_ACCEL_DEV_NAME,
  290. [3] = LSM303DLM_ACCEL_DEV_NAME,
  291. },
  292. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  293. .odr = {
  294. .addr = ST_ACCEL_2_ODR_ADDR,
  295. .mask = ST_ACCEL_2_ODR_MASK,
  296. .odr_avl = {
  297. { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, },
  298. { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, },
  299. { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, },
  300. { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, },
  301. },
  302. },
  303. .pw = {
  304. .addr = ST_ACCEL_2_PW_ADDR,
  305. .mask = ST_ACCEL_2_PW_MASK,
  306. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  307. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  308. },
  309. .enable_axis = {
  310. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  311. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  312. },
  313. .fs = {
  314. .addr = ST_ACCEL_2_FS_ADDR,
  315. .mask = ST_ACCEL_2_FS_MASK,
  316. .fs_avl = {
  317. [0] = {
  318. .num = ST_ACCEL_FS_AVL_2G,
  319. .value = ST_ACCEL_2_FS_AVL_2_VAL,
  320. .gain = ST_ACCEL_2_FS_AVL_2_GAIN,
  321. },
  322. [1] = {
  323. .num = ST_ACCEL_FS_AVL_4G,
  324. .value = ST_ACCEL_2_FS_AVL_4_VAL,
  325. .gain = ST_ACCEL_2_FS_AVL_4_GAIN,
  326. },
  327. [2] = {
  328. .num = ST_ACCEL_FS_AVL_8G,
  329. .value = ST_ACCEL_2_FS_AVL_8_VAL,
  330. .gain = ST_ACCEL_2_FS_AVL_8_GAIN,
  331. },
  332. },
  333. },
  334. .bdu = {
  335. .addr = ST_ACCEL_2_BDU_ADDR,
  336. .mask = ST_ACCEL_2_BDU_MASK,
  337. },
  338. .drdy_irq = {
  339. .addr = ST_ACCEL_2_DRDY_IRQ_ADDR,
  340. .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK,
  341. .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK,
  342. },
  343. .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT,
  344. .bootime = 2,
  345. },
  346. {
  347. .wai = ST_ACCEL_3_WAI_EXP,
  348. .sensors_supported = {
  349. [0] = LSM330_ACCEL_DEV_NAME,
  350. },
  351. .ch = (struct iio_chan_spec *)st_accel_16bit_channels,
  352. .odr = {
  353. .addr = ST_ACCEL_3_ODR_ADDR,
  354. .mask = ST_ACCEL_3_ODR_MASK,
  355. .odr_avl = {
  356. { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL },
  357. { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, },
  358. { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, },
  359. { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, },
  360. { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, },
  361. { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, },
  362. { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, },
  363. { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, },
  364. { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, },
  365. { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, },
  366. },
  367. },
  368. .pw = {
  369. .addr = ST_ACCEL_3_ODR_ADDR,
  370. .mask = ST_ACCEL_3_ODR_MASK,
  371. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  372. },
  373. .enable_axis = {
  374. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  375. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  376. },
  377. .fs = {
  378. .addr = ST_ACCEL_3_FS_ADDR,
  379. .mask = ST_ACCEL_3_FS_MASK,
  380. .fs_avl = {
  381. [0] = {
  382. .num = ST_ACCEL_FS_AVL_2G,
  383. .value = ST_ACCEL_3_FS_AVL_2_VAL,
  384. .gain = ST_ACCEL_3_FS_AVL_2_GAIN,
  385. },
  386. [1] = {
  387. .num = ST_ACCEL_FS_AVL_4G,
  388. .value = ST_ACCEL_3_FS_AVL_4_VAL,
  389. .gain = ST_ACCEL_3_FS_AVL_4_GAIN,
  390. },
  391. [2] = {
  392. .num = ST_ACCEL_FS_AVL_6G,
  393. .value = ST_ACCEL_3_FS_AVL_6_VAL,
  394. .gain = ST_ACCEL_3_FS_AVL_6_GAIN,
  395. },
  396. [3] = {
  397. .num = ST_ACCEL_FS_AVL_8G,
  398. .value = ST_ACCEL_3_FS_AVL_8_VAL,
  399. .gain = ST_ACCEL_3_FS_AVL_8_GAIN,
  400. },
  401. [4] = {
  402. .num = ST_ACCEL_FS_AVL_16G,
  403. .value = ST_ACCEL_3_FS_AVL_16_VAL,
  404. .gain = ST_ACCEL_3_FS_AVL_16_GAIN,
  405. },
  406. },
  407. },
  408. .bdu = {
  409. .addr = ST_ACCEL_3_BDU_ADDR,
  410. .mask = ST_ACCEL_3_BDU_MASK,
  411. },
  412. .drdy_irq = {
  413. .addr = ST_ACCEL_3_DRDY_IRQ_ADDR,
  414. .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK,
  415. .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK,
  416. .ig1 = {
  417. .en_addr = ST_ACCEL_3_IG1_EN_ADDR,
  418. .en_mask = ST_ACCEL_3_IG1_EN_MASK,
  419. },
  420. },
  421. .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
  422. .bootime = 2,
  423. },
  424. {
  425. .wai = ST_ACCEL_4_WAI_EXP,
  426. .sensors_supported = {
  427. [0] = LIS3LV02DL_ACCEL_DEV_NAME,
  428. },
  429. .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
  430. .odr = {
  431. .addr = ST_ACCEL_4_ODR_ADDR,
  432. .mask = ST_ACCEL_4_ODR_MASK,
  433. .odr_avl = {
  434. { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
  435. { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
  436. { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
  437. { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
  438. },
  439. },
  440. .pw = {
  441. .addr = ST_ACCEL_4_PW_ADDR,
  442. .mask = ST_ACCEL_4_PW_MASK,
  443. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  444. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  445. },
  446. .enable_axis = {
  447. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  448. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  449. },
  450. .fs = {
  451. .addr = ST_ACCEL_4_FS_ADDR,
  452. .mask = ST_ACCEL_4_FS_MASK,
  453. .fs_avl = {
  454. [0] = {
  455. .num = ST_ACCEL_FS_AVL_2G,
  456. .value = ST_ACCEL_4_FS_AVL_2_VAL,
  457. .gain = ST_ACCEL_4_FS_AVL_2_GAIN,
  458. },
  459. [1] = {
  460. .num = ST_ACCEL_FS_AVL_6G,
  461. .value = ST_ACCEL_4_FS_AVL_6_VAL,
  462. .gain = ST_ACCEL_4_FS_AVL_6_GAIN,
  463. },
  464. },
  465. },
  466. .bdu = {
  467. .addr = ST_ACCEL_4_BDU_ADDR,
  468. .mask = ST_ACCEL_4_BDU_MASK,
  469. },
  470. .drdy_irq = {
  471. .addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
  472. .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
  473. .ig1 = {
  474. .en_addr = ST_ACCEL_4_IG1_EN_ADDR,
  475. .en_mask = ST_ACCEL_4_IG1_EN_MASK,
  476. },
  477. },
  478. .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
  479. .bootime = 2, /* guess */
  480. },
  481. {
  482. .wai = ST_ACCEL_5_WAI_EXP,
  483. .sensors_supported = {
  484. [0] = LIS331DL_ACCEL_DEV_NAME,
  485. },
  486. .ch = (struct iio_chan_spec *)st_accel_8bit_channels,
  487. .odr = {
  488. .addr = ST_ACCEL_5_ODR_ADDR,
  489. .mask = ST_ACCEL_5_ODR_MASK,
  490. .odr_avl = {
  491. { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
  492. { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
  493. },
  494. },
  495. .pw = {
  496. .addr = ST_ACCEL_5_PW_ADDR,
  497. .mask = ST_ACCEL_5_PW_MASK,
  498. .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
  499. .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
  500. },
  501. .enable_axis = {
  502. .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
  503. .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
  504. },
  505. .fs = {
  506. .addr = ST_ACCEL_5_FS_ADDR,
  507. .mask = ST_ACCEL_5_FS_MASK,
  508. .fs_avl = {
  509. [0] = {
  510. .num = ST_ACCEL_FS_AVL_2G,
  511. .value = ST_ACCEL_5_FS_AVL_2_VAL,
  512. .gain = ST_ACCEL_5_FS_AVL_2_GAIN,
  513. },
  514. [1] = {
  515. .num = ST_ACCEL_FS_AVL_8G,
  516. .value = ST_ACCEL_5_FS_AVL_8_VAL,
  517. .gain = ST_ACCEL_5_FS_AVL_8_GAIN,
  518. },
  519. },
  520. },
  521. .drdy_irq = {
  522. .addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
  523. .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
  524. .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
  525. },
  526. .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
  527. .bootime = 2, /* guess */
  528. },
  529. };
  530. static int st_accel_read_raw(struct iio_dev *indio_dev,
  531. struct iio_chan_spec const *ch, int *val,
  532. int *val2, long mask)
  533. {
  534. int err;
  535. struct st_sensor_data *adata = iio_priv(indio_dev);
  536. switch (mask) {
  537. case IIO_CHAN_INFO_RAW:
  538. err = st_sensors_read_info_raw(indio_dev, ch, val);
  539. if (err < 0)
  540. goto read_error;
  541. return IIO_VAL_INT;
  542. case IIO_CHAN_INFO_SCALE:
  543. *val = 0;
  544. *val2 = adata->current_fullscale->gain;
  545. return IIO_VAL_INT_PLUS_MICRO;
  546. case IIO_CHAN_INFO_SAMP_FREQ:
  547. *val = adata->odr;
  548. return IIO_VAL_INT;
  549. default:
  550. return -EINVAL;
  551. }
  552. read_error:
  553. return err;
  554. }
  555. static int st_accel_write_raw(struct iio_dev *indio_dev,
  556. struct iio_chan_spec const *chan, int val, int val2, long mask)
  557. {
  558. int err;
  559. switch (mask) {
  560. case IIO_CHAN_INFO_SCALE:
  561. err = st_sensors_set_fullscale_by_gain(indio_dev, val2);
  562. break;
  563. case IIO_CHAN_INFO_SAMP_FREQ:
  564. if (val2)
  565. return -EINVAL;
  566. mutex_lock(&indio_dev->mlock);
  567. err = st_sensors_set_odr(indio_dev, val);
  568. mutex_unlock(&indio_dev->mlock);
  569. return err;
  570. default:
  571. return -EINVAL;
  572. }
  573. return err;
  574. }
  575. static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
  576. static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
  577. static struct attribute *st_accel_attributes[] = {
  578. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  579. &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
  580. NULL,
  581. };
  582. static const struct attribute_group st_accel_attribute_group = {
  583. .attrs = st_accel_attributes,
  584. };
  585. static const struct iio_info accel_info = {
  586. .driver_module = THIS_MODULE,
  587. .attrs = &st_accel_attribute_group,
  588. .read_raw = &st_accel_read_raw,
  589. .write_raw = &st_accel_write_raw,
  590. };
  591. #ifdef CONFIG_IIO_TRIGGER
  592. static const struct iio_trigger_ops st_accel_trigger_ops = {
  593. .owner = THIS_MODULE,
  594. .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
  595. };
  596. #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
  597. #else
  598. #define ST_ACCEL_TRIGGER_OPS NULL
  599. #endif
  600. int st_accel_common_probe(struct iio_dev *indio_dev)
  601. {
  602. struct st_sensor_data *adata = iio_priv(indio_dev);
  603. int irq = adata->get_irq_data_ready(indio_dev);
  604. int err;
  605. indio_dev->modes = INDIO_DIRECT_MODE;
  606. indio_dev->info = &accel_info;
  607. mutex_init(&adata->tb.buf_lock);
  608. st_sensors_power_enable(indio_dev);
  609. err = st_sensors_check_device_support(indio_dev,
  610. ARRAY_SIZE(st_accel_sensors_settings),
  611. st_accel_sensors_settings);
  612. if (err < 0)
  613. return err;
  614. adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
  615. adata->multiread_bit = adata->sensor_settings->multi_read_bit;
  616. indio_dev->channels = adata->sensor_settings->ch;
  617. indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
  618. adata->current_fullscale = (struct st_sensor_fullscale_avl *)
  619. &adata->sensor_settings->fs.fs_avl[0];
  620. adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
  621. if (!adata->dev->platform_data)
  622. adata->dev->platform_data =
  623. (struct st_sensors_platform_data *)&default_accel_pdata;
  624. err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data);
  625. if (err < 0)
  626. return err;
  627. err = st_accel_allocate_ring(indio_dev);
  628. if (err < 0)
  629. return err;
  630. if (irq > 0) {
  631. err = st_sensors_allocate_trigger(indio_dev,
  632. ST_ACCEL_TRIGGER_OPS);
  633. if (err < 0)
  634. goto st_accel_probe_trigger_error;
  635. }
  636. err = iio_device_register(indio_dev);
  637. if (err)
  638. goto st_accel_device_register_error;
  639. dev_info(&indio_dev->dev, "registered accelerometer %s\n",
  640. indio_dev->name);
  641. return 0;
  642. st_accel_device_register_error:
  643. if (irq > 0)
  644. st_sensors_deallocate_trigger(indio_dev);
  645. st_accel_probe_trigger_error:
  646. st_accel_deallocate_ring(indio_dev);
  647. return err;
  648. }
  649. EXPORT_SYMBOL(st_accel_common_probe);
  650. void st_accel_common_remove(struct iio_dev *indio_dev)
  651. {
  652. struct st_sensor_data *adata = iio_priv(indio_dev);
  653. st_sensors_power_disable(indio_dev);
  654. iio_device_unregister(indio_dev);
  655. if (adata->get_irq_data_ready(indio_dev) > 0)
  656. st_sensors_deallocate_trigger(indio_dev);
  657. st_accel_deallocate_ring(indio_dev);
  658. }
  659. EXPORT_SYMBOL(st_accel_common_remove);
  660. MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
  661. MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
  662. MODULE_LICENSE("GPL v2");