qcom_hwspinlock.c 4.4 KB

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  1. /*
  2. * Copyright (c) 2013, The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2015, Sony Mobile Communications AB
  4. *
  5. * This software is licensed under the terms of the GNU General Public
  6. * License version 2, as published by the Free Software Foundation, and
  7. * may be copied, distributed, and modified under those terms.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/hwspinlock.h>
  15. #include <linux/io.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mfd/syscon.h>
  18. #include <linux/module.h>
  19. #include <linux/of.h>
  20. #include <linux/of_device.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/regmap.h>
  24. #include "hwspinlock_internal.h"
  25. #define QCOM_MUTEX_APPS_PROC_ID 1
  26. #define QCOM_MUTEX_NUM_LOCKS 32
  27. static int qcom_hwspinlock_trylock(struct hwspinlock *lock)
  28. {
  29. struct regmap_field *field = lock->priv;
  30. u32 lock_owner;
  31. int ret;
  32. ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID);
  33. if (ret)
  34. return ret;
  35. ret = regmap_field_read(field, &lock_owner);
  36. if (ret)
  37. return ret;
  38. return lock_owner == QCOM_MUTEX_APPS_PROC_ID;
  39. }
  40. static void qcom_hwspinlock_unlock(struct hwspinlock *lock)
  41. {
  42. struct regmap_field *field = lock->priv;
  43. u32 lock_owner;
  44. int ret;
  45. ret = regmap_field_read(field, &lock_owner);
  46. if (ret) {
  47. pr_err("%s: unable to query spinlock owner\n", __func__);
  48. return;
  49. }
  50. if (lock_owner != QCOM_MUTEX_APPS_PROC_ID) {
  51. pr_err("%s: spinlock not owned by us (actual owner is %d)\n",
  52. __func__, lock_owner);
  53. }
  54. ret = regmap_field_write(field, 0);
  55. if (ret)
  56. pr_err("%s: failed to unlock spinlock\n", __func__);
  57. }
  58. static const struct hwspinlock_ops qcom_hwspinlock_ops = {
  59. .trylock = qcom_hwspinlock_trylock,
  60. .unlock = qcom_hwspinlock_unlock,
  61. };
  62. static const struct of_device_id qcom_hwspinlock_of_match[] = {
  63. { .compatible = "qcom,sfpb-mutex" },
  64. { .compatible = "qcom,tcsr-mutex" },
  65. { }
  66. };
  67. MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match);
  68. static int qcom_hwspinlock_probe(struct platform_device *pdev)
  69. {
  70. struct hwspinlock_device *bank;
  71. struct device_node *syscon;
  72. struct reg_field field;
  73. struct regmap *regmap;
  74. size_t array_size;
  75. u32 stride;
  76. u32 base;
  77. int ret;
  78. int i;
  79. syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0);
  80. if (!syscon) {
  81. dev_err(&pdev->dev, "no syscon property\n");
  82. return -ENODEV;
  83. }
  84. regmap = syscon_node_to_regmap(syscon);
  85. if (IS_ERR(regmap))
  86. return PTR_ERR(regmap);
  87. ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base);
  88. if (ret < 0) {
  89. dev_err(&pdev->dev, "no offset in syscon\n");
  90. return -EINVAL;
  91. }
  92. ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride);
  93. if (ret < 0) {
  94. dev_err(&pdev->dev, "no stride syscon\n");
  95. return -EINVAL;
  96. }
  97. array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
  98. bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL);
  99. if (!bank)
  100. return -ENOMEM;
  101. platform_set_drvdata(pdev, bank);
  102. for (i = 0; i < QCOM_MUTEX_NUM_LOCKS; i++) {
  103. field.reg = base + i * stride;
  104. field.lsb = 0;
  105. field.msb = 31;
  106. bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev,
  107. regmap, field);
  108. }
  109. pm_runtime_enable(&pdev->dev);
  110. ret = hwspin_lock_register(bank, &pdev->dev, &qcom_hwspinlock_ops,
  111. 0, QCOM_MUTEX_NUM_LOCKS);
  112. if (ret)
  113. pm_runtime_disable(&pdev->dev);
  114. return ret;
  115. }
  116. static int qcom_hwspinlock_remove(struct platform_device *pdev)
  117. {
  118. struct hwspinlock_device *bank = platform_get_drvdata(pdev);
  119. int ret;
  120. ret = hwspin_lock_unregister(bank);
  121. if (ret) {
  122. dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
  123. return ret;
  124. }
  125. pm_runtime_disable(&pdev->dev);
  126. return 0;
  127. }
  128. static struct platform_driver qcom_hwspinlock_driver = {
  129. .probe = qcom_hwspinlock_probe,
  130. .remove = qcom_hwspinlock_remove,
  131. .driver = {
  132. .name = "qcom_hwspinlock",
  133. .of_match_table = qcom_hwspinlock_of_match,
  134. },
  135. };
  136. static int __init qcom_hwspinlock_init(void)
  137. {
  138. return platform_driver_register(&qcom_hwspinlock_driver);
  139. }
  140. /* board init code might need to reserve hwspinlocks for predefined purposes */
  141. postcore_initcall(qcom_hwspinlock_init);
  142. static void __exit qcom_hwspinlock_exit(void)
  143. {
  144. platform_driver_unregister(&qcom_hwspinlock_driver);
  145. }
  146. module_exit(qcom_hwspinlock_exit);
  147. MODULE_LICENSE("GPL v2");
  148. MODULE_DESCRIPTION("Hardware spinlock driver for Qualcomm SoCs");