w83781d.c 57 KB

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  1. /*
  2. * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. * monitoring
  4. * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
  5. * Philip Edelbrock <phil@netroedge.com>,
  6. * and Mark Studebaker <mdsxyz123@yahoo.com>
  7. * Copyright (c) 2007 - 2008 Jean Delvare <jdelvare@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. /*
  24. * Supports following chips:
  25. *
  26. * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  27. * as99127f 7 3 0 3 0x31 0x12c3 yes no
  28. * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
  29. * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
  30. * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
  31. * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
  32. *
  33. */
  34. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  35. #include <linux/module.h>
  36. #include <linux/init.h>
  37. #include <linux/slab.h>
  38. #include <linux/jiffies.h>
  39. #include <linux/i2c.h>
  40. #include <linux/hwmon.h>
  41. #include <linux/hwmon-vid.h>
  42. #include <linux/hwmon-sysfs.h>
  43. #include <linux/sysfs.h>
  44. #include <linux/err.h>
  45. #include <linux/mutex.h>
  46. #ifdef CONFIG_ISA
  47. #include <linux/platform_device.h>
  48. #include <linux/ioport.h>
  49. #include <linux/io.h>
  50. #endif
  51. #include "lm75.h"
  52. /* Addresses to scan */
  53. static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
  54. 0x2e, 0x2f, I2C_CLIENT_END };
  55. enum chips { w83781d, w83782d, w83783s, as99127f };
  56. /* Insmod parameters */
  57. static unsigned short force_subclients[4];
  58. module_param_array(force_subclients, short, NULL, 0);
  59. MODULE_PARM_DESC(force_subclients,
  60. "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
  61. static bool reset;
  62. module_param(reset, bool, 0);
  63. MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  64. static bool init = 1;
  65. module_param(init, bool, 0);
  66. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  67. /* Constants specified below */
  68. /* Length of ISA address segment */
  69. #define W83781D_EXTENT 8
  70. /* Where are the ISA address/data registers relative to the base address */
  71. #define W83781D_ADDR_REG_OFFSET 5
  72. #define W83781D_DATA_REG_OFFSET 6
  73. /* The device registers */
  74. /* in nr from 0 to 8 */
  75. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  76. (0x554 + (((nr) - 7) * 2)))
  77. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  78. (0x555 + (((nr) - 7) * 2)))
  79. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  80. (0x550 + (nr) - 7))
  81. /* fan nr from 0 to 2 */
  82. #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
  83. #define W83781D_REG_FAN(nr) (0x28 + (nr))
  84. #define W83781D_REG_BANK 0x4E
  85. #define W83781D_REG_TEMP2_CONFIG 0x152
  86. #define W83781D_REG_TEMP3_CONFIG 0x252
  87. /* temp nr from 1 to 3 */
  88. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  89. ((nr == 2) ? (0x0150) : \
  90. (0x27)))
  91. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  92. ((nr == 2) ? (0x153) : \
  93. (0x3A)))
  94. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  95. ((nr == 2) ? (0x155) : \
  96. (0x39)))
  97. #define W83781D_REG_CONFIG 0x40
  98. /* Interrupt status (W83781D, AS99127F) */
  99. #define W83781D_REG_ALARM1 0x41
  100. #define W83781D_REG_ALARM2 0x42
  101. /* Real-time status (W83782D, W83783S) */
  102. #define W83782D_REG_ALARM1 0x459
  103. #define W83782D_REG_ALARM2 0x45A
  104. #define W83782D_REG_ALARM3 0x45B
  105. #define W83781D_REG_BEEP_CONFIG 0x4D
  106. #define W83781D_REG_BEEP_INTS1 0x56
  107. #define W83781D_REG_BEEP_INTS2 0x57
  108. #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
  109. #define W83781D_REG_VID_FANDIV 0x47
  110. #define W83781D_REG_CHIPID 0x49
  111. #define W83781D_REG_WCHIPID 0x58
  112. #define W83781D_REG_CHIPMAN 0x4F
  113. #define W83781D_REG_PIN 0x4B
  114. /* 782D/783S only */
  115. #define W83781D_REG_VBAT 0x5D
  116. /* PWM 782D (1-4) and 783S (1-2) only */
  117. static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
  118. #define W83781D_REG_PWMCLK12 0x5C
  119. #define W83781D_REG_PWMCLK34 0x45C
  120. #define W83781D_REG_I2C_ADDR 0x48
  121. #define W83781D_REG_I2C_SUBADDR 0x4A
  122. /*
  123. * The following are undocumented in the data sheets however we
  124. * received the information in an email from Winbond tech support
  125. */
  126. /* Sensor selection - not on 781d */
  127. #define W83781D_REG_SCFG1 0x5D
  128. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  129. #define W83781D_REG_SCFG2 0x59
  130. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  131. #define W83781D_DEFAULT_BETA 3435
  132. /* Conversions */
  133. #define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)
  134. #define IN_FROM_REG(val) ((val) * 16)
  135. static inline u8
  136. FAN_TO_REG(long rpm, int div)
  137. {
  138. if (rpm == 0)
  139. return 255;
  140. rpm = clamp_val(rpm, 1, 1000000);
  141. return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  142. }
  143. static inline long
  144. FAN_FROM_REG(u8 val, int div)
  145. {
  146. if (val == 0)
  147. return -1;
  148. if (val == 255)
  149. return 0;
  150. return 1350000 / (val * div);
  151. }
  152. #define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)
  153. #define TEMP_FROM_REG(val) ((val) * 1000)
  154. #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
  155. (~(val)) & 0x7fff : (val) & 0xff7fff)
  156. #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
  157. (~(val)) & 0x7fff : (val) & 0xff7fff)
  158. #define DIV_FROM_REG(val) (1 << (val))
  159. static inline u8
  160. DIV_TO_REG(long val, enum chips type)
  161. {
  162. int i;
  163. val = clamp_val(val, 1,
  164. ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
  165. for (i = 0; i < 7; i++) {
  166. if (val == 0)
  167. break;
  168. val >>= 1;
  169. }
  170. return i;
  171. }
  172. struct w83781d_data {
  173. struct i2c_client *client;
  174. struct device *hwmon_dev;
  175. struct mutex lock;
  176. enum chips type;
  177. /* For ISA device only */
  178. const char *name;
  179. int isa_addr;
  180. struct mutex update_lock;
  181. char valid; /* !=0 if following fields are valid */
  182. unsigned long last_updated; /* In jiffies */
  183. struct i2c_client *lm75[2]; /* for secondary I2C addresses */
  184. /* array of 2 pointers to subclients */
  185. u8 in[9]; /* Register value - 8 & 9 for 782D only */
  186. u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
  187. u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
  188. u8 fan[3]; /* Register value */
  189. u8 fan_min[3]; /* Register value */
  190. s8 temp; /* Register value */
  191. s8 temp_max; /* Register value */
  192. s8 temp_max_hyst; /* Register value */
  193. u16 temp_add[2]; /* Register value */
  194. u16 temp_max_add[2]; /* Register value */
  195. u16 temp_max_hyst_add[2]; /* Register value */
  196. u8 fan_div[3]; /* Register encoding, shifted right */
  197. u8 vid; /* Register encoding, combined */
  198. u32 alarms; /* Register encoding, combined */
  199. u32 beep_mask; /* Register encoding, combined */
  200. u8 pwm[4]; /* Register value */
  201. u8 pwm2_enable; /* Boolean */
  202. u16 sens[3]; /*
  203. * 782D/783S only.
  204. * 1 = pentium diode; 2 = 3904 diode;
  205. * 4 = thermistor
  206. */
  207. u8 vrm;
  208. };
  209. static struct w83781d_data *w83781d_data_if_isa(void);
  210. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
  211. static int w83781d_read_value(struct w83781d_data *data, u16 reg);
  212. static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
  213. static struct w83781d_data *w83781d_update_device(struct device *dev);
  214. static void w83781d_init_device(struct device *dev);
  215. /* following are the sysfs callback functions */
  216. #define show_in_reg(reg) \
  217. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  218. char *buf) \
  219. { \
  220. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  221. struct w83781d_data *data = w83781d_update_device(dev); \
  222. return sprintf(buf, "%ld\n", \
  223. (long)IN_FROM_REG(data->reg[attr->index])); \
  224. }
  225. show_in_reg(in);
  226. show_in_reg(in_min);
  227. show_in_reg(in_max);
  228. #define store_in_reg(REG, reg) \
  229. static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
  230. *da, const char *buf, size_t count) \
  231. { \
  232. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  233. struct w83781d_data *data = dev_get_drvdata(dev); \
  234. int nr = attr->index; \
  235. unsigned long val; \
  236. int err = kstrtoul(buf, 10, &val); \
  237. if (err) \
  238. return err; \
  239. mutex_lock(&data->update_lock); \
  240. data->in_##reg[nr] = IN_TO_REG(val); \
  241. w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
  242. data->in_##reg[nr]); \
  243. \
  244. mutex_unlock(&data->update_lock); \
  245. return count; \
  246. }
  247. store_in_reg(MIN, min);
  248. store_in_reg(MAX, max);
  249. #define sysfs_in_offsets(offset) \
  250. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
  251. show_in, NULL, offset); \
  252. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
  253. show_in_min, store_in_min, offset); \
  254. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
  255. show_in_max, store_in_max, offset)
  256. sysfs_in_offsets(0);
  257. sysfs_in_offsets(1);
  258. sysfs_in_offsets(2);
  259. sysfs_in_offsets(3);
  260. sysfs_in_offsets(4);
  261. sysfs_in_offsets(5);
  262. sysfs_in_offsets(6);
  263. sysfs_in_offsets(7);
  264. sysfs_in_offsets(8);
  265. #define show_fan_reg(reg) \
  266. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  267. char *buf) \
  268. { \
  269. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  270. struct w83781d_data *data = w83781d_update_device(dev); \
  271. return sprintf(buf, "%ld\n", \
  272. FAN_FROM_REG(data->reg[attr->index], \
  273. DIV_FROM_REG(data->fan_div[attr->index]))); \
  274. }
  275. show_fan_reg(fan);
  276. show_fan_reg(fan_min);
  277. static ssize_t
  278. store_fan_min(struct device *dev, struct device_attribute *da,
  279. const char *buf, size_t count)
  280. {
  281. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  282. struct w83781d_data *data = dev_get_drvdata(dev);
  283. int nr = attr->index;
  284. unsigned long val;
  285. int err;
  286. err = kstrtoul(buf, 10, &val);
  287. if (err)
  288. return err;
  289. mutex_lock(&data->update_lock);
  290. data->fan_min[nr] =
  291. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  292. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
  293. data->fan_min[nr]);
  294. mutex_unlock(&data->update_lock);
  295. return count;
  296. }
  297. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  298. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  299. show_fan_min, store_fan_min, 0);
  300. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  301. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  302. show_fan_min, store_fan_min, 1);
  303. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  304. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  305. show_fan_min, store_fan_min, 2);
  306. #define show_temp_reg(reg) \
  307. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  308. char *buf) \
  309. { \
  310. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  311. struct w83781d_data *data = w83781d_update_device(dev); \
  312. int nr = attr->index; \
  313. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  314. return sprintf(buf, "%d\n", \
  315. LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  316. } else { /* TEMP1 */ \
  317. return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  318. } \
  319. }
  320. show_temp_reg(temp);
  321. show_temp_reg(temp_max);
  322. show_temp_reg(temp_max_hyst);
  323. #define store_temp_reg(REG, reg) \
  324. static ssize_t store_temp_##reg(struct device *dev, \
  325. struct device_attribute *da, const char *buf, size_t count) \
  326. { \
  327. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  328. struct w83781d_data *data = dev_get_drvdata(dev); \
  329. int nr = attr->index; \
  330. long val; \
  331. int err = kstrtol(buf, 10, &val); \
  332. if (err) \
  333. return err; \
  334. mutex_lock(&data->update_lock); \
  335. \
  336. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  337. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  338. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  339. data->temp_##reg##_add[nr-2]); \
  340. } else { /* TEMP1 */ \
  341. data->temp_##reg = TEMP_TO_REG(val); \
  342. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  343. data->temp_##reg); \
  344. } \
  345. \
  346. mutex_unlock(&data->update_lock); \
  347. return count; \
  348. }
  349. store_temp_reg(OVER, max);
  350. store_temp_reg(HYST, max_hyst);
  351. #define sysfs_temp_offsets(offset) \
  352. static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
  353. show_temp, NULL, offset); \
  354. static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
  355. show_temp_max, store_temp_max, offset); \
  356. static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
  357. show_temp_max_hyst, store_temp_max_hyst, offset);
  358. sysfs_temp_offsets(1);
  359. sysfs_temp_offsets(2);
  360. sysfs_temp_offsets(3);
  361. static ssize_t
  362. show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
  363. {
  364. struct w83781d_data *data = w83781d_update_device(dev);
  365. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  366. }
  367. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  368. static ssize_t
  369. show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
  370. {
  371. struct w83781d_data *data = dev_get_drvdata(dev);
  372. return sprintf(buf, "%ld\n", (long) data->vrm);
  373. }
  374. static ssize_t
  375. store_vrm_reg(struct device *dev, struct device_attribute *attr,
  376. const char *buf, size_t count)
  377. {
  378. struct w83781d_data *data = dev_get_drvdata(dev);
  379. unsigned long val;
  380. int err;
  381. err = kstrtoul(buf, 10, &val);
  382. if (err)
  383. return err;
  384. data->vrm = clamp_val(val, 0, 255);
  385. return count;
  386. }
  387. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  388. static ssize_t
  389. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  390. {
  391. struct w83781d_data *data = w83781d_update_device(dev);
  392. return sprintf(buf, "%u\n", data->alarms);
  393. }
  394. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  395. static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
  396. char *buf)
  397. {
  398. struct w83781d_data *data = w83781d_update_device(dev);
  399. int bitnr = to_sensor_dev_attr(attr)->index;
  400. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  401. }
  402. /* The W83781D has a single alarm bit for temp2 and temp3 */
  403. static ssize_t show_temp3_alarm(struct device *dev,
  404. struct device_attribute *attr, char *buf)
  405. {
  406. struct w83781d_data *data = w83781d_update_device(dev);
  407. int bitnr = (data->type == w83781d) ? 5 : 13;
  408. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  409. }
  410. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  411. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  412. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  413. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  414. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
  415. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
  416. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
  417. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
  418. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
  419. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
  420. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
  421. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
  422. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
  423. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
  424. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
  425. static ssize_t show_beep_mask(struct device *dev,
  426. struct device_attribute *attr, char *buf)
  427. {
  428. struct w83781d_data *data = w83781d_update_device(dev);
  429. return sprintf(buf, "%ld\n",
  430. (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
  431. }
  432. static ssize_t
  433. store_beep_mask(struct device *dev, struct device_attribute *attr,
  434. const char *buf, size_t count)
  435. {
  436. struct w83781d_data *data = dev_get_drvdata(dev);
  437. unsigned long val;
  438. int err;
  439. err = kstrtoul(buf, 10, &val);
  440. if (err)
  441. return err;
  442. mutex_lock(&data->update_lock);
  443. data->beep_mask &= 0x8000; /* preserve beep enable */
  444. data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
  445. w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
  446. data->beep_mask & 0xff);
  447. w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
  448. (data->beep_mask >> 8) & 0xff);
  449. if (data->type != w83781d && data->type != as99127f) {
  450. w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
  451. ((data->beep_mask) >> 16) & 0xff);
  452. }
  453. mutex_unlock(&data->update_lock);
  454. return count;
  455. }
  456. static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
  457. show_beep_mask, store_beep_mask);
  458. static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
  459. char *buf)
  460. {
  461. struct w83781d_data *data = w83781d_update_device(dev);
  462. int bitnr = to_sensor_dev_attr(attr)->index;
  463. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  464. }
  465. static ssize_t
  466. store_beep(struct device *dev, struct device_attribute *attr,
  467. const char *buf, size_t count)
  468. {
  469. struct w83781d_data *data = dev_get_drvdata(dev);
  470. int bitnr = to_sensor_dev_attr(attr)->index;
  471. u8 reg;
  472. unsigned long bit;
  473. int err;
  474. err = kstrtoul(buf, 10, &bit);
  475. if (err)
  476. return err;
  477. if (bit & ~1)
  478. return -EINVAL;
  479. mutex_lock(&data->update_lock);
  480. if (bit)
  481. data->beep_mask |= (1 << bitnr);
  482. else
  483. data->beep_mask &= ~(1 << bitnr);
  484. if (bitnr < 8) {
  485. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  486. if (bit)
  487. reg |= (1 << bitnr);
  488. else
  489. reg &= ~(1 << bitnr);
  490. w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
  491. } else if (bitnr < 16) {
  492. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  493. if (bit)
  494. reg |= (1 << (bitnr - 8));
  495. else
  496. reg &= ~(1 << (bitnr - 8));
  497. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
  498. } else {
  499. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
  500. if (bit)
  501. reg |= (1 << (bitnr - 16));
  502. else
  503. reg &= ~(1 << (bitnr - 16));
  504. w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
  505. }
  506. mutex_unlock(&data->update_lock);
  507. return count;
  508. }
  509. /* The W83781D has a single beep bit for temp2 and temp3 */
  510. static ssize_t show_temp3_beep(struct device *dev,
  511. struct device_attribute *attr, char *buf)
  512. {
  513. struct w83781d_data *data = w83781d_update_device(dev);
  514. int bitnr = (data->type == w83781d) ? 5 : 13;
  515. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  516. }
  517. static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
  518. show_beep, store_beep, 0);
  519. static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
  520. show_beep, store_beep, 1);
  521. static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
  522. show_beep, store_beep, 2);
  523. static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
  524. show_beep, store_beep, 3);
  525. static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
  526. show_beep, store_beep, 8);
  527. static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
  528. show_beep, store_beep, 9);
  529. static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
  530. show_beep, store_beep, 10);
  531. static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
  532. show_beep, store_beep, 16);
  533. static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
  534. show_beep, store_beep, 17);
  535. static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
  536. show_beep, store_beep, 6);
  537. static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
  538. show_beep, store_beep, 7);
  539. static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
  540. show_beep, store_beep, 11);
  541. static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
  542. show_beep, store_beep, 4);
  543. static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
  544. show_beep, store_beep, 5);
  545. static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
  546. show_temp3_beep, store_beep, 13);
  547. static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
  548. show_beep, store_beep, 15);
  549. static ssize_t
  550. show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
  551. {
  552. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  553. struct w83781d_data *data = w83781d_update_device(dev);
  554. return sprintf(buf, "%ld\n",
  555. (long) DIV_FROM_REG(data->fan_div[attr->index]));
  556. }
  557. /*
  558. * Note: we save and restore the fan minimum here, because its value is
  559. * determined in part by the fan divisor. This follows the principle of
  560. * least surprise; the user doesn't expect the fan minimum to change just
  561. * because the divisor changed.
  562. */
  563. static ssize_t
  564. store_fan_div(struct device *dev, struct device_attribute *da,
  565. const char *buf, size_t count)
  566. {
  567. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  568. struct w83781d_data *data = dev_get_drvdata(dev);
  569. unsigned long min;
  570. int nr = attr->index;
  571. u8 reg;
  572. unsigned long val;
  573. int err;
  574. err = kstrtoul(buf, 10, &val);
  575. if (err)
  576. return err;
  577. mutex_lock(&data->update_lock);
  578. /* Save fan_min */
  579. min = FAN_FROM_REG(data->fan_min[nr],
  580. DIV_FROM_REG(data->fan_div[nr]));
  581. data->fan_div[nr] = DIV_TO_REG(val, data->type);
  582. reg = (w83781d_read_value(data, nr == 2 ?
  583. W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  584. & (nr == 0 ? 0xcf : 0x3f))
  585. | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
  586. w83781d_write_value(data, nr == 2 ?
  587. W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  588. /* w83781d and as99127f don't have extended divisor bits */
  589. if (data->type != w83781d && data->type != as99127f) {
  590. reg = (w83781d_read_value(data, W83781D_REG_VBAT)
  591. & ~(1 << (5 + nr)))
  592. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  593. w83781d_write_value(data, W83781D_REG_VBAT, reg);
  594. }
  595. /* Restore fan_min */
  596. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  597. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
  598. mutex_unlock(&data->update_lock);
  599. return count;
  600. }
  601. static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
  602. show_fan_div, store_fan_div, 0);
  603. static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
  604. show_fan_div, store_fan_div, 1);
  605. static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
  606. show_fan_div, store_fan_div, 2);
  607. static ssize_t
  608. show_pwm(struct device *dev, struct device_attribute *da, char *buf)
  609. {
  610. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  611. struct w83781d_data *data = w83781d_update_device(dev);
  612. return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
  613. }
  614. static ssize_t
  615. show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
  616. {
  617. struct w83781d_data *data = w83781d_update_device(dev);
  618. return sprintf(buf, "%d\n", (int)data->pwm2_enable);
  619. }
  620. static ssize_t
  621. store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
  622. size_t count)
  623. {
  624. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  625. struct w83781d_data *data = dev_get_drvdata(dev);
  626. int nr = attr->index;
  627. unsigned long val;
  628. int err;
  629. err = kstrtoul(buf, 10, &val);
  630. if (err)
  631. return err;
  632. mutex_lock(&data->update_lock);
  633. data->pwm[nr] = clamp_val(val, 0, 255);
  634. w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
  635. mutex_unlock(&data->update_lock);
  636. return count;
  637. }
  638. static ssize_t
  639. store_pwm2_enable(struct device *dev, struct device_attribute *da,
  640. const char *buf, size_t count)
  641. {
  642. struct w83781d_data *data = dev_get_drvdata(dev);
  643. unsigned long val;
  644. u32 reg;
  645. int err;
  646. err = kstrtoul(buf, 10, &val);
  647. if (err)
  648. return err;
  649. mutex_lock(&data->update_lock);
  650. switch (val) {
  651. case 0:
  652. case 1:
  653. reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  654. w83781d_write_value(data, W83781D_REG_PWMCLK12,
  655. (reg & 0xf7) | (val << 3));
  656. reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  657. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
  658. (reg & 0xef) | (!val << 4));
  659. data->pwm2_enable = val;
  660. break;
  661. default:
  662. mutex_unlock(&data->update_lock);
  663. return -EINVAL;
  664. }
  665. mutex_unlock(&data->update_lock);
  666. return count;
  667. }
  668. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
  669. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
  670. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
  671. static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
  672. /* only PWM2 can be enabled/disabled */
  673. static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  674. show_pwm2_enable, store_pwm2_enable);
  675. static ssize_t
  676. show_sensor(struct device *dev, struct device_attribute *da, char *buf)
  677. {
  678. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  679. struct w83781d_data *data = w83781d_update_device(dev);
  680. return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
  681. }
  682. static ssize_t
  683. store_sensor(struct device *dev, struct device_attribute *da,
  684. const char *buf, size_t count)
  685. {
  686. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  687. struct w83781d_data *data = dev_get_drvdata(dev);
  688. int nr = attr->index;
  689. unsigned long val;
  690. u32 tmp;
  691. int err;
  692. err = kstrtoul(buf, 10, &val);
  693. if (err)
  694. return err;
  695. mutex_lock(&data->update_lock);
  696. switch (val) {
  697. case 1: /* PII/Celeron diode */
  698. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  699. w83781d_write_value(data, W83781D_REG_SCFG1,
  700. tmp | BIT_SCFG1[nr]);
  701. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  702. w83781d_write_value(data, W83781D_REG_SCFG2,
  703. tmp | BIT_SCFG2[nr]);
  704. data->sens[nr] = val;
  705. break;
  706. case 2: /* 3904 */
  707. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  708. w83781d_write_value(data, W83781D_REG_SCFG1,
  709. tmp | BIT_SCFG1[nr]);
  710. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  711. w83781d_write_value(data, W83781D_REG_SCFG2,
  712. tmp & ~BIT_SCFG2[nr]);
  713. data->sens[nr] = val;
  714. break;
  715. case W83781D_DEFAULT_BETA:
  716. dev_warn(dev,
  717. "Sensor type %d is deprecated, please use 4 instead\n",
  718. W83781D_DEFAULT_BETA);
  719. /* fall through */
  720. case 4: /* thermistor */
  721. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  722. w83781d_write_value(data, W83781D_REG_SCFG1,
  723. tmp & ~BIT_SCFG1[nr]);
  724. data->sens[nr] = val;
  725. break;
  726. default:
  727. dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
  728. (long) val);
  729. break;
  730. }
  731. mutex_unlock(&data->update_lock);
  732. return count;
  733. }
  734. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
  735. show_sensor, store_sensor, 0);
  736. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
  737. show_sensor, store_sensor, 1);
  738. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
  739. show_sensor, store_sensor, 2);
  740. /*
  741. * Assumes that adapter is of I2C, not ISA variety.
  742. * OTHERWISE DON'T CALL THIS
  743. */
  744. static int
  745. w83781d_detect_subclients(struct i2c_client *new_client)
  746. {
  747. int i, val1 = 0, id;
  748. int err;
  749. int address = new_client->addr;
  750. unsigned short sc_addr[2];
  751. struct i2c_adapter *adapter = new_client->adapter;
  752. struct w83781d_data *data = i2c_get_clientdata(new_client);
  753. enum chips kind = data->type;
  754. int num_sc = 1;
  755. id = i2c_adapter_id(adapter);
  756. if (force_subclients[0] == id && force_subclients[1] == address) {
  757. for (i = 2; i <= 3; i++) {
  758. if (force_subclients[i] < 0x48 ||
  759. force_subclients[i] > 0x4f) {
  760. dev_err(&new_client->dev,
  761. "Invalid subclient address %d; must be 0x48-0x4f\n",
  762. force_subclients[i]);
  763. err = -EINVAL;
  764. goto ERROR_SC_1;
  765. }
  766. }
  767. w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
  768. (force_subclients[2] & 0x07) |
  769. ((force_subclients[3] & 0x07) << 4));
  770. sc_addr[0] = force_subclients[2];
  771. } else {
  772. val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
  773. sc_addr[0] = 0x48 + (val1 & 0x07);
  774. }
  775. if (kind != w83783s) {
  776. num_sc = 2;
  777. if (force_subclients[0] == id &&
  778. force_subclients[1] == address) {
  779. sc_addr[1] = force_subclients[3];
  780. } else {
  781. sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
  782. }
  783. if (sc_addr[0] == sc_addr[1]) {
  784. dev_err(&new_client->dev,
  785. "Duplicate addresses 0x%x for subclients.\n",
  786. sc_addr[0]);
  787. err = -EBUSY;
  788. goto ERROR_SC_2;
  789. }
  790. }
  791. for (i = 0; i < num_sc; i++) {
  792. data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
  793. if (!data->lm75[i]) {
  794. dev_err(&new_client->dev,
  795. "Subclient %d registration at address 0x%x failed.\n",
  796. i, sc_addr[i]);
  797. err = -ENOMEM;
  798. if (i == 1)
  799. goto ERROR_SC_3;
  800. goto ERROR_SC_2;
  801. }
  802. }
  803. return 0;
  804. /* Undo inits in case of errors */
  805. ERROR_SC_3:
  806. i2c_unregister_device(data->lm75[0]);
  807. ERROR_SC_2:
  808. ERROR_SC_1:
  809. return err;
  810. }
  811. #define IN_UNIT_ATTRS(X) \
  812. &sensor_dev_attr_in##X##_input.dev_attr.attr, \
  813. &sensor_dev_attr_in##X##_min.dev_attr.attr, \
  814. &sensor_dev_attr_in##X##_max.dev_attr.attr, \
  815. &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
  816. &sensor_dev_attr_in##X##_beep.dev_attr.attr
  817. #define FAN_UNIT_ATTRS(X) \
  818. &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
  819. &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
  820. &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
  821. &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
  822. &sensor_dev_attr_fan##X##_beep.dev_attr.attr
  823. #define TEMP_UNIT_ATTRS(X) \
  824. &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
  825. &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
  826. &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
  827. &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
  828. &sensor_dev_attr_temp##X##_beep.dev_attr.attr
  829. static struct attribute *w83781d_attributes[] = {
  830. IN_UNIT_ATTRS(0),
  831. IN_UNIT_ATTRS(2),
  832. IN_UNIT_ATTRS(3),
  833. IN_UNIT_ATTRS(4),
  834. IN_UNIT_ATTRS(5),
  835. IN_UNIT_ATTRS(6),
  836. FAN_UNIT_ATTRS(1),
  837. FAN_UNIT_ATTRS(2),
  838. FAN_UNIT_ATTRS(3),
  839. TEMP_UNIT_ATTRS(1),
  840. TEMP_UNIT_ATTRS(2),
  841. &dev_attr_cpu0_vid.attr,
  842. &dev_attr_vrm.attr,
  843. &dev_attr_alarms.attr,
  844. &dev_attr_beep_mask.attr,
  845. &sensor_dev_attr_beep_enable.dev_attr.attr,
  846. NULL
  847. };
  848. static const struct attribute_group w83781d_group = {
  849. .attrs = w83781d_attributes,
  850. };
  851. static struct attribute *w83781d_attributes_in1[] = {
  852. IN_UNIT_ATTRS(1),
  853. NULL
  854. };
  855. static const struct attribute_group w83781d_group_in1 = {
  856. .attrs = w83781d_attributes_in1,
  857. };
  858. static struct attribute *w83781d_attributes_in78[] = {
  859. IN_UNIT_ATTRS(7),
  860. IN_UNIT_ATTRS(8),
  861. NULL
  862. };
  863. static const struct attribute_group w83781d_group_in78 = {
  864. .attrs = w83781d_attributes_in78,
  865. };
  866. static struct attribute *w83781d_attributes_temp3[] = {
  867. TEMP_UNIT_ATTRS(3),
  868. NULL
  869. };
  870. static const struct attribute_group w83781d_group_temp3 = {
  871. .attrs = w83781d_attributes_temp3,
  872. };
  873. static struct attribute *w83781d_attributes_pwm12[] = {
  874. &sensor_dev_attr_pwm1.dev_attr.attr,
  875. &sensor_dev_attr_pwm2.dev_attr.attr,
  876. &dev_attr_pwm2_enable.attr,
  877. NULL
  878. };
  879. static const struct attribute_group w83781d_group_pwm12 = {
  880. .attrs = w83781d_attributes_pwm12,
  881. };
  882. static struct attribute *w83781d_attributes_pwm34[] = {
  883. &sensor_dev_attr_pwm3.dev_attr.attr,
  884. &sensor_dev_attr_pwm4.dev_attr.attr,
  885. NULL
  886. };
  887. static const struct attribute_group w83781d_group_pwm34 = {
  888. .attrs = w83781d_attributes_pwm34,
  889. };
  890. static struct attribute *w83781d_attributes_other[] = {
  891. &sensor_dev_attr_temp1_type.dev_attr.attr,
  892. &sensor_dev_attr_temp2_type.dev_attr.attr,
  893. &sensor_dev_attr_temp3_type.dev_attr.attr,
  894. NULL
  895. };
  896. static const struct attribute_group w83781d_group_other = {
  897. .attrs = w83781d_attributes_other,
  898. };
  899. /* No clean up is done on error, it's up to the caller */
  900. static int
  901. w83781d_create_files(struct device *dev, int kind, int is_isa)
  902. {
  903. int err;
  904. err = sysfs_create_group(&dev->kobj, &w83781d_group);
  905. if (err)
  906. return err;
  907. if (kind != w83783s) {
  908. err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
  909. if (err)
  910. return err;
  911. }
  912. if (kind != as99127f && kind != w83781d && kind != w83783s) {
  913. err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
  914. if (err)
  915. return err;
  916. }
  917. if (kind != w83783s) {
  918. err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
  919. if (err)
  920. return err;
  921. if (kind != w83781d) {
  922. err = sysfs_chmod_file(&dev->kobj,
  923. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  924. S_IRUGO | S_IWUSR);
  925. if (err)
  926. return err;
  927. }
  928. }
  929. if (kind != w83781d && kind != as99127f) {
  930. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
  931. if (err)
  932. return err;
  933. }
  934. if (kind == w83782d && !is_isa) {
  935. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
  936. if (err)
  937. return err;
  938. }
  939. if (kind != as99127f && kind != w83781d) {
  940. err = device_create_file(dev,
  941. &sensor_dev_attr_temp1_type.dev_attr);
  942. if (err)
  943. return err;
  944. err = device_create_file(dev,
  945. &sensor_dev_attr_temp2_type.dev_attr);
  946. if (err)
  947. return err;
  948. if (kind != w83783s) {
  949. err = device_create_file(dev,
  950. &sensor_dev_attr_temp3_type.dev_attr);
  951. if (err)
  952. return err;
  953. }
  954. }
  955. return 0;
  956. }
  957. /* Return 0 if detection is successful, -ENODEV otherwise */
  958. static int
  959. w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
  960. {
  961. int val1, val2;
  962. struct w83781d_data *isa = w83781d_data_if_isa();
  963. struct i2c_adapter *adapter = client->adapter;
  964. int address = client->addr;
  965. const char *client_name;
  966. enum vendor { winbond, asus } vendid;
  967. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  968. return -ENODEV;
  969. /*
  970. * We block updates of the ISA device to minimize the risk of
  971. * concurrent access to the same W83781D chip through different
  972. * interfaces.
  973. */
  974. if (isa)
  975. mutex_lock(&isa->update_lock);
  976. if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
  977. dev_dbg(&adapter->dev,
  978. "Detection of w83781d chip failed at step 3\n");
  979. goto err_nodev;
  980. }
  981. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
  982. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  983. /* Check for Winbond or Asus ID if in bank 0 */
  984. if (!(val1 & 0x07) &&
  985. ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
  986. ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
  987. dev_dbg(&adapter->dev,
  988. "Detection of w83781d chip failed at step 4\n");
  989. goto err_nodev;
  990. }
  991. /*
  992. * If Winbond SMBus, check address at 0x48.
  993. * Asus doesn't support, except for as99127f rev.2
  994. */
  995. if ((!(val1 & 0x80) && val2 == 0xa3) ||
  996. ((val1 & 0x80) && val2 == 0x5c)) {
  997. if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
  998. != address) {
  999. dev_dbg(&adapter->dev,
  1000. "Detection of w83781d chip failed at step 5\n");
  1001. goto err_nodev;
  1002. }
  1003. }
  1004. /* Put it now into bank 0 and Vendor ID High Byte */
  1005. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1006. (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
  1007. & 0x78) | 0x80);
  1008. /* Get the vendor ID */
  1009. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  1010. if (val2 == 0x5c)
  1011. vendid = winbond;
  1012. else if (val2 == 0x12)
  1013. vendid = asus;
  1014. else {
  1015. dev_dbg(&adapter->dev,
  1016. "w83781d chip vendor is neither Winbond nor Asus\n");
  1017. goto err_nodev;
  1018. }
  1019. /* Determine the chip type. */
  1020. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
  1021. if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
  1022. client_name = "w83781d";
  1023. else if (val1 == 0x30 && vendid == winbond)
  1024. client_name = "w83782d";
  1025. else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
  1026. client_name = "w83783s";
  1027. else if (val1 == 0x31)
  1028. client_name = "as99127f";
  1029. else
  1030. goto err_nodev;
  1031. if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
  1032. dev_dbg(&adapter->dev,
  1033. "Device at 0x%02x appears to be the same as ISA device\n",
  1034. address);
  1035. goto err_nodev;
  1036. }
  1037. if (isa)
  1038. mutex_unlock(&isa->update_lock);
  1039. strlcpy(info->type, client_name, I2C_NAME_SIZE);
  1040. return 0;
  1041. err_nodev:
  1042. if (isa)
  1043. mutex_unlock(&isa->update_lock);
  1044. return -ENODEV;
  1045. }
  1046. static void w83781d_remove_files(struct device *dev)
  1047. {
  1048. sysfs_remove_group(&dev->kobj, &w83781d_group);
  1049. sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
  1050. sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
  1051. sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
  1052. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
  1053. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
  1054. sysfs_remove_group(&dev->kobj, &w83781d_group_other);
  1055. }
  1056. static int
  1057. w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
  1058. {
  1059. struct device *dev = &client->dev;
  1060. struct w83781d_data *data;
  1061. int err;
  1062. data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);
  1063. if (!data)
  1064. return -ENOMEM;
  1065. i2c_set_clientdata(client, data);
  1066. mutex_init(&data->lock);
  1067. mutex_init(&data->update_lock);
  1068. data->type = id->driver_data;
  1069. data->client = client;
  1070. /* attach secondary i2c lm75-like clients */
  1071. err = w83781d_detect_subclients(client);
  1072. if (err)
  1073. return err;
  1074. /* Initialize the chip */
  1075. w83781d_init_device(dev);
  1076. /* Register sysfs hooks */
  1077. err = w83781d_create_files(dev, data->type, 0);
  1078. if (err)
  1079. goto exit_remove_files;
  1080. data->hwmon_dev = hwmon_device_register(dev);
  1081. if (IS_ERR(data->hwmon_dev)) {
  1082. err = PTR_ERR(data->hwmon_dev);
  1083. goto exit_remove_files;
  1084. }
  1085. return 0;
  1086. exit_remove_files:
  1087. w83781d_remove_files(dev);
  1088. if (data->lm75[0])
  1089. i2c_unregister_device(data->lm75[0]);
  1090. if (data->lm75[1])
  1091. i2c_unregister_device(data->lm75[1]);
  1092. return err;
  1093. }
  1094. static int
  1095. w83781d_remove(struct i2c_client *client)
  1096. {
  1097. struct w83781d_data *data = i2c_get_clientdata(client);
  1098. struct device *dev = &client->dev;
  1099. hwmon_device_unregister(data->hwmon_dev);
  1100. w83781d_remove_files(dev);
  1101. if (data->lm75[0])
  1102. i2c_unregister_device(data->lm75[0]);
  1103. if (data->lm75[1])
  1104. i2c_unregister_device(data->lm75[1]);
  1105. return 0;
  1106. }
  1107. static int
  1108. w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
  1109. {
  1110. struct i2c_client *client = data->client;
  1111. int res, bank;
  1112. struct i2c_client *cl;
  1113. bank = (reg >> 8) & 0x0f;
  1114. if (bank > 2)
  1115. /* switch banks */
  1116. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1117. bank);
  1118. if (bank == 0 || bank > 2) {
  1119. res = i2c_smbus_read_byte_data(client, reg & 0xff);
  1120. } else {
  1121. /* switch to subclient */
  1122. cl = data->lm75[bank - 1];
  1123. /* convert from ISA to LM75 I2C addresses */
  1124. switch (reg & 0xff) {
  1125. case 0x50: /* TEMP */
  1126. res = i2c_smbus_read_word_swapped(cl, 0);
  1127. break;
  1128. case 0x52: /* CONFIG */
  1129. res = i2c_smbus_read_byte_data(cl, 1);
  1130. break;
  1131. case 0x53: /* HYST */
  1132. res = i2c_smbus_read_word_swapped(cl, 2);
  1133. break;
  1134. case 0x55: /* OVER */
  1135. default:
  1136. res = i2c_smbus_read_word_swapped(cl, 3);
  1137. break;
  1138. }
  1139. }
  1140. if (bank > 2)
  1141. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1142. return res;
  1143. }
  1144. static int
  1145. w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
  1146. {
  1147. struct i2c_client *client = data->client;
  1148. int bank;
  1149. struct i2c_client *cl;
  1150. bank = (reg >> 8) & 0x0f;
  1151. if (bank > 2)
  1152. /* switch banks */
  1153. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1154. bank);
  1155. if (bank == 0 || bank > 2) {
  1156. i2c_smbus_write_byte_data(client, reg & 0xff,
  1157. value & 0xff);
  1158. } else {
  1159. /* switch to subclient */
  1160. cl = data->lm75[bank - 1];
  1161. /* convert from ISA to LM75 I2C addresses */
  1162. switch (reg & 0xff) {
  1163. case 0x52: /* CONFIG */
  1164. i2c_smbus_write_byte_data(cl, 1, value & 0xff);
  1165. break;
  1166. case 0x53: /* HYST */
  1167. i2c_smbus_write_word_swapped(cl, 2, value);
  1168. break;
  1169. case 0x55: /* OVER */
  1170. i2c_smbus_write_word_swapped(cl, 3, value);
  1171. break;
  1172. }
  1173. }
  1174. if (bank > 2)
  1175. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1176. return 0;
  1177. }
  1178. static void
  1179. w83781d_init_device(struct device *dev)
  1180. {
  1181. struct w83781d_data *data = dev_get_drvdata(dev);
  1182. int i, p;
  1183. int type = data->type;
  1184. u8 tmp;
  1185. if (reset && type != as99127f) { /*
  1186. * this resets registers we don't have
  1187. * documentation for on the as99127f
  1188. */
  1189. /*
  1190. * Resetting the chip has been the default for a long time,
  1191. * but it causes the BIOS initializations (fan clock dividers,
  1192. * thermal sensor types...) to be lost, so it is now optional.
  1193. * It might even go away if nobody reports it as being useful,
  1194. * as I see very little reason why this would be needed at
  1195. * all.
  1196. */
  1197. dev_info(dev,
  1198. "If reset=1 solved a problem you were having, please report!\n");
  1199. /* save these registers */
  1200. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1201. p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  1202. /*
  1203. * Reset all except Watchdog values and last conversion values
  1204. * This sets fan-divs to 2, among others
  1205. */
  1206. w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
  1207. /*
  1208. * Restore the registers and disable power-on abnormal beep.
  1209. * This saves FAN 1/2/3 input/output values set by BIOS.
  1210. */
  1211. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1212. w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
  1213. /*
  1214. * Disable master beep-enable (reset turns it on).
  1215. * Individual beep_mask should be reset to off but for some
  1216. * reason disabling this bit helps some people not get beeped
  1217. */
  1218. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
  1219. }
  1220. /*
  1221. * Disable power-on abnormal beep, as advised by the datasheet.
  1222. * Already done if reset=1.
  1223. */
  1224. if (init && !reset && type != as99127f) {
  1225. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1226. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1227. }
  1228. data->vrm = vid_which_vrm();
  1229. if ((type != w83781d) && (type != as99127f)) {
  1230. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  1231. for (i = 1; i <= 3; i++) {
  1232. if (!(tmp & BIT_SCFG1[i - 1])) {
  1233. data->sens[i - 1] = 4;
  1234. } else {
  1235. if (w83781d_read_value
  1236. (data,
  1237. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1238. data->sens[i - 1] = 1;
  1239. else
  1240. data->sens[i - 1] = 2;
  1241. }
  1242. if (type == w83783s && i == 2)
  1243. break;
  1244. }
  1245. }
  1246. if (init && type != as99127f) {
  1247. /* Enable temp2 */
  1248. tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
  1249. if (tmp & 0x01) {
  1250. dev_warn(dev,
  1251. "Enabling temp2, readings might not make sense\n");
  1252. w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
  1253. tmp & 0xfe);
  1254. }
  1255. /* Enable temp3 */
  1256. if (type != w83783s) {
  1257. tmp = w83781d_read_value(data,
  1258. W83781D_REG_TEMP3_CONFIG);
  1259. if (tmp & 0x01) {
  1260. dev_warn(dev,
  1261. "Enabling temp3, readings might not make sense\n");
  1262. w83781d_write_value(data,
  1263. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1264. }
  1265. }
  1266. }
  1267. /* Start monitoring */
  1268. w83781d_write_value(data, W83781D_REG_CONFIG,
  1269. (w83781d_read_value(data,
  1270. W83781D_REG_CONFIG) & 0xf7)
  1271. | 0x01);
  1272. /* A few vars need to be filled upon startup */
  1273. for (i = 0; i < 3; i++) {
  1274. data->fan_min[i] = w83781d_read_value(data,
  1275. W83781D_REG_FAN_MIN(i));
  1276. }
  1277. mutex_init(&data->update_lock);
  1278. }
  1279. static struct w83781d_data *w83781d_update_device(struct device *dev)
  1280. {
  1281. struct w83781d_data *data = dev_get_drvdata(dev);
  1282. struct i2c_client *client = data->client;
  1283. int i;
  1284. mutex_lock(&data->update_lock);
  1285. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1286. || !data->valid) {
  1287. dev_dbg(dev, "Starting device update\n");
  1288. for (i = 0; i <= 8; i++) {
  1289. if (data->type == w83783s && i == 1)
  1290. continue; /* 783S has no in1 */
  1291. data->in[i] =
  1292. w83781d_read_value(data, W83781D_REG_IN(i));
  1293. data->in_min[i] =
  1294. w83781d_read_value(data, W83781D_REG_IN_MIN(i));
  1295. data->in_max[i] =
  1296. w83781d_read_value(data, W83781D_REG_IN_MAX(i));
  1297. if ((data->type != w83782d) && (i == 6))
  1298. break;
  1299. }
  1300. for (i = 0; i < 3; i++) {
  1301. data->fan[i] =
  1302. w83781d_read_value(data, W83781D_REG_FAN(i));
  1303. data->fan_min[i] =
  1304. w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
  1305. }
  1306. if (data->type != w83781d && data->type != as99127f) {
  1307. for (i = 0; i < 4; i++) {
  1308. data->pwm[i] =
  1309. w83781d_read_value(data,
  1310. W83781D_REG_PWM[i]);
  1311. /* Only W83782D on SMBus has PWM3 and PWM4 */
  1312. if ((data->type != w83782d || !client)
  1313. && i == 1)
  1314. break;
  1315. }
  1316. /* Only PWM2 can be disabled */
  1317. data->pwm2_enable = (w83781d_read_value(data,
  1318. W83781D_REG_PWMCLK12) & 0x08) >> 3;
  1319. }
  1320. data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
  1321. data->temp_max =
  1322. w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
  1323. data->temp_max_hyst =
  1324. w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
  1325. data->temp_add[0] =
  1326. w83781d_read_value(data, W83781D_REG_TEMP(2));
  1327. data->temp_max_add[0] =
  1328. w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
  1329. data->temp_max_hyst_add[0] =
  1330. w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
  1331. if (data->type != w83783s) {
  1332. data->temp_add[1] =
  1333. w83781d_read_value(data, W83781D_REG_TEMP(3));
  1334. data->temp_max_add[1] =
  1335. w83781d_read_value(data,
  1336. W83781D_REG_TEMP_OVER(3));
  1337. data->temp_max_hyst_add[1] =
  1338. w83781d_read_value(data,
  1339. W83781D_REG_TEMP_HYST(3));
  1340. }
  1341. i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
  1342. data->vid = i & 0x0f;
  1343. data->vid |= (w83781d_read_value(data,
  1344. W83781D_REG_CHIPID) & 0x01) << 4;
  1345. data->fan_div[0] = (i >> 4) & 0x03;
  1346. data->fan_div[1] = (i >> 6) & 0x03;
  1347. data->fan_div[2] = (w83781d_read_value(data,
  1348. W83781D_REG_PIN) >> 6) & 0x03;
  1349. if ((data->type != w83781d) && (data->type != as99127f)) {
  1350. i = w83781d_read_value(data, W83781D_REG_VBAT);
  1351. data->fan_div[0] |= (i >> 3) & 0x04;
  1352. data->fan_div[1] |= (i >> 4) & 0x04;
  1353. data->fan_div[2] |= (i >> 5) & 0x04;
  1354. }
  1355. if (data->type == w83782d) {
  1356. data->alarms = w83781d_read_value(data,
  1357. W83782D_REG_ALARM1)
  1358. | (w83781d_read_value(data,
  1359. W83782D_REG_ALARM2) << 8)
  1360. | (w83781d_read_value(data,
  1361. W83782D_REG_ALARM3) << 16);
  1362. } else if (data->type == w83783s) {
  1363. data->alarms = w83781d_read_value(data,
  1364. W83782D_REG_ALARM1)
  1365. | (w83781d_read_value(data,
  1366. W83782D_REG_ALARM2) << 8);
  1367. } else {
  1368. /*
  1369. * No real-time status registers, fall back to
  1370. * interrupt status registers
  1371. */
  1372. data->alarms = w83781d_read_value(data,
  1373. W83781D_REG_ALARM1)
  1374. | (w83781d_read_value(data,
  1375. W83781D_REG_ALARM2) << 8);
  1376. }
  1377. i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  1378. data->beep_mask = (i << 8) +
  1379. w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  1380. if ((data->type != w83781d) && (data->type != as99127f)) {
  1381. data->beep_mask |=
  1382. w83781d_read_value(data,
  1383. W83781D_REG_BEEP_INTS3) << 16;
  1384. }
  1385. data->last_updated = jiffies;
  1386. data->valid = 1;
  1387. }
  1388. mutex_unlock(&data->update_lock);
  1389. return data;
  1390. }
  1391. static const struct i2c_device_id w83781d_ids[] = {
  1392. { "w83781d", w83781d, },
  1393. { "w83782d", w83782d, },
  1394. { "w83783s", w83783s, },
  1395. { "as99127f", as99127f },
  1396. { /* LIST END */ }
  1397. };
  1398. MODULE_DEVICE_TABLE(i2c, w83781d_ids);
  1399. static struct i2c_driver w83781d_driver = {
  1400. .class = I2C_CLASS_HWMON,
  1401. .driver = {
  1402. .name = "w83781d",
  1403. },
  1404. .probe = w83781d_probe,
  1405. .remove = w83781d_remove,
  1406. .id_table = w83781d_ids,
  1407. .detect = w83781d_detect,
  1408. .address_list = normal_i2c,
  1409. };
  1410. /*
  1411. * ISA related code
  1412. */
  1413. #ifdef CONFIG_ISA
  1414. /* ISA device, if found */
  1415. static struct platform_device *pdev;
  1416. static unsigned short isa_address = 0x290;
  1417. /*
  1418. * I2C devices get this name attribute automatically, but for ISA devices
  1419. * we must create it by ourselves.
  1420. */
  1421. static ssize_t
  1422. show_name(struct device *dev, struct device_attribute *devattr, char *buf)
  1423. {
  1424. struct w83781d_data *data = dev_get_drvdata(dev);
  1425. return sprintf(buf, "%s\n", data->name);
  1426. }
  1427. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1428. static struct w83781d_data *w83781d_data_if_isa(void)
  1429. {
  1430. return pdev ? platform_get_drvdata(pdev) : NULL;
  1431. }
  1432. /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
  1433. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1434. {
  1435. struct w83781d_data *isa;
  1436. int i;
  1437. if (!pdev) /* No ISA chip */
  1438. return 0;
  1439. isa = platform_get_drvdata(pdev);
  1440. if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
  1441. return 0; /* Address doesn't match */
  1442. if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
  1443. return 0; /* Chip type doesn't match */
  1444. /*
  1445. * We compare all the limit registers, the config register and the
  1446. * interrupt mask registers
  1447. */
  1448. for (i = 0x2b; i <= 0x3d; i++) {
  1449. if (w83781d_read_value(isa, i) !=
  1450. i2c_smbus_read_byte_data(client, i))
  1451. return 0;
  1452. }
  1453. if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
  1454. i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
  1455. return 0;
  1456. for (i = 0x43; i <= 0x46; i++) {
  1457. if (w83781d_read_value(isa, i) !=
  1458. i2c_smbus_read_byte_data(client, i))
  1459. return 0;
  1460. }
  1461. return 1;
  1462. }
  1463. static int
  1464. w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
  1465. {
  1466. int word_sized, res;
  1467. word_sized = (((reg & 0xff00) == 0x100)
  1468. || ((reg & 0xff00) == 0x200))
  1469. && (((reg & 0x00ff) == 0x50)
  1470. || ((reg & 0x00ff) == 0x53)
  1471. || ((reg & 0x00ff) == 0x55));
  1472. if (reg & 0xff00) {
  1473. outb_p(W83781D_REG_BANK,
  1474. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1475. outb_p(reg >> 8,
  1476. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1477. }
  1478. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1479. res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
  1480. if (word_sized) {
  1481. outb_p((reg & 0xff) + 1,
  1482. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1483. res =
  1484. (res << 8) + inb_p(data->isa_addr +
  1485. W83781D_DATA_REG_OFFSET);
  1486. }
  1487. if (reg & 0xff00) {
  1488. outb_p(W83781D_REG_BANK,
  1489. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1490. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1491. }
  1492. return res;
  1493. }
  1494. static void
  1495. w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
  1496. {
  1497. int word_sized;
  1498. word_sized = (((reg & 0xff00) == 0x100)
  1499. || ((reg & 0xff00) == 0x200))
  1500. && (((reg & 0x00ff) == 0x53)
  1501. || ((reg & 0x00ff) == 0x55));
  1502. if (reg & 0xff00) {
  1503. outb_p(W83781D_REG_BANK,
  1504. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1505. outb_p(reg >> 8,
  1506. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1507. }
  1508. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1509. if (word_sized) {
  1510. outb_p(value >> 8,
  1511. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1512. outb_p((reg & 0xff) + 1,
  1513. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1514. }
  1515. outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1516. if (reg & 0xff00) {
  1517. outb_p(W83781D_REG_BANK,
  1518. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1519. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1520. }
  1521. }
  1522. /*
  1523. * The SMBus locks itself, usually, but nothing may access the Winbond between
  1524. * bank switches. ISA access must always be locked explicitly!
  1525. * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  1526. * would slow down the W83781D access and should not be necessary.
  1527. * There are some ugly typecasts here, but the good news is - they should
  1528. * nowhere else be necessary!
  1529. */
  1530. static int
  1531. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1532. {
  1533. struct i2c_client *client = data->client;
  1534. int res;
  1535. mutex_lock(&data->lock);
  1536. if (client)
  1537. res = w83781d_read_value_i2c(data, reg);
  1538. else
  1539. res = w83781d_read_value_isa(data, reg);
  1540. mutex_unlock(&data->lock);
  1541. return res;
  1542. }
  1543. static int
  1544. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1545. {
  1546. struct i2c_client *client = data->client;
  1547. mutex_lock(&data->lock);
  1548. if (client)
  1549. w83781d_write_value_i2c(data, reg, value);
  1550. else
  1551. w83781d_write_value_isa(data, reg, value);
  1552. mutex_unlock(&data->lock);
  1553. return 0;
  1554. }
  1555. static int
  1556. w83781d_isa_probe(struct platform_device *pdev)
  1557. {
  1558. int err, reg;
  1559. struct w83781d_data *data;
  1560. struct resource *res;
  1561. /* Reserve the ISA region */
  1562. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1563. if (!devm_request_region(&pdev->dev,
  1564. res->start + W83781D_ADDR_REG_OFFSET, 2,
  1565. "w83781d"))
  1566. return -EBUSY;
  1567. data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
  1568. GFP_KERNEL);
  1569. if (!data)
  1570. return -ENOMEM;
  1571. mutex_init(&data->lock);
  1572. data->isa_addr = res->start;
  1573. platform_set_drvdata(pdev, data);
  1574. reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
  1575. switch (reg) {
  1576. case 0x30:
  1577. data->type = w83782d;
  1578. data->name = "w83782d";
  1579. break;
  1580. default:
  1581. data->type = w83781d;
  1582. data->name = "w83781d";
  1583. }
  1584. /* Initialize the W83781D chip */
  1585. w83781d_init_device(&pdev->dev);
  1586. /* Register sysfs hooks */
  1587. err = w83781d_create_files(&pdev->dev, data->type, 1);
  1588. if (err)
  1589. goto exit_remove_files;
  1590. err = device_create_file(&pdev->dev, &dev_attr_name);
  1591. if (err)
  1592. goto exit_remove_files;
  1593. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1594. if (IS_ERR(data->hwmon_dev)) {
  1595. err = PTR_ERR(data->hwmon_dev);
  1596. goto exit_remove_files;
  1597. }
  1598. return 0;
  1599. exit_remove_files:
  1600. w83781d_remove_files(&pdev->dev);
  1601. device_remove_file(&pdev->dev, &dev_attr_name);
  1602. return err;
  1603. }
  1604. static int
  1605. w83781d_isa_remove(struct platform_device *pdev)
  1606. {
  1607. struct w83781d_data *data = platform_get_drvdata(pdev);
  1608. hwmon_device_unregister(data->hwmon_dev);
  1609. w83781d_remove_files(&pdev->dev);
  1610. device_remove_file(&pdev->dev, &dev_attr_name);
  1611. return 0;
  1612. }
  1613. static struct platform_driver w83781d_isa_driver = {
  1614. .driver = {
  1615. .name = "w83781d",
  1616. },
  1617. .probe = w83781d_isa_probe,
  1618. .remove = w83781d_isa_remove,
  1619. };
  1620. /* return 1 if a supported chip is found, 0 otherwise */
  1621. static int __init
  1622. w83781d_isa_found(unsigned short address)
  1623. {
  1624. int val, save, found = 0;
  1625. int port;
  1626. /*
  1627. * Some boards declare base+0 to base+7 as a PNP device, some base+4
  1628. * to base+7 and some base+5 to base+6. So we better request each port
  1629. * individually for the probing phase.
  1630. */
  1631. for (port = address; port < address + W83781D_EXTENT; port++) {
  1632. if (!request_region(port, 1, "w83781d")) {
  1633. pr_debug("Failed to request port 0x%x\n", port);
  1634. goto release;
  1635. }
  1636. }
  1637. #define REALLY_SLOW_IO
  1638. /*
  1639. * We need the timeouts for at least some W83781D-like
  1640. * chips. But only if we read 'undefined' registers.
  1641. */
  1642. val = inb_p(address + 1);
  1643. if (inb_p(address + 2) != val
  1644. || inb_p(address + 3) != val
  1645. || inb_p(address + 7) != val) {
  1646. pr_debug("Detection failed at step %d\n", 1);
  1647. goto release;
  1648. }
  1649. #undef REALLY_SLOW_IO
  1650. /*
  1651. * We should be able to change the 7 LSB of the address port. The
  1652. * MSB (busy flag) should be clear initially, set after the write.
  1653. */
  1654. save = inb_p(address + W83781D_ADDR_REG_OFFSET);
  1655. if (save & 0x80) {
  1656. pr_debug("Detection failed at step %d\n", 2);
  1657. goto release;
  1658. }
  1659. val = ~save & 0x7f;
  1660. outb_p(val, address + W83781D_ADDR_REG_OFFSET);
  1661. if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
  1662. outb_p(save, address + W83781D_ADDR_REG_OFFSET);
  1663. pr_debug("Detection failed at step %d\n", 3);
  1664. goto release;
  1665. }
  1666. /* We found a device, now see if it could be a W83781D */
  1667. outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
  1668. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1669. if (val & 0x80) {
  1670. pr_debug("Detection failed at step %d\n", 4);
  1671. goto release;
  1672. }
  1673. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1674. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1675. outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
  1676. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1677. if ((!(save & 0x80) && (val != 0xa3))
  1678. || ((save & 0x80) && (val != 0x5c))) {
  1679. pr_debug("Detection failed at step %d\n", 5);
  1680. goto release;
  1681. }
  1682. outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
  1683. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1684. if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
  1685. pr_debug("Detection failed at step %d\n", 6);
  1686. goto release;
  1687. }
  1688. /* The busy flag should be clear again */
  1689. if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
  1690. pr_debug("Detection failed at step %d\n", 7);
  1691. goto release;
  1692. }
  1693. /* Determine the chip type */
  1694. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1695. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1696. outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
  1697. outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
  1698. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1699. if ((val & 0xfe) == 0x10 /* W83781D */
  1700. || val == 0x30) /* W83782D */
  1701. found = 1;
  1702. if (found)
  1703. pr_info("Found a %s chip at %#x\n",
  1704. val == 0x30 ? "W83782D" : "W83781D", (int)address);
  1705. release:
  1706. for (port--; port >= address; port--)
  1707. release_region(port, 1);
  1708. return found;
  1709. }
  1710. static int __init
  1711. w83781d_isa_device_add(unsigned short address)
  1712. {
  1713. struct resource res = {
  1714. .start = address,
  1715. .end = address + W83781D_EXTENT - 1,
  1716. .name = "w83781d",
  1717. .flags = IORESOURCE_IO,
  1718. };
  1719. int err;
  1720. pdev = platform_device_alloc("w83781d", address);
  1721. if (!pdev) {
  1722. err = -ENOMEM;
  1723. pr_err("Device allocation failed\n");
  1724. goto exit;
  1725. }
  1726. err = platform_device_add_resources(pdev, &res, 1);
  1727. if (err) {
  1728. pr_err("Device resource addition failed (%d)\n", err);
  1729. goto exit_device_put;
  1730. }
  1731. err = platform_device_add(pdev);
  1732. if (err) {
  1733. pr_err("Device addition failed (%d)\n", err);
  1734. goto exit_device_put;
  1735. }
  1736. return 0;
  1737. exit_device_put:
  1738. platform_device_put(pdev);
  1739. exit:
  1740. pdev = NULL;
  1741. return err;
  1742. }
  1743. static int __init
  1744. w83781d_isa_register(void)
  1745. {
  1746. int res;
  1747. if (w83781d_isa_found(isa_address)) {
  1748. res = platform_driver_register(&w83781d_isa_driver);
  1749. if (res)
  1750. goto exit;
  1751. /* Sets global pdev as a side effect */
  1752. res = w83781d_isa_device_add(isa_address);
  1753. if (res)
  1754. goto exit_unreg_isa_driver;
  1755. }
  1756. return 0;
  1757. exit_unreg_isa_driver:
  1758. platform_driver_unregister(&w83781d_isa_driver);
  1759. exit:
  1760. return res;
  1761. }
  1762. static void
  1763. w83781d_isa_unregister(void)
  1764. {
  1765. if (pdev) {
  1766. platform_device_unregister(pdev);
  1767. platform_driver_unregister(&w83781d_isa_driver);
  1768. }
  1769. }
  1770. #else /* !CONFIG_ISA */
  1771. static struct w83781d_data *w83781d_data_if_isa(void)
  1772. {
  1773. return NULL;
  1774. }
  1775. static int
  1776. w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1777. {
  1778. return 0;
  1779. }
  1780. static int
  1781. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1782. {
  1783. int res;
  1784. mutex_lock(&data->lock);
  1785. res = w83781d_read_value_i2c(data, reg);
  1786. mutex_unlock(&data->lock);
  1787. return res;
  1788. }
  1789. static int
  1790. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1791. {
  1792. mutex_lock(&data->lock);
  1793. w83781d_write_value_i2c(data, reg, value);
  1794. mutex_unlock(&data->lock);
  1795. return 0;
  1796. }
  1797. static int __init
  1798. w83781d_isa_register(void)
  1799. {
  1800. return 0;
  1801. }
  1802. static void
  1803. w83781d_isa_unregister(void)
  1804. {
  1805. }
  1806. #endif /* CONFIG_ISA */
  1807. static int __init
  1808. sensors_w83781d_init(void)
  1809. {
  1810. int res;
  1811. /*
  1812. * We register the ISA device first, so that we can skip the
  1813. * registration of an I2C interface to the same device.
  1814. */
  1815. res = w83781d_isa_register();
  1816. if (res)
  1817. goto exit;
  1818. res = i2c_add_driver(&w83781d_driver);
  1819. if (res)
  1820. goto exit_unreg_isa;
  1821. return 0;
  1822. exit_unreg_isa:
  1823. w83781d_isa_unregister();
  1824. exit:
  1825. return res;
  1826. }
  1827. static void __exit
  1828. sensors_w83781d_exit(void)
  1829. {
  1830. w83781d_isa_unregister();
  1831. i2c_del_driver(&w83781d_driver);
  1832. }
  1833. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1834. "Philip Edelbrock <phil@netroedge.com>, "
  1835. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1836. MODULE_DESCRIPTION("W83781D driver");
  1837. MODULE_LICENSE("GPL");
  1838. module_init(sensors_w83781d_init);
  1839. module_exit(sensors_w83781d_exit);