fam15h_power.c 6.8 KB

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  1. /*
  2. * fam15h_power.c - AMD Family 15h processor power monitoring
  3. *
  4. * Copyright (c) 2011 Advanced Micro Devices, Inc.
  5. * Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
  6. *
  7. *
  8. * This driver is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License; either
  10. * version 2 of the License, or (at your option) any later version.
  11. *
  12. * This driver is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  15. * See the GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include <linux/err.h>
  21. #include <linux/hwmon.h>
  22. #include <linux/hwmon-sysfs.h>
  23. #include <linux/init.h>
  24. #include <linux/module.h>
  25. #include <linux/pci.h>
  26. #include <linux/bitops.h>
  27. #include <asm/processor.h>
  28. MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
  29. MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
  30. MODULE_LICENSE("GPL");
  31. /* D18F3 */
  32. #define REG_NORTHBRIDGE_CAP 0xe8
  33. /* D18F4 */
  34. #define REG_PROCESSOR_TDP 0x1b8
  35. /* D18F5 */
  36. #define REG_TDP_RUNNING_AVERAGE 0xe0
  37. #define REG_TDP_LIMIT3 0xe8
  38. struct fam15h_power_data {
  39. struct pci_dev *pdev;
  40. unsigned int tdp_to_watts;
  41. unsigned int base_tdp;
  42. unsigned int processor_pwr_watts;
  43. };
  44. static ssize_t show_power(struct device *dev,
  45. struct device_attribute *attr, char *buf)
  46. {
  47. u32 val, tdp_limit, running_avg_range;
  48. s32 running_avg_capture;
  49. u64 curr_pwr_watts;
  50. struct fam15h_power_data *data = dev_get_drvdata(dev);
  51. struct pci_dev *f4 = data->pdev;
  52. pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
  53. REG_TDP_RUNNING_AVERAGE, &val);
  54. running_avg_capture = (val >> 4) & 0x3fffff;
  55. running_avg_capture = sign_extend32(running_avg_capture, 21);
  56. running_avg_range = (val & 0xf) + 1;
  57. pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
  58. REG_TDP_LIMIT3, &val);
  59. tdp_limit = val >> 16;
  60. curr_pwr_watts = ((u64)(tdp_limit +
  61. data->base_tdp)) << running_avg_range;
  62. curr_pwr_watts -= running_avg_capture;
  63. curr_pwr_watts *= data->tdp_to_watts;
  64. /*
  65. * Convert to microWatt
  66. *
  67. * power is in Watt provided as fixed point integer with
  68. * scaling factor 1/(2^16). For conversion we use
  69. * (10^6)/(2^16) = 15625/(2^10)
  70. */
  71. curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
  72. return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
  73. }
  74. static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);
  75. static ssize_t show_power_crit(struct device *dev,
  76. struct device_attribute *attr, char *buf)
  77. {
  78. struct fam15h_power_data *data = dev_get_drvdata(dev);
  79. return sprintf(buf, "%u\n", data->processor_pwr_watts);
  80. }
  81. static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);
  82. static umode_t fam15h_power_is_visible(struct kobject *kobj,
  83. struct attribute *attr,
  84. int index)
  85. {
  86. /* power1_input is only reported for Fam15h, Models 00h-0fh */
  87. if (attr == &dev_attr_power1_input.attr &&
  88. (boot_cpu_data.x86 != 0x15 || boot_cpu_data.x86_model > 0xf))
  89. return 0;
  90. return attr->mode;
  91. }
  92. static struct attribute *fam15h_power_attrs[] = {
  93. &dev_attr_power1_input.attr,
  94. &dev_attr_power1_crit.attr,
  95. NULL
  96. };
  97. static const struct attribute_group fam15h_power_group = {
  98. .attrs = fam15h_power_attrs,
  99. .is_visible = fam15h_power_is_visible,
  100. };
  101. __ATTRIBUTE_GROUPS(fam15h_power);
  102. static bool fam15h_power_is_internal_node0(struct pci_dev *f4)
  103. {
  104. u32 val;
  105. pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
  106. REG_NORTHBRIDGE_CAP, &val);
  107. if ((val & BIT(29)) && ((val >> 30) & 3))
  108. return false;
  109. return true;
  110. }
  111. /*
  112. * Newer BKDG versions have an updated recommendation on how to properly
  113. * initialize the running average range (was: 0xE, now: 0x9). This avoids
  114. * counter saturations resulting in bogus power readings.
  115. * We correct this value ourselves to cope with older BIOSes.
  116. */
  117. static const struct pci_device_id affected_device[] = {
  118. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
  119. { 0 }
  120. };
  121. static void tweak_runavg_range(struct pci_dev *pdev)
  122. {
  123. u32 val;
  124. /*
  125. * let this quirk apply only to the current version of the
  126. * northbridge, since future versions may change the behavior
  127. */
  128. if (!pci_match_id(affected_device, pdev))
  129. return;
  130. pci_bus_read_config_dword(pdev->bus,
  131. PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
  132. REG_TDP_RUNNING_AVERAGE, &val);
  133. if ((val & 0xf) != 0xe)
  134. return;
  135. val &= ~0xf;
  136. val |= 0x9;
  137. pci_bus_write_config_dword(pdev->bus,
  138. PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
  139. REG_TDP_RUNNING_AVERAGE, val);
  140. }
  141. #ifdef CONFIG_PM
  142. static int fam15h_power_resume(struct pci_dev *pdev)
  143. {
  144. tweak_runavg_range(pdev);
  145. return 0;
  146. }
  147. #else
  148. #define fam15h_power_resume NULL
  149. #endif
  150. static void fam15h_power_init_data(struct pci_dev *f4,
  151. struct fam15h_power_data *data)
  152. {
  153. u32 val;
  154. u64 tmp;
  155. pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
  156. data->base_tdp = val >> 16;
  157. tmp = val & 0xffff;
  158. pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
  159. REG_TDP_LIMIT3, &val);
  160. data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
  161. tmp *= data->tdp_to_watts;
  162. /* result not allowed to be >= 256W */
  163. if ((tmp >> 16) >= 256)
  164. dev_warn(&f4->dev,
  165. "Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
  166. (unsigned int) (tmp >> 16));
  167. /* convert to microWatt */
  168. data->processor_pwr_watts = (tmp * 15625) >> 10;
  169. }
  170. static int fam15h_power_probe(struct pci_dev *pdev,
  171. const struct pci_device_id *id)
  172. {
  173. struct fam15h_power_data *data;
  174. struct device *dev = &pdev->dev;
  175. struct device *hwmon_dev;
  176. /*
  177. * though we ignore every other northbridge, we still have to
  178. * do the tweaking on _each_ node in MCM processors as the counters
  179. * are working hand-in-hand
  180. */
  181. tweak_runavg_range(pdev);
  182. if (!fam15h_power_is_internal_node0(pdev))
  183. return -ENODEV;
  184. data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
  185. if (!data)
  186. return -ENOMEM;
  187. fam15h_power_init_data(pdev, data);
  188. data->pdev = pdev;
  189. hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
  190. data,
  191. fam15h_power_groups);
  192. return PTR_ERR_OR_ZERO(hwmon_dev);
  193. }
  194. static const struct pci_device_id fam15h_power_id_table[] = {
  195. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
  196. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
  197. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
  198. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
  199. {}
  200. };
  201. MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
  202. static struct pci_driver fam15h_power_driver = {
  203. .name = "fam15h_power",
  204. .id_table = fam15h_power_id_table,
  205. .probe = fam15h_power_probe,
  206. .resume = fam15h_power_resume,
  207. };
  208. module_pci_driver(fam15h_power_driver);