drm_dp_helper.c 18 KB

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  1. /*
  2. * Copyright © 2009 Keith Packard
  3. *
  4. * Permission to use, copy, modify, distribute, and sell this software and its
  5. * documentation for any purpose is hereby granted without fee, provided that
  6. * the above copyright notice appear in all copies and that both that copyright
  7. * notice and this permission notice appear in supporting documentation, and
  8. * that the name of the copyright holders not be used in advertising or
  9. * publicity pertaining to distribution of the software without specific,
  10. * written prior permission. The copyright holders make no representations
  11. * about the suitability of this software for any purpose. It is provided "as
  12. * is" without express or implied warranty.
  13. *
  14. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  15. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  16. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  17. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  18. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  19. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  20. * OF THIS SOFTWARE.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/delay.h>
  25. #include <linux/init.h>
  26. #include <linux/errno.h>
  27. #include <linux/sched.h>
  28. #include <linux/i2c.h>
  29. #include <drm/drm_dp_helper.h>
  30. #include <drm/drmP.h>
  31. /**
  32. * DOC: dp helpers
  33. *
  34. * These functions contain some common logic and helpers at various abstraction
  35. * levels to deal with Display Port sink devices and related things like DP aux
  36. * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
  37. * blocks, ...
  38. */
  39. /* Helpers for DP link training */
  40. static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
  41. {
  42. return link_status[r - DP_LANE0_1_STATUS];
  43. }
  44. static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
  45. int lane)
  46. {
  47. int i = DP_LANE0_1_STATUS + (lane >> 1);
  48. int s = (lane & 1) * 4;
  49. u8 l = dp_link_status(link_status, i);
  50. return (l >> s) & 0xf;
  51. }
  52. bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  53. int lane_count)
  54. {
  55. u8 lane_align;
  56. u8 lane_status;
  57. int lane;
  58. lane_align = dp_link_status(link_status,
  59. DP_LANE_ALIGN_STATUS_UPDATED);
  60. if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
  61. return false;
  62. for (lane = 0; lane < lane_count; lane++) {
  63. lane_status = dp_get_lane_status(link_status, lane);
  64. if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
  65. return false;
  66. }
  67. return true;
  68. }
  69. EXPORT_SYMBOL(drm_dp_channel_eq_ok);
  70. bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  71. int lane_count)
  72. {
  73. int lane;
  74. u8 lane_status;
  75. for (lane = 0; lane < lane_count; lane++) {
  76. lane_status = dp_get_lane_status(link_status, lane);
  77. if ((lane_status & DP_LANE_CR_DONE) == 0)
  78. return false;
  79. }
  80. return true;
  81. }
  82. EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
  83. u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
  84. int lane)
  85. {
  86. int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
  87. int s = ((lane & 1) ?
  88. DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
  89. DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
  90. u8 l = dp_link_status(link_status, i);
  91. return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
  92. }
  93. EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
  94. u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
  95. int lane)
  96. {
  97. int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
  98. int s = ((lane & 1) ?
  99. DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
  100. DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
  101. u8 l = dp_link_status(link_status, i);
  102. return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
  103. }
  104. EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
  105. void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
  106. if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
  107. udelay(100);
  108. else
  109. mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
  110. }
  111. EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
  112. void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
  113. if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
  114. udelay(400);
  115. else
  116. mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
  117. }
  118. EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
  119. u8 drm_dp_link_rate_to_bw_code(int link_rate)
  120. {
  121. switch (link_rate) {
  122. case 162000:
  123. default:
  124. return DP_LINK_BW_1_62;
  125. case 270000:
  126. return DP_LINK_BW_2_7;
  127. case 540000:
  128. return DP_LINK_BW_5_4;
  129. }
  130. }
  131. EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
  132. int drm_dp_bw_code_to_link_rate(u8 link_bw)
  133. {
  134. switch (link_bw) {
  135. case DP_LINK_BW_1_62:
  136. default:
  137. return 162000;
  138. case DP_LINK_BW_2_7:
  139. return 270000;
  140. case DP_LINK_BW_5_4:
  141. return 540000;
  142. }
  143. }
  144. EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
  145. /**
  146. * DOC: dp helpers
  147. *
  148. * The DisplayPort AUX channel is an abstraction to allow generic, driver-
  149. * independent access to AUX functionality. Drivers can take advantage of
  150. * this by filling in the fields of the drm_dp_aux structure.
  151. *
  152. * Transactions are described using a hardware-independent drm_dp_aux_msg
  153. * structure, which is passed into a driver's .transfer() implementation.
  154. * Both native and I2C-over-AUX transactions are supported.
  155. */
  156. static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
  157. unsigned int offset, void *buffer, size_t size)
  158. {
  159. struct drm_dp_aux_msg msg;
  160. unsigned int retry;
  161. int err;
  162. memset(&msg, 0, sizeof(msg));
  163. msg.address = offset;
  164. msg.request = request;
  165. msg.buffer = buffer;
  166. msg.size = size;
  167. /*
  168. * The specification doesn't give any recommendation on how often to
  169. * retry native transactions. We used to retry 7 times like for
  170. * aux i2c transactions but real world devices this wasn't
  171. * sufficient, bump to 32 which makes Dell 4k monitors happier.
  172. */
  173. for (retry = 0; retry < 32; retry++) {
  174. mutex_lock(&aux->hw_mutex);
  175. err = aux->transfer(aux, &msg);
  176. mutex_unlock(&aux->hw_mutex);
  177. if (err < 0) {
  178. if (err == -EBUSY)
  179. continue;
  180. return err;
  181. }
  182. switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) {
  183. case DP_AUX_NATIVE_REPLY_ACK:
  184. if (err < size)
  185. return -EPROTO;
  186. return err;
  187. case DP_AUX_NATIVE_REPLY_NACK:
  188. return -EIO;
  189. case DP_AUX_NATIVE_REPLY_DEFER:
  190. usleep_range(400, 500);
  191. break;
  192. }
  193. }
  194. DRM_DEBUG_KMS("too many retries, giving up\n");
  195. return -EIO;
  196. }
  197. /**
  198. * drm_dp_dpcd_read() - read a series of bytes from the DPCD
  199. * @aux: DisplayPort AUX channel
  200. * @offset: address of the (first) register to read
  201. * @buffer: buffer to store the register values
  202. * @size: number of bytes in @buffer
  203. *
  204. * Returns the number of bytes transferred on success, or a negative error
  205. * code on failure. -EIO is returned if the request was NAKed by the sink or
  206. * if the retry count was exceeded. If not all bytes were transferred, this
  207. * function returns -EPROTO. Errors from the underlying AUX channel transfer
  208. * function, with the exception of -EBUSY (which causes the transaction to
  209. * be retried), are propagated to the caller.
  210. */
  211. ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
  212. void *buffer, size_t size)
  213. {
  214. return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
  215. size);
  216. }
  217. EXPORT_SYMBOL(drm_dp_dpcd_read);
  218. /**
  219. * drm_dp_dpcd_write() - write a series of bytes to the DPCD
  220. * @aux: DisplayPort AUX channel
  221. * @offset: address of the (first) register to write
  222. * @buffer: buffer containing the values to write
  223. * @size: number of bytes in @buffer
  224. *
  225. * Returns the number of bytes transferred on success, or a negative error
  226. * code on failure. -EIO is returned if the request was NAKed by the sink or
  227. * if the retry count was exceeded. If not all bytes were transferred, this
  228. * function returns -EPROTO. Errors from the underlying AUX channel transfer
  229. * function, with the exception of -EBUSY (which causes the transaction to
  230. * be retried), are propagated to the caller.
  231. */
  232. ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
  233. void *buffer, size_t size)
  234. {
  235. return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
  236. size);
  237. }
  238. EXPORT_SYMBOL(drm_dp_dpcd_write);
  239. /**
  240. * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
  241. * @aux: DisplayPort AUX channel
  242. * @status: buffer to store the link status in (must be at least 6 bytes)
  243. *
  244. * Returns the number of bytes transferred on success or a negative error
  245. * code on failure.
  246. */
  247. int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
  248. u8 status[DP_LINK_STATUS_SIZE])
  249. {
  250. return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
  251. DP_LINK_STATUS_SIZE);
  252. }
  253. EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
  254. /**
  255. * drm_dp_link_probe() - probe a DisplayPort link for capabilities
  256. * @aux: DisplayPort AUX channel
  257. * @link: pointer to structure in which to return link capabilities
  258. *
  259. * The structure filled in by this function can usually be passed directly
  260. * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
  261. * configure the link based on the link's capabilities.
  262. *
  263. * Returns 0 on success or a negative error code on failure.
  264. */
  265. int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
  266. {
  267. u8 values[3];
  268. int err;
  269. memset(link, 0, sizeof(*link));
  270. err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
  271. if (err < 0)
  272. return err;
  273. link->revision = values[0];
  274. link->rate = drm_dp_bw_code_to_link_rate(values[1]);
  275. link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
  276. if (values[2] & DP_ENHANCED_FRAME_CAP)
  277. link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
  278. return 0;
  279. }
  280. EXPORT_SYMBOL(drm_dp_link_probe);
  281. /**
  282. * drm_dp_link_power_up() - power up a DisplayPort link
  283. * @aux: DisplayPort AUX channel
  284. * @link: pointer to a structure containing the link configuration
  285. *
  286. * Returns 0 on success or a negative error code on failure.
  287. */
  288. int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
  289. {
  290. u8 value;
  291. int err;
  292. /* DP_SET_POWER register is only available on DPCD v1.1 and later */
  293. if (link->revision < 0x11)
  294. return 0;
  295. err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
  296. if (err < 0)
  297. return err;
  298. value &= ~DP_SET_POWER_MASK;
  299. value |= DP_SET_POWER_D0;
  300. err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
  301. if (err < 0)
  302. return err;
  303. /*
  304. * According to the DP 1.1 specification, a "Sink Device must exit the
  305. * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
  306. * Control Field" (register 0x600).
  307. */
  308. usleep_range(1000, 2000);
  309. return 0;
  310. }
  311. EXPORT_SYMBOL(drm_dp_link_power_up);
  312. /**
  313. * drm_dp_link_power_down() - power down a DisplayPort link
  314. * @aux: DisplayPort AUX channel
  315. * @link: pointer to a structure containing the link configuration
  316. *
  317. * Returns 0 on success or a negative error code on failure.
  318. */
  319. int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
  320. {
  321. u8 value;
  322. int err;
  323. /* DP_SET_POWER register is only available on DPCD v1.1 and later */
  324. if (link->revision < 0x11)
  325. return 0;
  326. err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
  327. if (err < 0)
  328. return err;
  329. value &= ~DP_SET_POWER_MASK;
  330. value |= DP_SET_POWER_D3;
  331. err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
  332. if (err < 0)
  333. return err;
  334. return 0;
  335. }
  336. EXPORT_SYMBOL(drm_dp_link_power_down);
  337. /**
  338. * drm_dp_link_configure() - configure a DisplayPort link
  339. * @aux: DisplayPort AUX channel
  340. * @link: pointer to a structure containing the link configuration
  341. *
  342. * Returns 0 on success or a negative error code on failure.
  343. */
  344. int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
  345. {
  346. u8 values[2];
  347. int err;
  348. values[0] = drm_dp_link_rate_to_bw_code(link->rate);
  349. values[1] = link->num_lanes;
  350. if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
  351. values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
  352. err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
  353. if (err < 0)
  354. return err;
  355. return 0;
  356. }
  357. EXPORT_SYMBOL(drm_dp_link_configure);
  358. /*
  359. * I2C-over-AUX implementation
  360. */
  361. static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
  362. {
  363. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
  364. I2C_FUNC_SMBUS_READ_BLOCK_DATA |
  365. I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
  366. I2C_FUNC_10BIT_ADDR;
  367. }
  368. /*
  369. * Transfer a single I2C-over-AUX message and handle various error conditions,
  370. * retrying the transaction as appropriate. It is assumed that the
  371. * aux->transfer function does not modify anything in the msg other than the
  372. * reply field.
  373. *
  374. * Returns bytes transferred on success, or a negative error code on failure.
  375. */
  376. static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
  377. {
  378. unsigned int retry, defer_i2c;
  379. int ret;
  380. /*
  381. * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
  382. * is required to retry at least seven times upon receiving AUX_DEFER
  383. * before giving up the AUX transaction.
  384. */
  385. for (retry = 0, defer_i2c = 0; retry < (7 + defer_i2c); retry++) {
  386. mutex_lock(&aux->hw_mutex);
  387. ret = aux->transfer(aux, msg);
  388. mutex_unlock(&aux->hw_mutex);
  389. if (ret < 0) {
  390. if (ret == -EBUSY)
  391. continue;
  392. DRM_DEBUG_KMS("transaction failed: %d\n", ret);
  393. return ret;
  394. }
  395. switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
  396. case DP_AUX_NATIVE_REPLY_ACK:
  397. /*
  398. * For I2C-over-AUX transactions this isn't enough, we
  399. * need to check for the I2C ACK reply.
  400. */
  401. break;
  402. case DP_AUX_NATIVE_REPLY_NACK:
  403. DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size);
  404. return -EREMOTEIO;
  405. case DP_AUX_NATIVE_REPLY_DEFER:
  406. DRM_DEBUG_KMS("native defer\n");
  407. /*
  408. * We could check for I2C bit rate capabilities and if
  409. * available adjust this interval. We could also be
  410. * more careful with DP-to-legacy adapters where a
  411. * long legacy cable may force very low I2C bit rates.
  412. *
  413. * For now just defer for long enough to hopefully be
  414. * safe for all use-cases.
  415. */
  416. usleep_range(500, 600);
  417. continue;
  418. default:
  419. DRM_ERROR("invalid native reply %#04x\n", msg->reply);
  420. return -EREMOTEIO;
  421. }
  422. switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
  423. case DP_AUX_I2C_REPLY_ACK:
  424. /*
  425. * Both native ACK and I2C ACK replies received. We
  426. * can assume the transfer was successful.
  427. */
  428. return ret;
  429. case DP_AUX_I2C_REPLY_NACK:
  430. DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size);
  431. aux->i2c_nack_count++;
  432. return -EREMOTEIO;
  433. case DP_AUX_I2C_REPLY_DEFER:
  434. DRM_DEBUG_KMS("I2C defer\n");
  435. /* DP Compliance Test 4.2.2.5 Requirement:
  436. * Must have at least 7 retries for I2C defers on the
  437. * transaction to pass this test
  438. */
  439. aux->i2c_defer_count++;
  440. if (defer_i2c < 7)
  441. defer_i2c++;
  442. usleep_range(400, 500);
  443. continue;
  444. default:
  445. DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
  446. return -EREMOTEIO;
  447. }
  448. }
  449. DRM_DEBUG_KMS("too many retries, giving up\n");
  450. return -EREMOTEIO;
  451. }
  452. /*
  453. * Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
  454. *
  455. * Returns an error code on failure, or a recommended transfer size on success.
  456. */
  457. static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg)
  458. {
  459. int err, ret = orig_msg->size;
  460. struct drm_dp_aux_msg msg = *orig_msg;
  461. while (msg.size > 0) {
  462. err = drm_dp_i2c_do_msg(aux, &msg);
  463. if (err <= 0)
  464. return err == 0 ? -EPROTO : err;
  465. if (err < msg.size && err < ret) {
  466. DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
  467. msg.size, err);
  468. ret = err;
  469. }
  470. msg.size -= err;
  471. msg.buffer += err;
  472. }
  473. return ret;
  474. }
  475. /*
  476. * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
  477. * packets to be as large as possible. If not, the I2C transactions never
  478. * succeed. Hence the default is maximum.
  479. */
  480. static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES;
  481. module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644);
  482. MODULE_PARM_DESC(dp_aux_i2c_transfer_size,
  483. "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
  484. static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
  485. int num)
  486. {
  487. struct drm_dp_aux *aux = adapter->algo_data;
  488. unsigned int i, j;
  489. unsigned transfer_size;
  490. struct drm_dp_aux_msg msg;
  491. int err = 0;
  492. dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES);
  493. memset(&msg, 0, sizeof(msg));
  494. for (i = 0; i < num; i++) {
  495. msg.address = msgs[i].addr;
  496. msg.request = (msgs[i].flags & I2C_M_RD) ?
  497. DP_AUX_I2C_READ :
  498. DP_AUX_I2C_WRITE;
  499. msg.request |= DP_AUX_I2C_MOT;
  500. /* Send a bare address packet to start the transaction.
  501. * Zero sized messages specify an address only (bare
  502. * address) transaction.
  503. */
  504. msg.buffer = NULL;
  505. msg.size = 0;
  506. err = drm_dp_i2c_do_msg(aux, &msg);
  507. if (err < 0)
  508. break;
  509. /* We want each transaction to be as large as possible, but
  510. * we'll go to smaller sizes if the hardware gives us a
  511. * short reply.
  512. */
  513. transfer_size = dp_aux_i2c_transfer_size;
  514. for (j = 0; j < msgs[i].len; j += msg.size) {
  515. msg.buffer = msgs[i].buf + j;
  516. msg.size = min(transfer_size, msgs[i].len - j);
  517. err = drm_dp_i2c_drain_msg(aux, &msg);
  518. if (err < 0)
  519. break;
  520. transfer_size = err;
  521. }
  522. if (err < 0)
  523. break;
  524. }
  525. if (err >= 0)
  526. err = num;
  527. /* Send a bare address packet to close out the transaction.
  528. * Zero sized messages specify an address only (bare
  529. * address) transaction.
  530. */
  531. msg.request &= ~DP_AUX_I2C_MOT;
  532. msg.buffer = NULL;
  533. msg.size = 0;
  534. (void)drm_dp_i2c_do_msg(aux, &msg);
  535. return err;
  536. }
  537. static const struct i2c_algorithm drm_dp_i2c_algo = {
  538. .functionality = drm_dp_i2c_functionality,
  539. .master_xfer = drm_dp_i2c_xfer,
  540. };
  541. /**
  542. * drm_dp_aux_register() - initialise and register aux channel
  543. * @aux: DisplayPort AUX channel
  544. *
  545. * Returns 0 on success or a negative error code on failure.
  546. */
  547. int drm_dp_aux_register(struct drm_dp_aux *aux)
  548. {
  549. mutex_init(&aux->hw_mutex);
  550. aux->ddc.algo = &drm_dp_i2c_algo;
  551. aux->ddc.algo_data = aux;
  552. aux->ddc.retries = 3;
  553. aux->ddc.class = I2C_CLASS_DDC;
  554. aux->ddc.owner = THIS_MODULE;
  555. aux->ddc.dev.parent = aux->dev;
  556. aux->ddc.dev.of_node = aux->dev->of_node;
  557. strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
  558. sizeof(aux->ddc.name));
  559. return i2c_add_adapter(&aux->ddc);
  560. }
  561. EXPORT_SYMBOL(drm_dp_aux_register);
  562. /**
  563. * drm_dp_aux_unregister() - unregister an AUX adapter
  564. * @aux: DisplayPort AUX channel
  565. */
  566. void drm_dp_aux_unregister(struct drm_dp_aux *aux)
  567. {
  568. i2c_del_adapter(&aux->ddc);
  569. }
  570. EXPORT_SYMBOL(drm_dp_aux_unregister);