cryp_p.h 3.2 KB

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  1. /**
  2. * Copyright (C) ST-Ericsson SA 2010
  3. * Author: Shujuan Chen <shujuan.chen@stericsson.com> for ST-Ericsson.
  4. * Author: Jonas Linde <jonas.linde@stericsson.com> for ST-Ericsson.
  5. * Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson.
  6. * Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson.
  7. * Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson.
  8. * License terms: GNU General Public License (GPL) version 2
  9. */
  10. #ifndef _CRYP_P_H_
  11. #define _CRYP_P_H_
  12. #include <linux/io.h>
  13. #include <linux/bitops.h>
  14. #include "cryp.h"
  15. #include "cryp_irqp.h"
  16. /**
  17. * Generic Macros
  18. */
  19. #define CRYP_SET_BITS(reg_name, mask) \
  20. writel_relaxed((readl_relaxed(reg_name) | mask), reg_name)
  21. #define CRYP_WRITE_BIT(reg_name, val, mask) \
  22. writel_relaxed(((readl_relaxed(reg_name) & ~(mask)) |\
  23. ((val) & (mask))), reg_name)
  24. #define CRYP_TEST_BITS(reg_name, val) \
  25. (readl_relaxed(reg_name) & (val))
  26. #define CRYP_PUT_BITS(reg, val, shift, mask) \
  27. writel_relaxed(((readl_relaxed(reg) & ~(mask)) | \
  28. (((u32)val << shift) & (mask))), reg)
  29. /**
  30. * CRYP specific Macros
  31. */
  32. #define CRYP_PERIPHERAL_ID0 0xE3
  33. #define CRYP_PERIPHERAL_ID1 0x05
  34. #define CRYP_PERIPHERAL_ID2_DB8500 0x28
  35. #define CRYP_PERIPHERAL_ID3 0x00
  36. #define CRYP_PCELL_ID0 0x0D
  37. #define CRYP_PCELL_ID1 0xF0
  38. #define CRYP_PCELL_ID2 0x05
  39. #define CRYP_PCELL_ID3 0xB1
  40. /**
  41. * CRYP register default values
  42. */
  43. #define MAX_DEVICE_SUPPORT 2
  44. /* Priv set, keyrden set and datatype 8bits swapped set as default. */
  45. #define CRYP_CR_DEFAULT 0x0482
  46. #define CRYP_DMACR_DEFAULT 0x0
  47. #define CRYP_IMSC_DEFAULT 0x0
  48. #define CRYP_DIN_DEFAULT 0x0
  49. #define CRYP_DOUT_DEFAULT 0x0
  50. #define CRYP_KEY_DEFAULT 0x0
  51. #define CRYP_INIT_VECT_DEFAULT 0x0
  52. /**
  53. * CRYP Control register specific mask
  54. */
  55. #define CRYP_CR_SECURE_MASK BIT(0)
  56. #define CRYP_CR_PRLG_MASK BIT(1)
  57. #define CRYP_CR_ALGODIR_MASK BIT(2)
  58. #define CRYP_CR_ALGOMODE_MASK (BIT(5) | BIT(4) | BIT(3))
  59. #define CRYP_CR_DATATYPE_MASK (BIT(7) | BIT(6))
  60. #define CRYP_CR_KEYSIZE_MASK (BIT(9) | BIT(8))
  61. #define CRYP_CR_KEYRDEN_MASK BIT(10)
  62. #define CRYP_CR_KSE_MASK BIT(11)
  63. #define CRYP_CR_START_MASK BIT(12)
  64. #define CRYP_CR_INIT_MASK BIT(13)
  65. #define CRYP_CR_FFLUSH_MASK BIT(14)
  66. #define CRYP_CR_CRYPEN_MASK BIT(15)
  67. #define CRYP_CR_CONTEXT_SAVE_MASK (CRYP_CR_SECURE_MASK |\
  68. CRYP_CR_PRLG_MASK |\
  69. CRYP_CR_ALGODIR_MASK |\
  70. CRYP_CR_ALGOMODE_MASK |\
  71. CRYP_CR_DATATYPE_MASK |\
  72. CRYP_CR_KEYSIZE_MASK |\
  73. CRYP_CR_KEYRDEN_MASK |\
  74. CRYP_CR_DATATYPE_MASK)
  75. #define CRYP_SR_INFIFO_READY_MASK (BIT(0) | BIT(1))
  76. #define CRYP_SR_IFEM_MASK BIT(0)
  77. #define CRYP_SR_BUSY_MASK BIT(4)
  78. /**
  79. * Bit position used while setting bits in register
  80. */
  81. #define CRYP_CR_PRLG_POS 1
  82. #define CRYP_CR_ALGODIR_POS 2
  83. #define CRYP_CR_ALGOMODE_POS 3
  84. #define CRYP_CR_DATATYPE_POS 6
  85. #define CRYP_CR_KEYSIZE_POS 8
  86. #define CRYP_CR_KEYRDEN_POS 10
  87. #define CRYP_CR_KSE_POS 11
  88. #define CRYP_CR_START_POS 12
  89. #define CRYP_CR_INIT_POS 13
  90. #define CRYP_CR_CRYPEN_POS 15
  91. #define CRYP_SR_BUSY_POS 4
  92. /**
  93. * CRYP PCRs------PC_NAND control register
  94. * BIT_MASK
  95. */
  96. #define CRYP_DMA_REQ_MASK (BIT(1) | BIT(0))
  97. #define CRYP_DMA_REQ_MASK_POS 0
  98. struct cryp_system_context {
  99. /* CRYP Register structure */
  100. struct cryp_register *p_cryp_reg[MAX_DEVICE_SUPPORT];
  101. };
  102. #endif