Kconfig 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484
  1. menuconfig CRYPTO_HW
  2. bool "Hardware crypto devices"
  3. default y
  4. ---help---
  5. Say Y here to get to see options for hardware crypto devices and
  6. processors. This option alone does not add any kernel code.
  7. If you say N, all options in this submenu will be skipped and disabled.
  8. if CRYPTO_HW
  9. config CRYPTO_DEV_PADLOCK
  10. tristate "Support for VIA PadLock ACE"
  11. depends on X86 && !UML
  12. help
  13. Some VIA processors come with an integrated crypto engine
  14. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  15. that provides instructions for very fast cryptographic
  16. operations with supported algorithms.
  17. The instructions are used only when the CPU supports them.
  18. Otherwise software encryption is used.
  19. config CRYPTO_DEV_PADLOCK_AES
  20. tristate "PadLock driver for AES algorithm"
  21. depends on CRYPTO_DEV_PADLOCK
  22. select CRYPTO_BLKCIPHER
  23. select CRYPTO_AES
  24. help
  25. Use VIA PadLock for AES algorithm.
  26. Available in VIA C3 and newer CPUs.
  27. If unsure say M. The compiled module will be
  28. called padlock-aes.
  29. config CRYPTO_DEV_PADLOCK_SHA
  30. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  31. depends on CRYPTO_DEV_PADLOCK
  32. select CRYPTO_HASH
  33. select CRYPTO_SHA1
  34. select CRYPTO_SHA256
  35. help
  36. Use VIA PadLock for SHA1/SHA256 algorithms.
  37. Available in VIA C7 and newer processors.
  38. If unsure say M. The compiled module will be
  39. called padlock-sha.
  40. config CRYPTO_DEV_GEODE
  41. tristate "Support for the Geode LX AES engine"
  42. depends on X86_32 && PCI
  43. select CRYPTO_ALGAPI
  44. select CRYPTO_BLKCIPHER
  45. help
  46. Say 'Y' here to use the AMD Geode LX processor on-board AES
  47. engine for the CryptoAPI AES algorithm.
  48. To compile this driver as a module, choose M here: the module
  49. will be called geode-aes.
  50. config ZCRYPT
  51. tristate "Support for PCI-attached cryptographic adapters"
  52. depends on S390
  53. select HW_RANDOM
  54. help
  55. Select this option if you want to use a PCI-attached cryptographic
  56. adapter like:
  57. + PCI Cryptographic Accelerator (PCICA)
  58. + PCI Cryptographic Coprocessor (PCICC)
  59. + PCI-X Cryptographic Coprocessor (PCIXCC)
  60. + Crypto Express2 Coprocessor (CEX2C)
  61. + Crypto Express2 Accelerator (CEX2A)
  62. + Crypto Express3 Coprocessor (CEX3C)
  63. + Crypto Express3 Accelerator (CEX3A)
  64. config CRYPTO_SHA1_S390
  65. tristate "SHA1 digest algorithm"
  66. depends on S390
  67. select CRYPTO_HASH
  68. help
  69. This is the s390 hardware accelerated implementation of the
  70. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  71. It is available as of z990.
  72. config CRYPTO_SHA256_S390
  73. tristate "SHA256 digest algorithm"
  74. depends on S390
  75. select CRYPTO_HASH
  76. help
  77. This is the s390 hardware accelerated implementation of the
  78. SHA256 secure hash standard (DFIPS 180-2).
  79. It is available as of z9.
  80. config CRYPTO_SHA512_S390
  81. tristate "SHA384 and SHA512 digest algorithm"
  82. depends on S390
  83. select CRYPTO_HASH
  84. help
  85. This is the s390 hardware accelerated implementation of the
  86. SHA512 secure hash standard.
  87. It is available as of z10.
  88. config CRYPTO_DES_S390
  89. tristate "DES and Triple DES cipher algorithms"
  90. depends on S390
  91. select CRYPTO_ALGAPI
  92. select CRYPTO_BLKCIPHER
  93. select CRYPTO_DES
  94. help
  95. This is the s390 hardware accelerated implementation of the
  96. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  97. As of z990 the ECB and CBC mode are hardware accelerated.
  98. As of z196 the CTR mode is hardware accelerated.
  99. config CRYPTO_AES_S390
  100. tristate "AES cipher algorithms"
  101. depends on S390
  102. select CRYPTO_ALGAPI
  103. select CRYPTO_BLKCIPHER
  104. help
  105. This is the s390 hardware accelerated implementation of the
  106. AES cipher algorithms (FIPS-197).
  107. As of z9 the ECB and CBC modes are hardware accelerated
  108. for 128 bit keys.
  109. As of z10 the ECB and CBC modes are hardware accelerated
  110. for all AES key sizes.
  111. As of z196 the CTR mode is hardware accelerated for all AES
  112. key sizes and XTS mode is hardware accelerated for 256 and
  113. 512 bit keys.
  114. config S390_PRNG
  115. tristate "Pseudo random number generator device driver"
  116. depends on S390
  117. default "m"
  118. help
  119. Select this option if you want to use the s390 pseudo random number
  120. generator. The PRNG is part of the cryptographic processor functions
  121. and uses triple-DES to generate secure random numbers like the
  122. ANSI X9.17 standard. User-space programs access the
  123. pseudo-random-number device through the char device /dev/prandom.
  124. It is available as of z9.
  125. config CRYPTO_GHASH_S390
  126. tristate "GHASH digest algorithm"
  127. depends on S390
  128. select CRYPTO_HASH
  129. help
  130. This is the s390 hardware accelerated implementation of the
  131. GHASH message digest algorithm for GCM (Galois/Counter Mode).
  132. It is available as of z196.
  133. config CRYPTO_DEV_MV_CESA
  134. tristate "Marvell's Cryptographic Engine"
  135. depends on PLAT_ORION
  136. select CRYPTO_AES
  137. select CRYPTO_BLKCIPHER
  138. select CRYPTO_HASH
  139. select SRAM
  140. help
  141. This driver allows you to utilize the Cryptographic Engines and
  142. Security Accelerator (CESA) which can be found on the Marvell Orion
  143. and Kirkwood SoCs, such as QNAP's TS-209.
  144. Currently the driver supports AES in ECB and CBC mode without DMA.
  145. config CRYPTO_DEV_MARVELL_CESA
  146. tristate "New Marvell's Cryptographic Engine driver"
  147. depends on PLAT_ORION || ARCH_MVEBU
  148. select CRYPTO_AES
  149. select CRYPTO_DES
  150. select CRYPTO_BLKCIPHER
  151. select CRYPTO_HASH
  152. select SRAM
  153. help
  154. This driver allows you to utilize the Cryptographic Engines and
  155. Security Accelerator (CESA) which can be found on the Armada 370.
  156. This driver supports CPU offload through DMA transfers.
  157. This driver is aimed at replacing the mv_cesa driver. This will only
  158. happen once it has received proper testing.
  159. config CRYPTO_DEV_NIAGARA2
  160. tristate "Niagara2 Stream Processing Unit driver"
  161. select CRYPTO_DES
  162. select CRYPTO_BLKCIPHER
  163. select CRYPTO_HASH
  164. depends on SPARC64
  165. help
  166. Each core of a Niagara2 processor contains a Stream
  167. Processing Unit, which itself contains several cryptographic
  168. sub-units. One set provides the Modular Arithmetic Unit,
  169. used for SSL offload. The other set provides the Cipher
  170. Group, which can perform encryption, decryption, hashing,
  171. checksumming, and raw copies.
  172. config CRYPTO_DEV_HIFN_795X
  173. tristate "Driver HIFN 795x crypto accelerator chips"
  174. select CRYPTO_DES
  175. select CRYPTO_BLKCIPHER
  176. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  177. depends on PCI
  178. depends on !ARCH_DMA_ADDR_T_64BIT
  179. help
  180. This option allows you to have support for HIFN 795x crypto adapters.
  181. config CRYPTO_DEV_HIFN_795X_RNG
  182. bool "HIFN 795x random number generator"
  183. depends on CRYPTO_DEV_HIFN_795X
  184. help
  185. Select this option if you want to enable the random number generator
  186. on the HIFN 795x crypto adapters.
  187. source drivers/crypto/caam/Kconfig
  188. config CRYPTO_DEV_TALITOS
  189. tristate "Talitos Freescale Security Engine (SEC)"
  190. select CRYPTO_AEAD
  191. select CRYPTO_AUTHENC
  192. select CRYPTO_BLKCIPHER
  193. select CRYPTO_HASH
  194. select HW_RANDOM
  195. depends on FSL_SOC
  196. help
  197. Say 'Y' here to use the Freescale Security Engine (SEC)
  198. to offload cryptographic algorithm computation.
  199. The Freescale SEC is present on PowerQUICC 'E' processors, such
  200. as the MPC8349E and MPC8548E.
  201. To compile this driver as a module, choose M here: the module
  202. will be called talitos.
  203. config CRYPTO_DEV_TALITOS1
  204. bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
  205. depends on CRYPTO_DEV_TALITOS
  206. depends on PPC_8xx || PPC_82xx
  207. default y
  208. help
  209. Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
  210. found on MPC82xx or the Freescale Security Engine (SEC Lite)
  211. version 1.2 found on MPC8xx
  212. config CRYPTO_DEV_TALITOS2
  213. bool "SEC2+ (SEC version 2.0 or upper)"
  214. depends on CRYPTO_DEV_TALITOS
  215. default y if !PPC_8xx
  216. help
  217. Say 'Y' here to use the Freescale Security Engine (SEC)
  218. version 2 and following as found on MPC83xx, MPC85xx, etc ...
  219. config CRYPTO_DEV_IXP4XX
  220. tristate "Driver for IXP4xx crypto hardware acceleration"
  221. depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
  222. select CRYPTO_DES
  223. select CRYPTO_AEAD
  224. select CRYPTO_AUTHENC
  225. select CRYPTO_BLKCIPHER
  226. help
  227. Driver for the IXP4xx NPE crypto engine.
  228. config CRYPTO_DEV_PPC4XX
  229. tristate "Driver AMCC PPC4xx crypto accelerator"
  230. depends on PPC && 4xx
  231. select CRYPTO_HASH
  232. select CRYPTO_BLKCIPHER
  233. help
  234. This option allows you to have support for AMCC crypto acceleration.
  235. config CRYPTO_DEV_OMAP_SHAM
  236. tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
  237. depends on ARCH_OMAP2PLUS
  238. select CRYPTO_SHA1
  239. select CRYPTO_MD5
  240. select CRYPTO_SHA256
  241. select CRYPTO_SHA512
  242. select CRYPTO_HMAC
  243. help
  244. OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
  245. want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
  246. config CRYPTO_DEV_OMAP_AES
  247. tristate "Support for OMAP AES hw engine"
  248. depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
  249. select CRYPTO_AES
  250. select CRYPTO_BLKCIPHER
  251. help
  252. OMAP processors have AES module accelerator. Select this if you
  253. want to use the OMAP module for AES algorithms.
  254. config CRYPTO_DEV_OMAP_DES
  255. tristate "Support for OMAP DES3DES hw engine"
  256. depends on ARCH_OMAP2PLUS
  257. select CRYPTO_DES
  258. select CRYPTO_BLKCIPHER
  259. help
  260. OMAP processors have DES/3DES module accelerator. Select this if you
  261. want to use the OMAP module for DES and 3DES algorithms. Currently
  262. the ECB and CBC modes of operation supported by the driver. Also
  263. accesses made on unaligned boundaries are also supported.
  264. config CRYPTO_DEV_PICOXCELL
  265. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  266. depends on ARCH_PICOXCELL && HAVE_CLK
  267. select CRYPTO_AEAD
  268. select CRYPTO_AES
  269. select CRYPTO_AUTHENC
  270. select CRYPTO_BLKCIPHER
  271. select CRYPTO_DES
  272. select CRYPTO_CBC
  273. select CRYPTO_ECB
  274. select CRYPTO_SEQIV
  275. help
  276. This option enables support for the hardware offload engines in the
  277. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  278. and for 3gpp Layer 2 ciphering support.
  279. Saying m here will build a module named pipcoxcell_crypto.
  280. config CRYPTO_DEV_SAHARA
  281. tristate "Support for SAHARA crypto accelerator"
  282. depends on ARCH_MXC && OF
  283. select CRYPTO_BLKCIPHER
  284. select CRYPTO_AES
  285. select CRYPTO_ECB
  286. help
  287. This option enables support for the SAHARA HW crypto accelerator
  288. found in some Freescale i.MX chips.
  289. config CRYPTO_DEV_S5P
  290. tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
  291. depends on ARCH_S5PV210 || ARCH_EXYNOS
  292. select CRYPTO_AES
  293. select CRYPTO_BLKCIPHER
  294. help
  295. This option allows you to have support for S5P crypto acceleration.
  296. Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
  297. algorithms execution.
  298. config CRYPTO_DEV_NX
  299. bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
  300. depends on PPC64
  301. help
  302. This enables support for the NX hardware cryptographic accelerator
  303. coprocessor that is in IBM PowerPC P7+ or later processors. This
  304. does not actually enable any drivers, it only allows you to select
  305. which acceleration type (encryption and/or compression) to enable.
  306. if CRYPTO_DEV_NX
  307. source "drivers/crypto/nx/Kconfig"
  308. endif
  309. config CRYPTO_DEV_UX500
  310. tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
  311. depends on ARCH_U8500
  312. help
  313. Driver for ST-Ericsson UX500 crypto engine.
  314. if CRYPTO_DEV_UX500
  315. source "drivers/crypto/ux500/Kconfig"
  316. endif # if CRYPTO_DEV_UX500
  317. config CRYPTO_DEV_BFIN_CRC
  318. tristate "Support for Blackfin CRC hardware"
  319. depends on BF60x
  320. help
  321. Newer Blackfin processors have CRC hardware. Select this if you
  322. want to use the Blackfin CRC module.
  323. config CRYPTO_DEV_ATMEL_AES
  324. tristate "Support for Atmel AES hw accelerator"
  325. depends on ARCH_AT91
  326. select CRYPTO_AES
  327. select CRYPTO_BLKCIPHER
  328. select AT_HDMAC
  329. help
  330. Some Atmel processors have AES hw accelerator.
  331. Select this if you want to use the Atmel module for
  332. AES algorithms.
  333. To compile this driver as a module, choose M here: the module
  334. will be called atmel-aes.
  335. config CRYPTO_DEV_ATMEL_TDES
  336. tristate "Support for Atmel DES/TDES hw accelerator"
  337. depends on ARCH_AT91
  338. select CRYPTO_DES
  339. select CRYPTO_BLKCIPHER
  340. help
  341. Some Atmel processors have DES/TDES hw accelerator.
  342. Select this if you want to use the Atmel module for
  343. DES/TDES algorithms.
  344. To compile this driver as a module, choose M here: the module
  345. will be called atmel-tdes.
  346. config CRYPTO_DEV_ATMEL_SHA
  347. tristate "Support for Atmel SHA hw accelerator"
  348. depends on ARCH_AT91
  349. select CRYPTO_HASH
  350. help
  351. Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
  352. hw accelerator.
  353. Select this if you want to use the Atmel module for
  354. SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
  355. To compile this driver as a module, choose M here: the module
  356. will be called atmel-sha.
  357. config CRYPTO_DEV_CCP
  358. bool "Support for AMD Cryptographic Coprocessor"
  359. depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
  360. help
  361. The AMD Cryptographic Coprocessor provides hardware support
  362. for encryption, hashing and related operations.
  363. if CRYPTO_DEV_CCP
  364. source "drivers/crypto/ccp/Kconfig"
  365. endif
  366. config CRYPTO_DEV_MXS_DCP
  367. tristate "Support for Freescale MXS DCP"
  368. depends on ARCH_MXS
  369. select CRYPTO_CBC
  370. select CRYPTO_ECB
  371. select CRYPTO_AES
  372. select CRYPTO_BLKCIPHER
  373. select CRYPTO_HASH
  374. help
  375. The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
  376. co-processor on the die.
  377. To compile this driver as a module, choose M here: the module
  378. will be called mxs-dcp.
  379. source "drivers/crypto/qat/Kconfig"
  380. config CRYPTO_DEV_QCE
  381. tristate "Qualcomm crypto engine accelerator"
  382. depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
  383. select CRYPTO_AES
  384. select CRYPTO_DES
  385. select CRYPTO_ECB
  386. select CRYPTO_CBC
  387. select CRYPTO_XTS
  388. select CRYPTO_CTR
  389. select CRYPTO_BLKCIPHER
  390. help
  391. This driver supports Qualcomm crypto engine accelerator
  392. hardware. To compile this driver as a module, choose M here. The
  393. module will be called qcrypto.
  394. config CRYPTO_DEV_VMX
  395. bool "Support for VMX cryptographic acceleration instructions"
  396. depends on PPC64
  397. help
  398. Support for VMX cryptographic acceleration instructions.
  399. source "drivers/crypto/vmx/Kconfig"
  400. config CRYPTO_DEV_IMGTEC_HASH
  401. tristate "Imagination Technologies hardware hash accelerator"
  402. depends on MIPS || COMPILE_TEST
  403. depends on HAS_DMA
  404. select CRYPTO_MD5
  405. select CRYPTO_SHA1
  406. select CRYPTO_SHA256
  407. select CRYPTO_HASH
  408. help
  409. This driver interfaces with the Imagination Technologies
  410. hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
  411. hashing algorithms.
  412. endif # CRYPTO_HW