exynos-cpufreq.c 6.2 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * EXYNOS - CPU frequency scaling support for EXYNOS series
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/err.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <linux/slab.h>
  17. #include <linux/regulator/consumer.h>
  18. #include <linux/cpufreq.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/of.h>
  21. #include <linux/cpu_cooling.h>
  22. #include <linux/cpu.h>
  23. #include "exynos-cpufreq.h"
  24. static struct exynos_dvfs_info *exynos_info;
  25. static struct thermal_cooling_device *cdev;
  26. static struct regulator *arm_regulator;
  27. static unsigned int locking_frequency;
  28. static int exynos_cpufreq_get_index(unsigned int freq)
  29. {
  30. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  31. struct cpufreq_frequency_table *pos;
  32. cpufreq_for_each_entry(pos, freq_table)
  33. if (pos->frequency == freq)
  34. break;
  35. if (pos->frequency == CPUFREQ_TABLE_END)
  36. return -EINVAL;
  37. return pos - freq_table;
  38. }
  39. static int exynos_cpufreq_scale(unsigned int target_freq)
  40. {
  41. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  42. unsigned int *volt_table = exynos_info->volt_table;
  43. struct cpufreq_policy *policy = cpufreq_cpu_get(0);
  44. unsigned int arm_volt, safe_arm_volt = 0;
  45. unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
  46. struct device *dev = exynos_info->dev;
  47. unsigned int old_freq;
  48. int index, old_index;
  49. int ret = 0;
  50. old_freq = policy->cur;
  51. /*
  52. * The policy max have been changed so that we cannot get proper
  53. * old_index with cpufreq_frequency_table_target(). Thus, ignore
  54. * policy and get the index from the raw frequency table.
  55. */
  56. old_index = exynos_cpufreq_get_index(old_freq);
  57. if (old_index < 0) {
  58. ret = old_index;
  59. goto out;
  60. }
  61. index = exynos_cpufreq_get_index(target_freq);
  62. if (index < 0) {
  63. ret = index;
  64. goto out;
  65. }
  66. /*
  67. * ARM clock source will be changed APLL to MPLL temporary
  68. * To support this level, need to control regulator for
  69. * required voltage level
  70. */
  71. if (exynos_info->need_apll_change != NULL) {
  72. if (exynos_info->need_apll_change(old_index, index) &&
  73. (freq_table[index].frequency < mpll_freq_khz) &&
  74. (freq_table[old_index].frequency < mpll_freq_khz))
  75. safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
  76. }
  77. arm_volt = volt_table[index];
  78. /* When the new frequency is higher than current frequency */
  79. if ((target_freq > old_freq) && !safe_arm_volt) {
  80. /* Firstly, voltage up to increase frequency */
  81. ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
  82. if (ret) {
  83. dev_err(dev, "failed to set cpu voltage to %d\n",
  84. arm_volt);
  85. return ret;
  86. }
  87. }
  88. if (safe_arm_volt) {
  89. ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
  90. safe_arm_volt);
  91. if (ret) {
  92. dev_err(dev, "failed to set cpu voltage to %d\n",
  93. safe_arm_volt);
  94. return ret;
  95. }
  96. }
  97. exynos_info->set_freq(old_index, index);
  98. /* When the new frequency is lower than current frequency */
  99. if ((target_freq < old_freq) ||
  100. ((target_freq > old_freq) && safe_arm_volt)) {
  101. /* down the voltage after frequency change */
  102. ret = regulator_set_voltage(arm_regulator, arm_volt,
  103. arm_volt);
  104. if (ret) {
  105. dev_err(dev, "failed to set cpu voltage to %d\n",
  106. arm_volt);
  107. goto out;
  108. }
  109. }
  110. out:
  111. cpufreq_cpu_put(policy);
  112. return ret;
  113. }
  114. static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
  115. {
  116. return exynos_cpufreq_scale(exynos_info->freq_table[index].frequency);
  117. }
  118. static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
  119. {
  120. policy->clk = exynos_info->cpu_clk;
  121. policy->suspend_freq = locking_frequency;
  122. return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
  123. }
  124. static struct cpufreq_driver exynos_driver = {
  125. .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
  126. .verify = cpufreq_generic_frequency_table_verify,
  127. .target_index = exynos_target,
  128. .get = cpufreq_generic_get,
  129. .init = exynos_cpufreq_cpu_init,
  130. .name = "exynos_cpufreq",
  131. .attr = cpufreq_generic_attr,
  132. #ifdef CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW
  133. .boost_supported = true,
  134. #endif
  135. #ifdef CONFIG_PM
  136. .suspend = cpufreq_generic_suspend,
  137. #endif
  138. };
  139. static int exynos_cpufreq_probe(struct platform_device *pdev)
  140. {
  141. struct device_node *cpu0;
  142. int ret = -EINVAL;
  143. exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
  144. if (!exynos_info)
  145. return -ENOMEM;
  146. exynos_info->dev = &pdev->dev;
  147. if (of_machine_is_compatible("samsung,exynos4212")) {
  148. exynos_info->type = EXYNOS_SOC_4212;
  149. ret = exynos4x12_cpufreq_init(exynos_info);
  150. } else if (of_machine_is_compatible("samsung,exynos4412")) {
  151. exynos_info->type = EXYNOS_SOC_4412;
  152. ret = exynos4x12_cpufreq_init(exynos_info);
  153. } else if (of_machine_is_compatible("samsung,exynos5250")) {
  154. exynos_info->type = EXYNOS_SOC_5250;
  155. ret = exynos5250_cpufreq_init(exynos_info);
  156. } else {
  157. pr_err("%s: Unknown SoC type\n", __func__);
  158. return -ENODEV;
  159. }
  160. if (ret)
  161. goto err_vdd_arm;
  162. if (exynos_info->set_freq == NULL) {
  163. dev_err(&pdev->dev, "No set_freq function (ERR)\n");
  164. goto err_vdd_arm;
  165. }
  166. arm_regulator = regulator_get(NULL, "vdd_arm");
  167. if (IS_ERR(arm_regulator)) {
  168. dev_err(&pdev->dev, "failed to get resource vdd_arm\n");
  169. goto err_vdd_arm;
  170. }
  171. /* Done here as we want to capture boot frequency */
  172. locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
  173. ret = cpufreq_register_driver(&exynos_driver);
  174. if (ret)
  175. goto err_cpufreq_reg;
  176. cpu0 = of_get_cpu_node(0, NULL);
  177. if (!cpu0) {
  178. pr_err("failed to find cpu0 node\n");
  179. return 0;
  180. }
  181. if (of_find_property(cpu0, "#cooling-cells", NULL)) {
  182. cdev = of_cpufreq_cooling_register(cpu0,
  183. cpu_present_mask);
  184. if (IS_ERR(cdev))
  185. pr_err("running cpufreq without cooling device: %ld\n",
  186. PTR_ERR(cdev));
  187. }
  188. return 0;
  189. err_cpufreq_reg:
  190. dev_err(&pdev->dev, "failed to register cpufreq driver\n");
  191. regulator_put(arm_regulator);
  192. err_vdd_arm:
  193. kfree(exynos_info);
  194. return -EINVAL;
  195. }
  196. static struct platform_driver exynos_cpufreq_platdrv = {
  197. .driver = {
  198. .name = "exynos-cpufreq",
  199. },
  200. .probe = exynos_cpufreq_probe,
  201. };
  202. module_platform_driver(exynos_cpufreq_platdrv);