xillybus_pcie.c 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229
  1. /*
  2. * linux/drivers/misc/xillybus_pcie.c
  3. *
  4. * Copyright 2011 Xillybus Ltd, http://xillybus.com
  5. *
  6. * Driver for the Xillybus FPGA/host framework using PCI Express.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the smems of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/pci-aspm.h>
  15. #include <linux/slab.h>
  16. #include "xillybus.h"
  17. MODULE_DESCRIPTION("Xillybus driver for PCIe");
  18. MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
  19. MODULE_VERSION("1.06");
  20. MODULE_ALIAS("xillybus_pcie");
  21. MODULE_LICENSE("GPL v2");
  22. #define PCI_DEVICE_ID_XILLYBUS 0xebeb
  23. #define PCI_VENDOR_ID_ALTERA 0x1172
  24. #define PCI_VENDOR_ID_ACTEL 0x11aa
  25. #define PCI_VENDOR_ID_LATTICE 0x1204
  26. static const char xillyname[] = "xillybus_pcie";
  27. static const struct pci_device_id xillyids[] = {
  28. {PCI_DEVICE(PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_XILLYBUS)},
  29. {PCI_DEVICE(PCI_VENDOR_ID_ALTERA, PCI_DEVICE_ID_XILLYBUS)},
  30. {PCI_DEVICE(PCI_VENDOR_ID_ACTEL, PCI_DEVICE_ID_XILLYBUS)},
  31. {PCI_DEVICE(PCI_VENDOR_ID_LATTICE, PCI_DEVICE_ID_XILLYBUS)},
  32. { /* End: all zeroes */ }
  33. };
  34. static int xilly_pci_direction(int direction)
  35. {
  36. switch (direction) {
  37. case DMA_TO_DEVICE:
  38. return PCI_DMA_TODEVICE;
  39. case DMA_FROM_DEVICE:
  40. return PCI_DMA_FROMDEVICE;
  41. default:
  42. return PCI_DMA_BIDIRECTIONAL;
  43. }
  44. }
  45. static void xilly_dma_sync_single_for_cpu_pci(struct xilly_endpoint *ep,
  46. dma_addr_t dma_handle,
  47. size_t size,
  48. int direction)
  49. {
  50. pci_dma_sync_single_for_cpu(ep->pdev,
  51. dma_handle,
  52. size,
  53. xilly_pci_direction(direction));
  54. }
  55. static void xilly_dma_sync_single_for_device_pci(struct xilly_endpoint *ep,
  56. dma_addr_t dma_handle,
  57. size_t size,
  58. int direction)
  59. {
  60. pci_dma_sync_single_for_device(ep->pdev,
  61. dma_handle,
  62. size,
  63. xilly_pci_direction(direction));
  64. }
  65. static void xilly_pci_unmap(void *ptr)
  66. {
  67. struct xilly_mapping *data = ptr;
  68. pci_unmap_single(data->device, data->dma_addr,
  69. data->size, data->direction);
  70. kfree(ptr);
  71. }
  72. /*
  73. * Map either through the PCI DMA mapper or the non_PCI one. Behind the
  74. * scenes exactly the same functions are called with the same parameters,
  75. * but that can change.
  76. */
  77. static int xilly_map_single_pci(struct xilly_endpoint *ep,
  78. void *ptr,
  79. size_t size,
  80. int direction,
  81. dma_addr_t *ret_dma_handle
  82. )
  83. {
  84. int pci_direction;
  85. dma_addr_t addr;
  86. struct xilly_mapping *this;
  87. int rc;
  88. this = kzalloc(sizeof(*this), GFP_KERNEL);
  89. if (!this)
  90. return -ENOMEM;
  91. pci_direction = xilly_pci_direction(direction);
  92. addr = pci_map_single(ep->pdev, ptr, size, pci_direction);
  93. if (pci_dma_mapping_error(ep->pdev, addr)) {
  94. kfree(this);
  95. return -ENODEV;
  96. }
  97. this->device = ep->pdev;
  98. this->dma_addr = addr;
  99. this->size = size;
  100. this->direction = pci_direction;
  101. *ret_dma_handle = addr;
  102. rc = devm_add_action(ep->dev, xilly_pci_unmap, this);
  103. if (rc) {
  104. pci_unmap_single(ep->pdev, addr, size, pci_direction);
  105. kfree(this);
  106. return rc;
  107. }
  108. return 0;
  109. }
  110. static struct xilly_endpoint_hardware pci_hw = {
  111. .owner = THIS_MODULE,
  112. .hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_pci,
  113. .hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_pci,
  114. .map_single = xilly_map_single_pci,
  115. };
  116. static int xilly_probe(struct pci_dev *pdev,
  117. const struct pci_device_id *ent)
  118. {
  119. struct xilly_endpoint *endpoint;
  120. int rc;
  121. endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw);
  122. if (!endpoint)
  123. return -ENOMEM;
  124. pci_set_drvdata(pdev, endpoint);
  125. rc = pcim_enable_device(pdev);
  126. if (rc) {
  127. dev_err(endpoint->dev,
  128. "pcim_enable_device() failed. Aborting.\n");
  129. return rc;
  130. }
  131. /* L0s has caused packet drops. No power saving, thank you. */
  132. pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
  133. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
  134. dev_err(endpoint->dev,
  135. "Incorrect BAR configuration. Aborting.\n");
  136. return -ENODEV;
  137. }
  138. rc = pcim_iomap_regions(pdev, 0x01, xillyname);
  139. if (rc) {
  140. dev_err(endpoint->dev,
  141. "pcim_iomap_regions() failed. Aborting.\n");
  142. return rc;
  143. }
  144. endpoint->registers = pcim_iomap_table(pdev)[0];
  145. pci_set_master(pdev);
  146. /* Set up a single MSI interrupt */
  147. if (pci_enable_msi(pdev)) {
  148. dev_err(endpoint->dev,
  149. "Failed to enable MSI interrupts. Aborting.\n");
  150. return -ENODEV;
  151. }
  152. rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0,
  153. xillyname, endpoint);
  154. if (rc) {
  155. dev_err(endpoint->dev,
  156. "Failed to register MSI handler. Aborting.\n");
  157. return -ENODEV;
  158. }
  159. /*
  160. * In theory, an attempt to set the DMA mask to 64 and dma_using_dac=1
  161. * is the right thing. But some unclever PCIe drivers report it's OK
  162. * when the hardware drops those 64-bit PCIe packets. So trust
  163. * nobody and use 32 bits DMA addressing in any case.
  164. */
  165. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
  166. endpoint->dma_using_dac = 0;
  167. } else {
  168. dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n");
  169. return -ENODEV;
  170. }
  171. return xillybus_endpoint_discovery(endpoint);
  172. }
  173. static void xilly_remove(struct pci_dev *pdev)
  174. {
  175. struct xilly_endpoint *endpoint = pci_get_drvdata(pdev);
  176. xillybus_endpoint_remove(endpoint);
  177. }
  178. MODULE_DEVICE_TABLE(pci, xillyids);
  179. static struct pci_driver xillybus_driver = {
  180. .name = xillyname,
  181. .id_table = xillyids,
  182. .probe = xilly_probe,
  183. .remove = xilly_remove,
  184. };
  185. module_pci_driver(xillybus_driver);