hpet.c 25 KB

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  1. /*
  2. * Intel & MS High Precision Event Timer Implementation.
  3. *
  4. * Copyright (C) 2003 Intel Corporation
  5. * Venki Pallipadi
  6. * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
  7. * Bob Picco <robert.picco@hp.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/major.h>
  19. #include <linux/ioport.h>
  20. #include <linux/fcntl.h>
  21. #include <linux/init.h>
  22. #include <linux/poll.h>
  23. #include <linux/mm.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sysctl.h>
  27. #include <linux/wait.h>
  28. #include <linux/bcd.h>
  29. #include <linux/seq_file.h>
  30. #include <linux/bitops.h>
  31. #include <linux/compat.h>
  32. #include <linux/clocksource.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/slab.h>
  35. #include <linux/io.h>
  36. #include <linux/acpi.h>
  37. #include <linux/hpet.h>
  38. #include <asm/current.h>
  39. #include <asm/irq.h>
  40. #include <asm/div64.h>
  41. /*
  42. * The High Precision Event Timer driver.
  43. * This driver is closely modelled after the rtc.c driver.
  44. * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
  45. */
  46. #define HPET_USER_FREQ (64)
  47. #define HPET_DRIFT (500)
  48. #define HPET_RANGE_SIZE 1024 /* from HPET spec */
  49. /* WARNING -- don't get confused. These macros are never used
  50. * to write the (single) counter, and rarely to read it.
  51. * They're badly named; to fix, someday.
  52. */
  53. #if BITS_PER_LONG == 64
  54. #define write_counter(V, MC) writeq(V, MC)
  55. #define read_counter(MC) readq(MC)
  56. #else
  57. #define write_counter(V, MC) writel(V, MC)
  58. #define read_counter(MC) readl(MC)
  59. #endif
  60. static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
  61. static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
  62. /* This clocksource driver currently only works on ia64 */
  63. #ifdef CONFIG_IA64
  64. static void __iomem *hpet_mctr;
  65. static cycle_t read_hpet(struct clocksource *cs)
  66. {
  67. return (cycle_t)read_counter((void __iomem *)hpet_mctr);
  68. }
  69. static struct clocksource clocksource_hpet = {
  70. .name = "hpet",
  71. .rating = 250,
  72. .read = read_hpet,
  73. .mask = CLOCKSOURCE_MASK(64),
  74. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  75. };
  76. static struct clocksource *hpet_clocksource;
  77. #endif
  78. /* A lock for concurrent access by app and isr hpet activity. */
  79. static DEFINE_SPINLOCK(hpet_lock);
  80. #define HPET_DEV_NAME (7)
  81. struct hpet_dev {
  82. struct hpets *hd_hpets;
  83. struct hpet __iomem *hd_hpet;
  84. struct hpet_timer __iomem *hd_timer;
  85. unsigned long hd_ireqfreq;
  86. unsigned long hd_irqdata;
  87. wait_queue_head_t hd_waitqueue;
  88. struct fasync_struct *hd_async_queue;
  89. unsigned int hd_flags;
  90. unsigned int hd_irq;
  91. unsigned int hd_hdwirq;
  92. char hd_name[HPET_DEV_NAME];
  93. };
  94. struct hpets {
  95. struct hpets *hp_next;
  96. struct hpet __iomem *hp_hpet;
  97. unsigned long hp_hpet_phys;
  98. struct clocksource *hp_clocksource;
  99. unsigned long long hp_tick_freq;
  100. unsigned long hp_delta;
  101. unsigned int hp_ntimer;
  102. unsigned int hp_which;
  103. struct hpet_dev hp_dev[1];
  104. };
  105. static struct hpets *hpets;
  106. #define HPET_OPEN 0x0001
  107. #define HPET_IE 0x0002 /* interrupt enabled */
  108. #define HPET_PERIODIC 0x0004
  109. #define HPET_SHARED_IRQ 0x0008
  110. #ifndef readq
  111. static inline unsigned long long readq(void __iomem *addr)
  112. {
  113. return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
  114. }
  115. #endif
  116. #ifndef writeq
  117. static inline void writeq(unsigned long long v, void __iomem *addr)
  118. {
  119. writel(v & 0xffffffff, addr);
  120. writel(v >> 32, addr + 4);
  121. }
  122. #endif
  123. static irqreturn_t hpet_interrupt(int irq, void *data)
  124. {
  125. struct hpet_dev *devp;
  126. unsigned long isr;
  127. devp = data;
  128. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  129. if ((devp->hd_flags & HPET_SHARED_IRQ) &&
  130. !(isr & readl(&devp->hd_hpet->hpet_isr)))
  131. return IRQ_NONE;
  132. spin_lock(&hpet_lock);
  133. devp->hd_irqdata++;
  134. /*
  135. * For non-periodic timers, increment the accumulator.
  136. * This has the effect of treating non-periodic like periodic.
  137. */
  138. if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
  139. unsigned long m, t, mc, base, k;
  140. struct hpet __iomem *hpet = devp->hd_hpet;
  141. struct hpets *hpetp = devp->hd_hpets;
  142. t = devp->hd_ireqfreq;
  143. m = read_counter(&devp->hd_timer->hpet_compare);
  144. mc = read_counter(&hpet->hpet_mc);
  145. /* The time for the next interrupt would logically be t + m,
  146. * however, if we are very unlucky and the interrupt is delayed
  147. * for longer than t then we will completely miss the next
  148. * interrupt if we set t + m and an application will hang.
  149. * Therefore we need to make a more complex computation assuming
  150. * that there exists a k for which the following is true:
  151. * k * t + base < mc + delta
  152. * (k + 1) * t + base > mc + delta
  153. * where t is the interval in hpet ticks for the given freq,
  154. * base is the theoretical start value 0 < base < t,
  155. * mc is the main counter value at the time of the interrupt,
  156. * delta is the time it takes to write the a value to the
  157. * comparator.
  158. * k may then be computed as (mc - base + delta) / t .
  159. */
  160. base = mc % t;
  161. k = (mc - base + hpetp->hp_delta) / t;
  162. write_counter(t * (k + 1) + base,
  163. &devp->hd_timer->hpet_compare);
  164. }
  165. if (devp->hd_flags & HPET_SHARED_IRQ)
  166. writel(isr, &devp->hd_hpet->hpet_isr);
  167. spin_unlock(&hpet_lock);
  168. wake_up_interruptible(&devp->hd_waitqueue);
  169. kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
  170. return IRQ_HANDLED;
  171. }
  172. static void hpet_timer_set_irq(struct hpet_dev *devp)
  173. {
  174. unsigned long v;
  175. int irq, gsi;
  176. struct hpet_timer __iomem *timer;
  177. spin_lock_irq(&hpet_lock);
  178. if (devp->hd_hdwirq) {
  179. spin_unlock_irq(&hpet_lock);
  180. return;
  181. }
  182. timer = devp->hd_timer;
  183. /* we prefer level triggered mode */
  184. v = readl(&timer->hpet_config);
  185. if (!(v & Tn_INT_TYPE_CNF_MASK)) {
  186. v |= Tn_INT_TYPE_CNF_MASK;
  187. writel(v, &timer->hpet_config);
  188. }
  189. spin_unlock_irq(&hpet_lock);
  190. v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
  191. Tn_INT_ROUTE_CAP_SHIFT;
  192. /*
  193. * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
  194. * legacy device. In IO APIC mode, we skip all the legacy IRQS.
  195. */
  196. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
  197. v &= ~0xf3df;
  198. else
  199. v &= ~0xffff;
  200. for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
  201. if (irq >= nr_irqs) {
  202. irq = HPET_MAX_IRQ;
  203. break;
  204. }
  205. gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
  206. ACPI_ACTIVE_LOW);
  207. if (gsi > 0)
  208. break;
  209. /* FIXME: Setup interrupt source table */
  210. }
  211. if (irq < HPET_MAX_IRQ) {
  212. spin_lock_irq(&hpet_lock);
  213. v = readl(&timer->hpet_config);
  214. v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
  215. writel(v, &timer->hpet_config);
  216. devp->hd_hdwirq = gsi;
  217. spin_unlock_irq(&hpet_lock);
  218. }
  219. return;
  220. }
  221. static int hpet_open(struct inode *inode, struct file *file)
  222. {
  223. struct hpet_dev *devp;
  224. struct hpets *hpetp;
  225. int i;
  226. if (file->f_mode & FMODE_WRITE)
  227. return -EINVAL;
  228. mutex_lock(&hpet_mutex);
  229. spin_lock_irq(&hpet_lock);
  230. for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
  231. for (i = 0; i < hpetp->hp_ntimer; i++)
  232. if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
  233. continue;
  234. else {
  235. devp = &hpetp->hp_dev[i];
  236. break;
  237. }
  238. if (!devp) {
  239. spin_unlock_irq(&hpet_lock);
  240. mutex_unlock(&hpet_mutex);
  241. return -EBUSY;
  242. }
  243. file->private_data = devp;
  244. devp->hd_irqdata = 0;
  245. devp->hd_flags |= HPET_OPEN;
  246. spin_unlock_irq(&hpet_lock);
  247. mutex_unlock(&hpet_mutex);
  248. hpet_timer_set_irq(devp);
  249. return 0;
  250. }
  251. static ssize_t
  252. hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
  253. {
  254. DECLARE_WAITQUEUE(wait, current);
  255. unsigned long data;
  256. ssize_t retval;
  257. struct hpet_dev *devp;
  258. devp = file->private_data;
  259. if (!devp->hd_ireqfreq)
  260. return -EIO;
  261. if (count < sizeof(unsigned long))
  262. return -EINVAL;
  263. add_wait_queue(&devp->hd_waitqueue, &wait);
  264. for ( ; ; ) {
  265. set_current_state(TASK_INTERRUPTIBLE);
  266. spin_lock_irq(&hpet_lock);
  267. data = devp->hd_irqdata;
  268. devp->hd_irqdata = 0;
  269. spin_unlock_irq(&hpet_lock);
  270. if (data)
  271. break;
  272. else if (file->f_flags & O_NONBLOCK) {
  273. retval = -EAGAIN;
  274. goto out;
  275. } else if (signal_pending(current)) {
  276. retval = -ERESTARTSYS;
  277. goto out;
  278. }
  279. schedule();
  280. }
  281. retval = put_user(data, (unsigned long __user *)buf);
  282. if (!retval)
  283. retval = sizeof(unsigned long);
  284. out:
  285. __set_current_state(TASK_RUNNING);
  286. remove_wait_queue(&devp->hd_waitqueue, &wait);
  287. return retval;
  288. }
  289. static unsigned int hpet_poll(struct file *file, poll_table * wait)
  290. {
  291. unsigned long v;
  292. struct hpet_dev *devp;
  293. devp = file->private_data;
  294. if (!devp->hd_ireqfreq)
  295. return 0;
  296. poll_wait(file, &devp->hd_waitqueue, wait);
  297. spin_lock_irq(&hpet_lock);
  298. v = devp->hd_irqdata;
  299. spin_unlock_irq(&hpet_lock);
  300. if (v != 0)
  301. return POLLIN | POLLRDNORM;
  302. return 0;
  303. }
  304. #ifdef CONFIG_HPET_MMAP
  305. #ifdef CONFIG_HPET_MMAP_DEFAULT
  306. static int hpet_mmap_enabled = 1;
  307. #else
  308. static int hpet_mmap_enabled = 0;
  309. #endif
  310. static __init int hpet_mmap_enable(char *str)
  311. {
  312. get_option(&str, &hpet_mmap_enabled);
  313. pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
  314. return 1;
  315. }
  316. __setup("hpet_mmap", hpet_mmap_enable);
  317. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  318. {
  319. struct hpet_dev *devp;
  320. unsigned long addr;
  321. if (!hpet_mmap_enabled)
  322. return -EACCES;
  323. devp = file->private_data;
  324. addr = devp->hd_hpets->hp_hpet_phys;
  325. if (addr & (PAGE_SIZE - 1))
  326. return -ENOSYS;
  327. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  328. return vm_iomap_memory(vma, addr, PAGE_SIZE);
  329. }
  330. #else
  331. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  332. {
  333. return -ENOSYS;
  334. }
  335. #endif
  336. static int hpet_fasync(int fd, struct file *file, int on)
  337. {
  338. struct hpet_dev *devp;
  339. devp = file->private_data;
  340. if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
  341. return 0;
  342. else
  343. return -EIO;
  344. }
  345. static int hpet_release(struct inode *inode, struct file *file)
  346. {
  347. struct hpet_dev *devp;
  348. struct hpet_timer __iomem *timer;
  349. int irq = 0;
  350. devp = file->private_data;
  351. timer = devp->hd_timer;
  352. spin_lock_irq(&hpet_lock);
  353. writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
  354. &timer->hpet_config);
  355. irq = devp->hd_irq;
  356. devp->hd_irq = 0;
  357. devp->hd_ireqfreq = 0;
  358. if (devp->hd_flags & HPET_PERIODIC
  359. && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  360. unsigned long v;
  361. v = readq(&timer->hpet_config);
  362. v ^= Tn_TYPE_CNF_MASK;
  363. writeq(v, &timer->hpet_config);
  364. }
  365. devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
  366. spin_unlock_irq(&hpet_lock);
  367. if (irq)
  368. free_irq(irq, devp);
  369. file->private_data = NULL;
  370. return 0;
  371. }
  372. static int hpet_ioctl_ieon(struct hpet_dev *devp)
  373. {
  374. struct hpet_timer __iomem *timer;
  375. struct hpet __iomem *hpet;
  376. struct hpets *hpetp;
  377. int irq;
  378. unsigned long g, v, t, m;
  379. unsigned long flags, isr;
  380. timer = devp->hd_timer;
  381. hpet = devp->hd_hpet;
  382. hpetp = devp->hd_hpets;
  383. if (!devp->hd_ireqfreq)
  384. return -EIO;
  385. spin_lock_irq(&hpet_lock);
  386. if (devp->hd_flags & HPET_IE) {
  387. spin_unlock_irq(&hpet_lock);
  388. return -EBUSY;
  389. }
  390. devp->hd_flags |= HPET_IE;
  391. if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
  392. devp->hd_flags |= HPET_SHARED_IRQ;
  393. spin_unlock_irq(&hpet_lock);
  394. irq = devp->hd_hdwirq;
  395. if (irq) {
  396. unsigned long irq_flags;
  397. if (devp->hd_flags & HPET_SHARED_IRQ) {
  398. /*
  399. * To prevent the interrupt handler from seeing an
  400. * unwanted interrupt status bit, program the timer
  401. * so that it will not fire in the near future ...
  402. */
  403. writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
  404. &timer->hpet_config);
  405. write_counter(read_counter(&hpet->hpet_mc),
  406. &timer->hpet_compare);
  407. /* ... and clear any left-over status. */
  408. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  409. writel(isr, &hpet->hpet_isr);
  410. }
  411. sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
  412. irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
  413. if (request_irq(irq, hpet_interrupt, irq_flags,
  414. devp->hd_name, (void *)devp)) {
  415. printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
  416. irq = 0;
  417. }
  418. }
  419. if (irq == 0) {
  420. spin_lock_irq(&hpet_lock);
  421. devp->hd_flags ^= HPET_IE;
  422. spin_unlock_irq(&hpet_lock);
  423. return -EIO;
  424. }
  425. devp->hd_irq = irq;
  426. t = devp->hd_ireqfreq;
  427. v = readq(&timer->hpet_config);
  428. /* 64-bit comparators are not yet supported through the ioctls,
  429. * so force this into 32-bit mode if it supports both modes
  430. */
  431. g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
  432. if (devp->hd_flags & HPET_PERIODIC) {
  433. g |= Tn_TYPE_CNF_MASK;
  434. v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
  435. writeq(v, &timer->hpet_config);
  436. local_irq_save(flags);
  437. /*
  438. * NOTE: First we modify the hidden accumulator
  439. * register supported by periodic-capable comparators.
  440. * We never want to modify the (single) counter; that
  441. * would affect all the comparators. The value written
  442. * is the counter value when the first interrupt is due.
  443. */
  444. m = read_counter(&hpet->hpet_mc);
  445. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  446. /*
  447. * Then we modify the comparator, indicating the period
  448. * for subsequent interrupt.
  449. */
  450. write_counter(t, &timer->hpet_compare);
  451. } else {
  452. local_irq_save(flags);
  453. m = read_counter(&hpet->hpet_mc);
  454. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  455. }
  456. if (devp->hd_flags & HPET_SHARED_IRQ) {
  457. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  458. writel(isr, &hpet->hpet_isr);
  459. }
  460. writeq(g, &timer->hpet_config);
  461. local_irq_restore(flags);
  462. return 0;
  463. }
  464. /* converts Hz to number of timer ticks */
  465. static inline unsigned long hpet_time_div(struct hpets *hpets,
  466. unsigned long dis)
  467. {
  468. unsigned long long m;
  469. m = hpets->hp_tick_freq + (dis >> 1);
  470. do_div(m, dis);
  471. return (unsigned long)m;
  472. }
  473. static int
  474. hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
  475. struct hpet_info *info)
  476. {
  477. struct hpet_timer __iomem *timer;
  478. struct hpet __iomem *hpet;
  479. struct hpets *hpetp;
  480. int err;
  481. unsigned long v;
  482. switch (cmd) {
  483. case HPET_IE_OFF:
  484. case HPET_INFO:
  485. case HPET_EPI:
  486. case HPET_DPI:
  487. case HPET_IRQFREQ:
  488. timer = devp->hd_timer;
  489. hpet = devp->hd_hpet;
  490. hpetp = devp->hd_hpets;
  491. break;
  492. case HPET_IE_ON:
  493. return hpet_ioctl_ieon(devp);
  494. default:
  495. return -EINVAL;
  496. }
  497. err = 0;
  498. switch (cmd) {
  499. case HPET_IE_OFF:
  500. if ((devp->hd_flags & HPET_IE) == 0)
  501. break;
  502. v = readq(&timer->hpet_config);
  503. v &= ~Tn_INT_ENB_CNF_MASK;
  504. writeq(v, &timer->hpet_config);
  505. if (devp->hd_irq) {
  506. free_irq(devp->hd_irq, devp);
  507. devp->hd_irq = 0;
  508. }
  509. devp->hd_flags ^= HPET_IE;
  510. break;
  511. case HPET_INFO:
  512. {
  513. memset(info, 0, sizeof(*info));
  514. if (devp->hd_ireqfreq)
  515. info->hi_ireqfreq =
  516. hpet_time_div(hpetp, devp->hd_ireqfreq);
  517. info->hi_flags =
  518. readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
  519. info->hi_hpet = hpetp->hp_which;
  520. info->hi_timer = devp - hpetp->hp_dev;
  521. break;
  522. }
  523. case HPET_EPI:
  524. v = readq(&timer->hpet_config);
  525. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  526. err = -ENXIO;
  527. break;
  528. }
  529. devp->hd_flags |= HPET_PERIODIC;
  530. break;
  531. case HPET_DPI:
  532. v = readq(&timer->hpet_config);
  533. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  534. err = -ENXIO;
  535. break;
  536. }
  537. if (devp->hd_flags & HPET_PERIODIC &&
  538. readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  539. v = readq(&timer->hpet_config);
  540. v ^= Tn_TYPE_CNF_MASK;
  541. writeq(v, &timer->hpet_config);
  542. }
  543. devp->hd_flags &= ~HPET_PERIODIC;
  544. break;
  545. case HPET_IRQFREQ:
  546. if ((arg > hpet_max_freq) &&
  547. !capable(CAP_SYS_RESOURCE)) {
  548. err = -EACCES;
  549. break;
  550. }
  551. if (!arg) {
  552. err = -EINVAL;
  553. break;
  554. }
  555. devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
  556. }
  557. return err;
  558. }
  559. static long
  560. hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  561. {
  562. struct hpet_info info;
  563. int err;
  564. mutex_lock(&hpet_mutex);
  565. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  566. mutex_unlock(&hpet_mutex);
  567. if ((cmd == HPET_INFO) && !err &&
  568. (copy_to_user((void __user *)arg, &info, sizeof(info))))
  569. err = -EFAULT;
  570. return err;
  571. }
  572. #ifdef CONFIG_COMPAT
  573. struct compat_hpet_info {
  574. compat_ulong_t hi_ireqfreq; /* Hz */
  575. compat_ulong_t hi_flags; /* information */
  576. unsigned short hi_hpet;
  577. unsigned short hi_timer;
  578. };
  579. static long
  580. hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  581. {
  582. struct hpet_info info;
  583. int err;
  584. mutex_lock(&hpet_mutex);
  585. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  586. mutex_unlock(&hpet_mutex);
  587. if ((cmd == HPET_INFO) && !err) {
  588. struct compat_hpet_info __user *u = compat_ptr(arg);
  589. if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
  590. put_user(info.hi_flags, &u->hi_flags) ||
  591. put_user(info.hi_hpet, &u->hi_hpet) ||
  592. put_user(info.hi_timer, &u->hi_timer))
  593. err = -EFAULT;
  594. }
  595. return err;
  596. }
  597. #endif
  598. static const struct file_operations hpet_fops = {
  599. .owner = THIS_MODULE,
  600. .llseek = no_llseek,
  601. .read = hpet_read,
  602. .poll = hpet_poll,
  603. .unlocked_ioctl = hpet_ioctl,
  604. #ifdef CONFIG_COMPAT
  605. .compat_ioctl = hpet_compat_ioctl,
  606. #endif
  607. .open = hpet_open,
  608. .release = hpet_release,
  609. .fasync = hpet_fasync,
  610. .mmap = hpet_mmap,
  611. };
  612. static int hpet_is_known(struct hpet_data *hdp)
  613. {
  614. struct hpets *hpetp;
  615. for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
  616. if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
  617. return 1;
  618. return 0;
  619. }
  620. static struct ctl_table hpet_table[] = {
  621. {
  622. .procname = "max-user-freq",
  623. .data = &hpet_max_freq,
  624. .maxlen = sizeof(int),
  625. .mode = 0644,
  626. .proc_handler = proc_dointvec,
  627. },
  628. {}
  629. };
  630. static struct ctl_table hpet_root[] = {
  631. {
  632. .procname = "hpet",
  633. .maxlen = 0,
  634. .mode = 0555,
  635. .child = hpet_table,
  636. },
  637. {}
  638. };
  639. static struct ctl_table dev_root[] = {
  640. {
  641. .procname = "dev",
  642. .maxlen = 0,
  643. .mode = 0555,
  644. .child = hpet_root,
  645. },
  646. {}
  647. };
  648. static struct ctl_table_header *sysctl_header;
  649. /*
  650. * Adjustment for when arming the timer with
  651. * initial conditions. That is, main counter
  652. * ticks expired before interrupts are enabled.
  653. */
  654. #define TICK_CALIBRATE (1000UL)
  655. static unsigned long __hpet_calibrate(struct hpets *hpetp)
  656. {
  657. struct hpet_timer __iomem *timer = NULL;
  658. unsigned long t, m, count, i, flags, start;
  659. struct hpet_dev *devp;
  660. int j;
  661. struct hpet __iomem *hpet;
  662. for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
  663. if ((devp->hd_flags & HPET_OPEN) == 0) {
  664. timer = devp->hd_timer;
  665. break;
  666. }
  667. if (!timer)
  668. return 0;
  669. hpet = hpetp->hp_hpet;
  670. t = read_counter(&timer->hpet_compare);
  671. i = 0;
  672. count = hpet_time_div(hpetp, TICK_CALIBRATE);
  673. local_irq_save(flags);
  674. start = read_counter(&hpet->hpet_mc);
  675. do {
  676. m = read_counter(&hpet->hpet_mc);
  677. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  678. } while (i++, (m - start) < count);
  679. local_irq_restore(flags);
  680. return (m - start) / i;
  681. }
  682. static unsigned long hpet_calibrate(struct hpets *hpetp)
  683. {
  684. unsigned long ret = ~0UL;
  685. unsigned long tmp;
  686. /*
  687. * Try to calibrate until return value becomes stable small value.
  688. * If SMI interruption occurs in calibration loop, the return value
  689. * will be big. This avoids its impact.
  690. */
  691. for ( ; ; ) {
  692. tmp = __hpet_calibrate(hpetp);
  693. if (ret <= tmp)
  694. break;
  695. ret = tmp;
  696. }
  697. return ret;
  698. }
  699. int hpet_alloc(struct hpet_data *hdp)
  700. {
  701. u64 cap, mcfg;
  702. struct hpet_dev *devp;
  703. u32 i, ntimer;
  704. struct hpets *hpetp;
  705. size_t siz;
  706. struct hpet __iomem *hpet;
  707. static struct hpets *last;
  708. unsigned long period;
  709. unsigned long long temp;
  710. u32 remainder;
  711. /*
  712. * hpet_alloc can be called by platform dependent code.
  713. * If platform dependent code has allocated the hpet that
  714. * ACPI has also reported, then we catch it here.
  715. */
  716. if (hpet_is_known(hdp)) {
  717. printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
  718. __func__);
  719. return 0;
  720. }
  721. siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
  722. sizeof(struct hpet_dev));
  723. hpetp = kzalloc(siz, GFP_KERNEL);
  724. if (!hpetp)
  725. return -ENOMEM;
  726. hpetp->hp_which = hpet_nhpet++;
  727. hpetp->hp_hpet = hdp->hd_address;
  728. hpetp->hp_hpet_phys = hdp->hd_phys_address;
  729. hpetp->hp_ntimer = hdp->hd_nirqs;
  730. for (i = 0; i < hdp->hd_nirqs; i++)
  731. hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
  732. hpet = hpetp->hp_hpet;
  733. cap = readq(&hpet->hpet_cap);
  734. ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
  735. if (hpetp->hp_ntimer != ntimer) {
  736. printk(KERN_WARNING "hpet: number irqs doesn't agree"
  737. " with number of timers\n");
  738. kfree(hpetp);
  739. return -ENODEV;
  740. }
  741. if (last)
  742. last->hp_next = hpetp;
  743. else
  744. hpets = hpetp;
  745. last = hpetp;
  746. period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
  747. HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
  748. temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
  749. temp += period >> 1; /* round */
  750. do_div(temp, period);
  751. hpetp->hp_tick_freq = temp; /* ticks per second */
  752. printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
  753. hpetp->hp_which, hdp->hd_phys_address,
  754. hpetp->hp_ntimer > 1 ? "s" : "");
  755. for (i = 0; i < hpetp->hp_ntimer; i++)
  756. printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
  757. printk(KERN_CONT "\n");
  758. temp = hpetp->hp_tick_freq;
  759. remainder = do_div(temp, 1000000);
  760. printk(KERN_INFO
  761. "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
  762. hpetp->hp_which, hpetp->hp_ntimer,
  763. cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
  764. (unsigned) temp, remainder);
  765. mcfg = readq(&hpet->hpet_config);
  766. if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
  767. write_counter(0L, &hpet->hpet_mc);
  768. mcfg |= HPET_ENABLE_CNF_MASK;
  769. writeq(mcfg, &hpet->hpet_config);
  770. }
  771. for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
  772. struct hpet_timer __iomem *timer;
  773. timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
  774. devp->hd_hpets = hpetp;
  775. devp->hd_hpet = hpet;
  776. devp->hd_timer = timer;
  777. /*
  778. * If the timer was reserved by platform code,
  779. * then make timer unavailable for opens.
  780. */
  781. if (hdp->hd_state & (1 << i)) {
  782. devp->hd_flags = HPET_OPEN;
  783. continue;
  784. }
  785. init_waitqueue_head(&devp->hd_waitqueue);
  786. }
  787. hpetp->hp_delta = hpet_calibrate(hpetp);
  788. /* This clocksource driver currently only works on ia64 */
  789. #ifdef CONFIG_IA64
  790. if (!hpet_clocksource) {
  791. hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
  792. clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
  793. clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
  794. hpetp->hp_clocksource = &clocksource_hpet;
  795. hpet_clocksource = &clocksource_hpet;
  796. }
  797. #endif
  798. return 0;
  799. }
  800. static acpi_status hpet_resources(struct acpi_resource *res, void *data)
  801. {
  802. struct hpet_data *hdp;
  803. acpi_status status;
  804. struct acpi_resource_address64 addr;
  805. hdp = data;
  806. status = acpi_resource_to_address64(res, &addr);
  807. if (ACPI_SUCCESS(status)) {
  808. hdp->hd_phys_address = addr.address.minimum;
  809. hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
  810. if (hpet_is_known(hdp)) {
  811. iounmap(hdp->hd_address);
  812. return AE_ALREADY_EXISTS;
  813. }
  814. } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
  815. struct acpi_resource_fixed_memory32 *fixmem32;
  816. fixmem32 = &res->data.fixed_memory32;
  817. hdp->hd_phys_address = fixmem32->address;
  818. hdp->hd_address = ioremap(fixmem32->address,
  819. HPET_RANGE_SIZE);
  820. if (hpet_is_known(hdp)) {
  821. iounmap(hdp->hd_address);
  822. return AE_ALREADY_EXISTS;
  823. }
  824. } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
  825. struct acpi_resource_extended_irq *irqp;
  826. int i, irq;
  827. irqp = &res->data.extended_irq;
  828. for (i = 0; i < irqp->interrupt_count; i++) {
  829. if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
  830. break;
  831. irq = acpi_register_gsi(NULL, irqp->interrupts[i],
  832. irqp->triggering, irqp->polarity);
  833. if (irq < 0)
  834. return AE_ERROR;
  835. hdp->hd_irq[hdp->hd_nirqs] = irq;
  836. hdp->hd_nirqs++;
  837. }
  838. }
  839. return AE_OK;
  840. }
  841. static int hpet_acpi_add(struct acpi_device *device)
  842. {
  843. acpi_status result;
  844. struct hpet_data data;
  845. memset(&data, 0, sizeof(data));
  846. result =
  847. acpi_walk_resources(device->handle, METHOD_NAME__CRS,
  848. hpet_resources, &data);
  849. if (ACPI_FAILURE(result))
  850. return -ENODEV;
  851. if (!data.hd_address || !data.hd_nirqs) {
  852. if (data.hd_address)
  853. iounmap(data.hd_address);
  854. printk("%s: no address or irqs in _CRS\n", __func__);
  855. return -ENODEV;
  856. }
  857. return hpet_alloc(&data);
  858. }
  859. static int hpet_acpi_remove(struct acpi_device *device)
  860. {
  861. /* XXX need to unregister clocksource, dealloc mem, etc */
  862. return -EINVAL;
  863. }
  864. static const struct acpi_device_id hpet_device_ids[] = {
  865. {"PNP0103", 0},
  866. {"", 0},
  867. };
  868. MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
  869. static struct acpi_driver hpet_acpi_driver = {
  870. .name = "hpet",
  871. .ids = hpet_device_ids,
  872. .ops = {
  873. .add = hpet_acpi_add,
  874. .remove = hpet_acpi_remove,
  875. },
  876. };
  877. static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
  878. static int __init hpet_init(void)
  879. {
  880. int result;
  881. result = misc_register(&hpet_misc);
  882. if (result < 0)
  883. return -ENODEV;
  884. sysctl_header = register_sysctl_table(dev_root);
  885. result = acpi_bus_register_driver(&hpet_acpi_driver);
  886. if (result < 0) {
  887. if (sysctl_header)
  888. unregister_sysctl_table(sysctl_header);
  889. misc_deregister(&hpet_misc);
  890. return result;
  891. }
  892. return 0;
  893. }
  894. static void __exit hpet_exit(void)
  895. {
  896. acpi_bus_unregister_driver(&hpet_acpi_driver);
  897. if (sysctl_header)
  898. unregister_sysctl_table(sysctl_header);
  899. misc_deregister(&hpet_misc);
  900. return;
  901. }
  902. module_init(hpet_init);
  903. module_exit(hpet_exit);
  904. MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
  905. MODULE_LICENSE("GPL");