Kconfig 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134
  1. #
  2. # Bus Devices
  3. #
  4. menu "Bus devices"
  5. config ARM_CCI
  6. bool
  7. config ARM_CCI_PMU
  8. bool
  9. select ARM_CCI
  10. config ARM_CCI400_COMMON
  11. bool
  12. select ARM_CCI
  13. config ARM_CCI400_PMU
  14. bool "ARM CCI400 PMU support"
  15. depends on (ARM && CPU_V7) || ARM64
  16. depends on PERF_EVENTS
  17. select ARM_CCI400_COMMON
  18. select ARM_CCI_PMU
  19. help
  20. Support for PMU events monitoring on the ARM CCI-400 (cache coherent
  21. interconnect). CCI-400 supports counting events related to the
  22. connected slave/master interfaces.
  23. config ARM_CCI400_PORT_CTRL
  24. bool
  25. depends on ARM && OF && CPU_V7
  26. select ARM_CCI400_COMMON
  27. help
  28. Low level power management driver for CCI400 cache coherent
  29. interconnect for ARM platforms.
  30. config ARM_CCI500_PMU
  31. bool "ARM CCI500 PMU support"
  32. default y
  33. depends on (ARM && CPU_V7) || ARM64
  34. depends on PERF_EVENTS
  35. select ARM_CCI_PMU
  36. help
  37. Support for PMU events monitoring on the ARM CCI-500 cache coherent
  38. interconnect. CCI-500 provides 8 independent event counters, which
  39. can count events pertaining to the slave/master interfaces as well
  40. as the internal events to the CCI.
  41. If unsure, say Y
  42. config ARM_CCN
  43. bool "ARM CCN driver support"
  44. depends on ARM || ARM64
  45. depends on PERF_EVENTS
  46. help
  47. PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
  48. interconnect.
  49. config BRCMSTB_GISB_ARB
  50. bool "Broadcom STB GISB bus arbiter"
  51. depends on ARM || MIPS
  52. help
  53. Driver for the Broadcom Set Top Box System-on-a-chip internal bus
  54. arbiter. This driver provides timeout and target abort error handling
  55. and internal bus master decoding.
  56. config IMX_WEIM
  57. bool "Freescale EIM DRIVER"
  58. depends on ARCH_MXC
  59. help
  60. Driver for i.MX WEIM controller.
  61. The WEIM(Wireless External Interface Module) works like a bus.
  62. You can attach many different devices on it, such as NOR, onenand.
  63. config MIPS_CDMM
  64. bool "MIPS Common Device Memory Map (CDMM) Driver"
  65. depends on CPU_MIPSR2
  66. help
  67. Driver needed for the MIPS Common Device Memory Map bus in MIPS
  68. cores. This bus is for per-CPU tightly coupled devices such as the
  69. Fast Debug Channel (FDC).
  70. For this to work, either your bootloader needs to enable the CDMM
  71. region at an unused physical address on the boot CPU, or else your
  72. platform code needs to implement mips_cdmm_phys_base() (see
  73. asm/cdmm.h).
  74. config MVEBU_MBUS
  75. bool
  76. depends on PLAT_ORION
  77. help
  78. Driver needed for the MBus configuration on Marvell EBU SoCs
  79. (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
  80. config OMAP_INTERCONNECT
  81. tristate "OMAP INTERCONNECT DRIVER"
  82. depends on ARCH_OMAP2PLUS
  83. help
  84. Driver to enable OMAP interconnect error handling driver.
  85. config OMAP_OCP2SCP
  86. tristate "OMAP OCP2SCP DRIVER"
  87. depends on ARCH_OMAP2PLUS
  88. help
  89. Driver to enable ocp2scp module which transforms ocp interface
  90. protocol to scp protocol. In OMAP4, USB PHY is connected via
  91. OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
  92. OCP2SCP.
  93. config SIMPLE_PM_BUS
  94. bool "Simple Power-Managed Bus Driver"
  95. depends on OF && PM
  96. depends on ARCH_SHMOBILE || COMPILE_TEST
  97. help
  98. Driver for transparent busses that don't need a real driver, but
  99. where the bus controller is part of a PM domain, or under the control
  100. of a functional clock, and thus relies on runtime PM for managing
  101. this PM domain and/or clock.
  102. An example of such a bus controller is the Renesas Bus State
  103. Controller (BSC, sometimes called "LBSC within Bus Bridge", or
  104. "External Bus Interface") as found on several Renesas ARM SoCs.
  105. config VEXPRESS_CONFIG
  106. bool "Versatile Express configuration bus"
  107. default y if ARCH_VEXPRESS
  108. depends on ARM || ARM64
  109. depends on OF
  110. select REGMAP
  111. help
  112. Platform configuration infrastructure for the ARM Ltd.
  113. Versatile Express.
  114. endmenu