nfit.c 42 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/list_sort.h>
  14. #include <linux/libnvdimm.h>
  15. #include <linux/module.h>
  16. #include <linux/mutex.h>
  17. #include <linux/ndctl.h>
  18. #include <linux/list.h>
  19. #include <linux/acpi.h>
  20. #include <linux/sort.h>
  21. #include <linux/io.h>
  22. #include "nfit.h"
  23. /*
  24. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  25. * irrelevant.
  26. */
  27. #include <asm-generic/io-64-nonatomic-hi-lo.h>
  28. static bool force_enable_dimms;
  29. module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
  30. MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
  31. static u8 nfit_uuid[NFIT_UUID_MAX][16];
  32. const u8 *to_nfit_uuid(enum nfit_uuids id)
  33. {
  34. return nfit_uuid[id];
  35. }
  36. EXPORT_SYMBOL(to_nfit_uuid);
  37. static struct acpi_nfit_desc *to_acpi_nfit_desc(
  38. struct nvdimm_bus_descriptor *nd_desc)
  39. {
  40. return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
  41. }
  42. static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
  43. {
  44. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  45. /*
  46. * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
  47. * acpi_device.
  48. */
  49. if (!nd_desc->provider_name
  50. || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
  51. return NULL;
  52. return to_acpi_device(acpi_desc->dev);
  53. }
  54. static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc,
  55. struct nvdimm *nvdimm, unsigned int cmd, void *buf,
  56. unsigned int buf_len)
  57. {
  58. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  59. const struct nd_cmd_desc *desc = NULL;
  60. union acpi_object in_obj, in_buf, *out_obj;
  61. struct device *dev = acpi_desc->dev;
  62. const char *cmd_name, *dimm_name;
  63. unsigned long dsm_mask;
  64. acpi_handle handle;
  65. const u8 *uuid;
  66. u32 offset;
  67. int rc, i;
  68. if (nvdimm) {
  69. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  70. struct acpi_device *adev = nfit_mem->adev;
  71. if (!adev)
  72. return -ENOTTY;
  73. dimm_name = nvdimm_name(nvdimm);
  74. cmd_name = nvdimm_cmd_name(cmd);
  75. dsm_mask = nfit_mem->dsm_mask;
  76. desc = nd_cmd_dimm_desc(cmd);
  77. uuid = to_nfit_uuid(NFIT_DEV_DIMM);
  78. handle = adev->handle;
  79. } else {
  80. struct acpi_device *adev = to_acpi_dev(acpi_desc);
  81. cmd_name = nvdimm_bus_cmd_name(cmd);
  82. dsm_mask = nd_desc->dsm_mask;
  83. desc = nd_cmd_bus_desc(cmd);
  84. uuid = to_nfit_uuid(NFIT_DEV_BUS);
  85. handle = adev->handle;
  86. dimm_name = "bus";
  87. }
  88. if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
  89. return -ENOTTY;
  90. if (!test_bit(cmd, &dsm_mask))
  91. return -ENOTTY;
  92. in_obj.type = ACPI_TYPE_PACKAGE;
  93. in_obj.package.count = 1;
  94. in_obj.package.elements = &in_buf;
  95. in_buf.type = ACPI_TYPE_BUFFER;
  96. in_buf.buffer.pointer = buf;
  97. in_buf.buffer.length = 0;
  98. /* libnvdimm has already validated the input envelope */
  99. for (i = 0; i < desc->in_num; i++)
  100. in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
  101. i, buf);
  102. if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
  103. dev_dbg(dev, "%s:%s cmd: %s input length: %d\n", __func__,
  104. dimm_name, cmd_name, in_buf.buffer.length);
  105. print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
  106. 4, in_buf.buffer.pointer, min_t(u32, 128,
  107. in_buf.buffer.length), true);
  108. }
  109. out_obj = acpi_evaluate_dsm(handle, uuid, 1, cmd, &in_obj);
  110. if (!out_obj) {
  111. dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
  112. cmd_name);
  113. return -EINVAL;
  114. }
  115. if (out_obj->package.type != ACPI_TYPE_BUFFER) {
  116. dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
  117. __func__, dimm_name, cmd_name, out_obj->type);
  118. rc = -EINVAL;
  119. goto out;
  120. }
  121. if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
  122. dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__,
  123. dimm_name, cmd_name, out_obj->buffer.length);
  124. print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
  125. 4, out_obj->buffer.pointer, min_t(u32, 128,
  126. out_obj->buffer.length), true);
  127. }
  128. for (i = 0, offset = 0; i < desc->out_num; i++) {
  129. u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
  130. (u32 *) out_obj->buffer.pointer);
  131. if (offset + out_size > out_obj->buffer.length) {
  132. dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
  133. __func__, dimm_name, cmd_name, i);
  134. break;
  135. }
  136. if (in_buf.buffer.length + offset + out_size > buf_len) {
  137. dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
  138. __func__, dimm_name, cmd_name, i);
  139. rc = -ENXIO;
  140. goto out;
  141. }
  142. memcpy(buf + in_buf.buffer.length + offset,
  143. out_obj->buffer.pointer + offset, out_size);
  144. offset += out_size;
  145. }
  146. if (offset + in_buf.buffer.length < buf_len) {
  147. if (i >= 1) {
  148. /*
  149. * status valid, return the number of bytes left
  150. * unfilled in the output buffer
  151. */
  152. rc = buf_len - offset - in_buf.buffer.length;
  153. } else {
  154. dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
  155. __func__, dimm_name, cmd_name, buf_len,
  156. offset);
  157. rc = -ENXIO;
  158. }
  159. } else
  160. rc = 0;
  161. out:
  162. ACPI_FREE(out_obj);
  163. return rc;
  164. }
  165. static const char *spa_type_name(u16 type)
  166. {
  167. static const char *to_name[] = {
  168. [NFIT_SPA_VOLATILE] = "volatile",
  169. [NFIT_SPA_PM] = "pmem",
  170. [NFIT_SPA_DCR] = "dimm-control-region",
  171. [NFIT_SPA_BDW] = "block-data-window",
  172. [NFIT_SPA_VDISK] = "volatile-disk",
  173. [NFIT_SPA_VCD] = "volatile-cd",
  174. [NFIT_SPA_PDISK] = "persistent-disk",
  175. [NFIT_SPA_PCD] = "persistent-cd",
  176. };
  177. if (type > NFIT_SPA_PCD)
  178. return "unknown";
  179. return to_name[type];
  180. }
  181. static int nfit_spa_type(struct acpi_nfit_system_address *spa)
  182. {
  183. int i;
  184. for (i = 0; i < NFIT_UUID_MAX; i++)
  185. if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
  186. return i;
  187. return -1;
  188. }
  189. static bool add_spa(struct acpi_nfit_desc *acpi_desc,
  190. struct acpi_nfit_system_address *spa)
  191. {
  192. struct device *dev = acpi_desc->dev;
  193. struct nfit_spa *nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa),
  194. GFP_KERNEL);
  195. if (!nfit_spa)
  196. return false;
  197. INIT_LIST_HEAD(&nfit_spa->list);
  198. nfit_spa->spa = spa;
  199. list_add_tail(&nfit_spa->list, &acpi_desc->spas);
  200. dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
  201. spa->range_index,
  202. spa_type_name(nfit_spa_type(spa)));
  203. return true;
  204. }
  205. static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
  206. struct acpi_nfit_memory_map *memdev)
  207. {
  208. struct device *dev = acpi_desc->dev;
  209. struct nfit_memdev *nfit_memdev = devm_kzalloc(dev,
  210. sizeof(*nfit_memdev), GFP_KERNEL);
  211. if (!nfit_memdev)
  212. return false;
  213. INIT_LIST_HEAD(&nfit_memdev->list);
  214. nfit_memdev->memdev = memdev;
  215. list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  216. dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n",
  217. __func__, memdev->device_handle, memdev->range_index,
  218. memdev->region_index);
  219. return true;
  220. }
  221. static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
  222. struct acpi_nfit_control_region *dcr)
  223. {
  224. struct device *dev = acpi_desc->dev;
  225. struct nfit_dcr *nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr),
  226. GFP_KERNEL);
  227. if (!nfit_dcr)
  228. return false;
  229. INIT_LIST_HEAD(&nfit_dcr->list);
  230. nfit_dcr->dcr = dcr;
  231. list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  232. dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
  233. dcr->region_index, dcr->windows);
  234. return true;
  235. }
  236. static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
  237. struct acpi_nfit_data_region *bdw)
  238. {
  239. struct device *dev = acpi_desc->dev;
  240. struct nfit_bdw *nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw),
  241. GFP_KERNEL);
  242. if (!nfit_bdw)
  243. return false;
  244. INIT_LIST_HEAD(&nfit_bdw->list);
  245. nfit_bdw->bdw = bdw;
  246. list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
  247. dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
  248. bdw->region_index, bdw->windows);
  249. return true;
  250. }
  251. static bool add_idt(struct acpi_nfit_desc *acpi_desc,
  252. struct acpi_nfit_interleave *idt)
  253. {
  254. struct device *dev = acpi_desc->dev;
  255. struct nfit_idt *nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt),
  256. GFP_KERNEL);
  257. if (!nfit_idt)
  258. return false;
  259. INIT_LIST_HEAD(&nfit_idt->list);
  260. nfit_idt->idt = idt;
  261. list_add_tail(&nfit_idt->list, &acpi_desc->idts);
  262. dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
  263. idt->interleave_index, idt->line_count);
  264. return true;
  265. }
  266. static void *add_table(struct acpi_nfit_desc *acpi_desc, void *table,
  267. const void *end)
  268. {
  269. struct device *dev = acpi_desc->dev;
  270. struct acpi_nfit_header *hdr;
  271. void *err = ERR_PTR(-ENOMEM);
  272. if (table >= end)
  273. return NULL;
  274. hdr = table;
  275. switch (hdr->type) {
  276. case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
  277. if (!add_spa(acpi_desc, table))
  278. return err;
  279. break;
  280. case ACPI_NFIT_TYPE_MEMORY_MAP:
  281. if (!add_memdev(acpi_desc, table))
  282. return err;
  283. break;
  284. case ACPI_NFIT_TYPE_CONTROL_REGION:
  285. if (!add_dcr(acpi_desc, table))
  286. return err;
  287. break;
  288. case ACPI_NFIT_TYPE_DATA_REGION:
  289. if (!add_bdw(acpi_desc, table))
  290. return err;
  291. break;
  292. case ACPI_NFIT_TYPE_INTERLEAVE:
  293. if (!add_idt(acpi_desc, table))
  294. return err;
  295. break;
  296. case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
  297. dev_dbg(dev, "%s: flush\n", __func__);
  298. break;
  299. case ACPI_NFIT_TYPE_SMBIOS:
  300. dev_dbg(dev, "%s: smbios\n", __func__);
  301. break;
  302. default:
  303. dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
  304. break;
  305. }
  306. return table + hdr->length;
  307. }
  308. static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
  309. struct nfit_mem *nfit_mem)
  310. {
  311. u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  312. u16 dcr = nfit_mem->dcr->region_index;
  313. struct nfit_spa *nfit_spa;
  314. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  315. u16 range_index = nfit_spa->spa->range_index;
  316. int type = nfit_spa_type(nfit_spa->spa);
  317. struct nfit_memdev *nfit_memdev;
  318. if (type != NFIT_SPA_BDW)
  319. continue;
  320. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  321. if (nfit_memdev->memdev->range_index != range_index)
  322. continue;
  323. if (nfit_memdev->memdev->device_handle != device_handle)
  324. continue;
  325. if (nfit_memdev->memdev->region_index != dcr)
  326. continue;
  327. nfit_mem->spa_bdw = nfit_spa->spa;
  328. return;
  329. }
  330. }
  331. dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
  332. nfit_mem->spa_dcr->range_index);
  333. nfit_mem->bdw = NULL;
  334. }
  335. static int nfit_mem_add(struct acpi_nfit_desc *acpi_desc,
  336. struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
  337. {
  338. u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
  339. struct nfit_memdev *nfit_memdev;
  340. struct nfit_dcr *nfit_dcr;
  341. struct nfit_bdw *nfit_bdw;
  342. struct nfit_idt *nfit_idt;
  343. u16 idt_idx, range_index;
  344. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  345. if (nfit_dcr->dcr->region_index != dcr)
  346. continue;
  347. nfit_mem->dcr = nfit_dcr->dcr;
  348. break;
  349. }
  350. if (!nfit_mem->dcr) {
  351. dev_dbg(acpi_desc->dev, "SPA %d missing:%s%s\n",
  352. spa->range_index, __to_nfit_memdev(nfit_mem)
  353. ? "" : " MEMDEV", nfit_mem->dcr ? "" : " DCR");
  354. return -ENODEV;
  355. }
  356. /*
  357. * We've found enough to create an nvdimm, optionally
  358. * find an associated BDW
  359. */
  360. list_add(&nfit_mem->list, &acpi_desc->dimms);
  361. list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
  362. if (nfit_bdw->bdw->region_index != dcr)
  363. continue;
  364. nfit_mem->bdw = nfit_bdw->bdw;
  365. break;
  366. }
  367. if (!nfit_mem->bdw)
  368. return 0;
  369. nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
  370. if (!nfit_mem->spa_bdw)
  371. return 0;
  372. range_index = nfit_mem->spa_bdw->range_index;
  373. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  374. if (nfit_memdev->memdev->range_index != range_index ||
  375. nfit_memdev->memdev->region_index != dcr)
  376. continue;
  377. nfit_mem->memdev_bdw = nfit_memdev->memdev;
  378. idt_idx = nfit_memdev->memdev->interleave_index;
  379. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  380. if (nfit_idt->idt->interleave_index != idt_idx)
  381. continue;
  382. nfit_mem->idt_bdw = nfit_idt->idt;
  383. break;
  384. }
  385. break;
  386. }
  387. return 0;
  388. }
  389. static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc,
  390. struct acpi_nfit_system_address *spa)
  391. {
  392. struct nfit_mem *nfit_mem, *found;
  393. struct nfit_memdev *nfit_memdev;
  394. int type = nfit_spa_type(spa);
  395. u16 dcr;
  396. switch (type) {
  397. case NFIT_SPA_DCR:
  398. case NFIT_SPA_PM:
  399. break;
  400. default:
  401. return 0;
  402. }
  403. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  404. int rc;
  405. if (nfit_memdev->memdev->range_index != spa->range_index)
  406. continue;
  407. found = NULL;
  408. dcr = nfit_memdev->memdev->region_index;
  409. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  410. if (__to_nfit_memdev(nfit_mem)->region_index == dcr) {
  411. found = nfit_mem;
  412. break;
  413. }
  414. if (found)
  415. nfit_mem = found;
  416. else {
  417. nfit_mem = devm_kzalloc(acpi_desc->dev,
  418. sizeof(*nfit_mem), GFP_KERNEL);
  419. if (!nfit_mem)
  420. return -ENOMEM;
  421. INIT_LIST_HEAD(&nfit_mem->list);
  422. }
  423. if (type == NFIT_SPA_DCR) {
  424. struct nfit_idt *nfit_idt;
  425. u16 idt_idx;
  426. /* multiple dimms may share a SPA when interleaved */
  427. nfit_mem->spa_dcr = spa;
  428. nfit_mem->memdev_dcr = nfit_memdev->memdev;
  429. idt_idx = nfit_memdev->memdev->interleave_index;
  430. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  431. if (nfit_idt->idt->interleave_index != idt_idx)
  432. continue;
  433. nfit_mem->idt_dcr = nfit_idt->idt;
  434. break;
  435. }
  436. } else {
  437. /*
  438. * A single dimm may belong to multiple SPA-PM
  439. * ranges, record at least one in addition to
  440. * any SPA-DCR range.
  441. */
  442. nfit_mem->memdev_pmem = nfit_memdev->memdev;
  443. }
  444. if (found)
  445. continue;
  446. rc = nfit_mem_add(acpi_desc, nfit_mem, spa);
  447. if (rc)
  448. return rc;
  449. }
  450. return 0;
  451. }
  452. static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
  453. {
  454. struct nfit_mem *a = container_of(_a, typeof(*a), list);
  455. struct nfit_mem *b = container_of(_b, typeof(*b), list);
  456. u32 handleA, handleB;
  457. handleA = __to_nfit_memdev(a)->device_handle;
  458. handleB = __to_nfit_memdev(b)->device_handle;
  459. if (handleA < handleB)
  460. return -1;
  461. else if (handleA > handleB)
  462. return 1;
  463. return 0;
  464. }
  465. static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
  466. {
  467. struct nfit_spa *nfit_spa;
  468. /*
  469. * For each SPA-DCR or SPA-PMEM address range find its
  470. * corresponding MEMDEV(s). From each MEMDEV find the
  471. * corresponding DCR. Then, if we're operating on a SPA-DCR,
  472. * try to find a SPA-BDW and a corresponding BDW that references
  473. * the DCR. Throw it all into an nfit_mem object. Note, that
  474. * BDWs are optional.
  475. */
  476. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  477. int rc;
  478. rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa);
  479. if (rc)
  480. return rc;
  481. }
  482. list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
  483. return 0;
  484. }
  485. static ssize_t revision_show(struct device *dev,
  486. struct device_attribute *attr, char *buf)
  487. {
  488. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  489. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  490. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  491. return sprintf(buf, "%d\n", acpi_desc->nfit->header.revision);
  492. }
  493. static DEVICE_ATTR_RO(revision);
  494. static struct attribute *acpi_nfit_attributes[] = {
  495. &dev_attr_revision.attr,
  496. NULL,
  497. };
  498. static struct attribute_group acpi_nfit_attribute_group = {
  499. .name = "nfit",
  500. .attrs = acpi_nfit_attributes,
  501. };
  502. const struct attribute_group *acpi_nfit_attribute_groups[] = {
  503. &nvdimm_bus_attribute_group,
  504. &acpi_nfit_attribute_group,
  505. NULL,
  506. };
  507. EXPORT_SYMBOL_GPL(acpi_nfit_attribute_groups);
  508. static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
  509. {
  510. struct nvdimm *nvdimm = to_nvdimm(dev);
  511. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  512. return __to_nfit_memdev(nfit_mem);
  513. }
  514. static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
  515. {
  516. struct nvdimm *nvdimm = to_nvdimm(dev);
  517. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  518. return nfit_mem->dcr;
  519. }
  520. static ssize_t handle_show(struct device *dev,
  521. struct device_attribute *attr, char *buf)
  522. {
  523. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  524. return sprintf(buf, "%#x\n", memdev->device_handle);
  525. }
  526. static DEVICE_ATTR_RO(handle);
  527. static ssize_t phys_id_show(struct device *dev,
  528. struct device_attribute *attr, char *buf)
  529. {
  530. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  531. return sprintf(buf, "%#x\n", memdev->physical_id);
  532. }
  533. static DEVICE_ATTR_RO(phys_id);
  534. static ssize_t vendor_show(struct device *dev,
  535. struct device_attribute *attr, char *buf)
  536. {
  537. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  538. return sprintf(buf, "%#x\n", dcr->vendor_id);
  539. }
  540. static DEVICE_ATTR_RO(vendor);
  541. static ssize_t rev_id_show(struct device *dev,
  542. struct device_attribute *attr, char *buf)
  543. {
  544. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  545. return sprintf(buf, "%#x\n", dcr->revision_id);
  546. }
  547. static DEVICE_ATTR_RO(rev_id);
  548. static ssize_t device_show(struct device *dev,
  549. struct device_attribute *attr, char *buf)
  550. {
  551. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  552. return sprintf(buf, "%#x\n", dcr->device_id);
  553. }
  554. static DEVICE_ATTR_RO(device);
  555. static ssize_t format_show(struct device *dev,
  556. struct device_attribute *attr, char *buf)
  557. {
  558. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  559. return sprintf(buf, "%#x\n", dcr->code);
  560. }
  561. static DEVICE_ATTR_RO(format);
  562. static ssize_t serial_show(struct device *dev,
  563. struct device_attribute *attr, char *buf)
  564. {
  565. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  566. return sprintf(buf, "%#x\n", dcr->serial_number);
  567. }
  568. static DEVICE_ATTR_RO(serial);
  569. static ssize_t flags_show(struct device *dev,
  570. struct device_attribute *attr, char *buf)
  571. {
  572. u16 flags = to_nfit_memdev(dev)->flags;
  573. return sprintf(buf, "%s%s%s%s%s\n",
  574. flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save " : "",
  575. flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore " : "",
  576. flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush " : "",
  577. flags & ACPI_NFIT_MEM_ARMED ? "arm " : "",
  578. flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart " : "");
  579. }
  580. static DEVICE_ATTR_RO(flags);
  581. static struct attribute *acpi_nfit_dimm_attributes[] = {
  582. &dev_attr_handle.attr,
  583. &dev_attr_phys_id.attr,
  584. &dev_attr_vendor.attr,
  585. &dev_attr_device.attr,
  586. &dev_attr_format.attr,
  587. &dev_attr_serial.attr,
  588. &dev_attr_rev_id.attr,
  589. &dev_attr_flags.attr,
  590. NULL,
  591. };
  592. static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
  593. struct attribute *a, int n)
  594. {
  595. struct device *dev = container_of(kobj, struct device, kobj);
  596. if (to_nfit_dcr(dev))
  597. return a->mode;
  598. else
  599. return 0;
  600. }
  601. static struct attribute_group acpi_nfit_dimm_attribute_group = {
  602. .name = "nfit",
  603. .attrs = acpi_nfit_dimm_attributes,
  604. .is_visible = acpi_nfit_dimm_attr_visible,
  605. };
  606. static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
  607. &nvdimm_attribute_group,
  608. &nd_device_attribute_group,
  609. &acpi_nfit_dimm_attribute_group,
  610. NULL,
  611. };
  612. static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
  613. u32 device_handle)
  614. {
  615. struct nfit_mem *nfit_mem;
  616. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  617. if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
  618. return nfit_mem->nvdimm;
  619. return NULL;
  620. }
  621. static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
  622. struct nfit_mem *nfit_mem, u32 device_handle)
  623. {
  624. struct acpi_device *adev, *adev_dimm;
  625. struct device *dev = acpi_desc->dev;
  626. const u8 *uuid = to_nfit_uuid(NFIT_DEV_DIMM);
  627. unsigned long long sta;
  628. int i, rc = -ENODEV;
  629. acpi_status status;
  630. nfit_mem->dsm_mask = acpi_desc->dimm_dsm_force_en;
  631. adev = to_acpi_dev(acpi_desc);
  632. if (!adev)
  633. return 0;
  634. adev_dimm = acpi_find_child_device(adev, device_handle, false);
  635. nfit_mem->adev = adev_dimm;
  636. if (!adev_dimm) {
  637. dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
  638. device_handle);
  639. return force_enable_dimms ? 0 : -ENODEV;
  640. }
  641. status = acpi_evaluate_integer(adev_dimm->handle, "_STA", NULL, &sta);
  642. if (status == AE_NOT_FOUND) {
  643. dev_dbg(dev, "%s missing _STA, assuming enabled...\n",
  644. dev_name(&adev_dimm->dev));
  645. rc = 0;
  646. } else if (ACPI_FAILURE(status))
  647. dev_err(dev, "%s failed to retrieve_STA, disabling...\n",
  648. dev_name(&adev_dimm->dev));
  649. else if ((sta & ACPI_STA_DEVICE_ENABLED) == 0)
  650. dev_info(dev, "%s disabled by firmware\n",
  651. dev_name(&adev_dimm->dev));
  652. else
  653. rc = 0;
  654. for (i = ND_CMD_SMART; i <= ND_CMD_VENDOR; i++)
  655. if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
  656. set_bit(i, &nfit_mem->dsm_mask);
  657. return force_enable_dimms ? 0 : rc;
  658. }
  659. static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
  660. {
  661. struct nfit_mem *nfit_mem;
  662. int dimm_count = 0;
  663. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  664. struct nvdimm *nvdimm;
  665. unsigned long flags = 0;
  666. u32 device_handle;
  667. u16 mem_flags;
  668. int rc;
  669. device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  670. nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
  671. if (nvdimm) {
  672. /*
  673. * If for some reason we find multiple DCRs the
  674. * first one wins
  675. */
  676. dev_err(acpi_desc->dev, "duplicate DCR detected: %s\n",
  677. nvdimm_name(nvdimm));
  678. continue;
  679. }
  680. if (nfit_mem->bdw && nfit_mem->memdev_pmem)
  681. flags |= NDD_ALIASING;
  682. mem_flags = __to_nfit_memdev(nfit_mem)->flags;
  683. if (mem_flags & ACPI_NFIT_MEM_ARMED)
  684. flags |= NDD_UNARMED;
  685. rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
  686. if (rc)
  687. continue;
  688. nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
  689. acpi_nfit_dimm_attribute_groups,
  690. flags, &nfit_mem->dsm_mask);
  691. if (!nvdimm)
  692. return -ENOMEM;
  693. nfit_mem->nvdimm = nvdimm;
  694. dimm_count++;
  695. if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
  696. continue;
  697. dev_info(acpi_desc->dev, "%s: failed: %s%s%s%s\n",
  698. nvdimm_name(nvdimm),
  699. mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save " : "",
  700. mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore " : "",
  701. mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush " : "",
  702. mem_flags & ACPI_NFIT_MEM_ARMED ? "arm " : "");
  703. }
  704. return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
  705. }
  706. static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
  707. {
  708. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  709. const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
  710. struct acpi_device *adev;
  711. int i;
  712. adev = to_acpi_dev(acpi_desc);
  713. if (!adev)
  714. return;
  715. for (i = ND_CMD_ARS_CAP; i <= ND_CMD_ARS_STATUS; i++)
  716. if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
  717. set_bit(i, &nd_desc->dsm_mask);
  718. }
  719. static ssize_t range_index_show(struct device *dev,
  720. struct device_attribute *attr, char *buf)
  721. {
  722. struct nd_region *nd_region = to_nd_region(dev);
  723. struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
  724. return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
  725. }
  726. static DEVICE_ATTR_RO(range_index);
  727. static struct attribute *acpi_nfit_region_attributes[] = {
  728. &dev_attr_range_index.attr,
  729. NULL,
  730. };
  731. static struct attribute_group acpi_nfit_region_attribute_group = {
  732. .name = "nfit",
  733. .attrs = acpi_nfit_region_attributes,
  734. };
  735. static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
  736. &nd_region_attribute_group,
  737. &nd_mapping_attribute_group,
  738. &nd_device_attribute_group,
  739. &nd_numa_attribute_group,
  740. &acpi_nfit_region_attribute_group,
  741. NULL,
  742. };
  743. /* enough info to uniquely specify an interleave set */
  744. struct nfit_set_info {
  745. struct nfit_set_info_map {
  746. u64 region_offset;
  747. u32 serial_number;
  748. u32 pad;
  749. } mapping[0];
  750. };
  751. static size_t sizeof_nfit_set_info(int num_mappings)
  752. {
  753. return sizeof(struct nfit_set_info)
  754. + num_mappings * sizeof(struct nfit_set_info_map);
  755. }
  756. static int cmp_map(const void *m0, const void *m1)
  757. {
  758. const struct nfit_set_info_map *map0 = m0;
  759. const struct nfit_set_info_map *map1 = m1;
  760. return memcmp(&map0->region_offset, &map1->region_offset,
  761. sizeof(u64));
  762. }
  763. /* Retrieve the nth entry referencing this spa */
  764. static struct acpi_nfit_memory_map *memdev_from_spa(
  765. struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
  766. {
  767. struct nfit_memdev *nfit_memdev;
  768. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
  769. if (nfit_memdev->memdev->range_index == range_index)
  770. if (n-- == 0)
  771. return nfit_memdev->memdev;
  772. return NULL;
  773. }
  774. static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
  775. struct nd_region_desc *ndr_desc,
  776. struct acpi_nfit_system_address *spa)
  777. {
  778. int i, spa_type = nfit_spa_type(spa);
  779. struct device *dev = acpi_desc->dev;
  780. struct nd_interleave_set *nd_set;
  781. u16 nr = ndr_desc->num_mappings;
  782. struct nfit_set_info *info;
  783. if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
  784. /* pass */;
  785. else
  786. return 0;
  787. nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
  788. if (!nd_set)
  789. return -ENOMEM;
  790. info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
  791. if (!info)
  792. return -ENOMEM;
  793. for (i = 0; i < nr; i++) {
  794. struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
  795. struct nfit_set_info_map *map = &info->mapping[i];
  796. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  797. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  798. struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
  799. spa->range_index, i);
  800. if (!memdev || !nfit_mem->dcr) {
  801. dev_err(dev, "%s: failed to find DCR\n", __func__);
  802. return -ENODEV;
  803. }
  804. map->region_offset = memdev->region_offset;
  805. map->serial_number = nfit_mem->dcr->serial_number;
  806. }
  807. sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
  808. cmp_map, NULL);
  809. nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
  810. ndr_desc->nd_set = nd_set;
  811. devm_kfree(dev, info);
  812. return 0;
  813. }
  814. static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
  815. {
  816. struct acpi_nfit_interleave *idt = mmio->idt;
  817. u32 sub_line_offset, line_index, line_offset;
  818. u64 line_no, table_skip_count, table_offset;
  819. line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
  820. table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
  821. line_offset = idt->line_offset[line_index]
  822. * mmio->line_size;
  823. table_offset = table_skip_count * mmio->table_size;
  824. return mmio->base_offset + line_offset + table_offset + sub_line_offset;
  825. }
  826. static u64 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
  827. {
  828. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  829. u64 offset = nfit_blk->stat_offset + mmio->size * bw;
  830. if (mmio->num_lines)
  831. offset = to_interleave_offset(offset, mmio);
  832. return readq(mmio->base + offset);
  833. }
  834. static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
  835. resource_size_t dpa, unsigned int len, unsigned int write)
  836. {
  837. u64 cmd, offset;
  838. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  839. enum {
  840. BCW_OFFSET_MASK = (1ULL << 48)-1,
  841. BCW_LEN_SHIFT = 48,
  842. BCW_LEN_MASK = (1ULL << 8) - 1,
  843. BCW_CMD_SHIFT = 56,
  844. };
  845. cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
  846. len = len >> L1_CACHE_SHIFT;
  847. cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
  848. cmd |= ((u64) write) << BCW_CMD_SHIFT;
  849. offset = nfit_blk->cmd_offset + mmio->size * bw;
  850. if (mmio->num_lines)
  851. offset = to_interleave_offset(offset, mmio);
  852. writeq(cmd, mmio->base + offset);
  853. /* FIXME: conditionally perform read-back if mandated by firmware */
  854. }
  855. static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
  856. resource_size_t dpa, void *iobuf, size_t len, int rw,
  857. unsigned int lane)
  858. {
  859. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  860. unsigned int copied = 0;
  861. u64 base_offset;
  862. int rc;
  863. base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
  864. + lane * mmio->size;
  865. /* TODO: non-temporal access, flush hints, cache management etc... */
  866. write_blk_ctl(nfit_blk, lane, dpa, len, rw);
  867. while (len) {
  868. unsigned int c;
  869. u64 offset;
  870. if (mmio->num_lines) {
  871. u32 line_offset;
  872. offset = to_interleave_offset(base_offset + copied,
  873. mmio);
  874. div_u64_rem(offset, mmio->line_size, &line_offset);
  875. c = min_t(size_t, len, mmio->line_size - line_offset);
  876. } else {
  877. offset = base_offset + nfit_blk->bdw_offset;
  878. c = len;
  879. }
  880. if (rw)
  881. memcpy(mmio->aperture + offset, iobuf + copied, c);
  882. else
  883. memcpy(iobuf + copied, mmio->aperture + offset, c);
  884. copied += c;
  885. len -= c;
  886. }
  887. rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
  888. return rc;
  889. }
  890. static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
  891. resource_size_t dpa, void *iobuf, u64 len, int rw)
  892. {
  893. struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
  894. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  895. struct nd_region *nd_region = nfit_blk->nd_region;
  896. unsigned int lane, copied = 0;
  897. int rc = 0;
  898. lane = nd_region_acquire_lane(nd_region);
  899. while (len) {
  900. u64 c = min(len, mmio->size);
  901. rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
  902. iobuf + copied, c, rw, lane);
  903. if (rc)
  904. break;
  905. copied += c;
  906. len -= c;
  907. }
  908. nd_region_release_lane(nd_region, lane);
  909. return rc;
  910. }
  911. static void nfit_spa_mapping_release(struct kref *kref)
  912. {
  913. struct nfit_spa_mapping *spa_map = to_spa_map(kref);
  914. struct acpi_nfit_system_address *spa = spa_map->spa;
  915. struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc;
  916. WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
  917. dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index);
  918. iounmap(spa_map->iomem);
  919. release_mem_region(spa->address, spa->length);
  920. list_del(&spa_map->list);
  921. kfree(spa_map);
  922. }
  923. static struct nfit_spa_mapping *find_spa_mapping(
  924. struct acpi_nfit_desc *acpi_desc,
  925. struct acpi_nfit_system_address *spa)
  926. {
  927. struct nfit_spa_mapping *spa_map;
  928. WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
  929. list_for_each_entry(spa_map, &acpi_desc->spa_maps, list)
  930. if (spa_map->spa == spa)
  931. return spa_map;
  932. return NULL;
  933. }
  934. static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc,
  935. struct acpi_nfit_system_address *spa)
  936. {
  937. struct nfit_spa_mapping *spa_map;
  938. mutex_lock(&acpi_desc->spa_map_mutex);
  939. spa_map = find_spa_mapping(acpi_desc, spa);
  940. if (spa_map)
  941. kref_put(&spa_map->kref, nfit_spa_mapping_release);
  942. mutex_unlock(&acpi_desc->spa_map_mutex);
  943. }
  944. static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
  945. struct acpi_nfit_system_address *spa)
  946. {
  947. resource_size_t start = spa->address;
  948. resource_size_t n = spa->length;
  949. struct nfit_spa_mapping *spa_map;
  950. struct resource *res;
  951. WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
  952. spa_map = find_spa_mapping(acpi_desc, spa);
  953. if (spa_map) {
  954. kref_get(&spa_map->kref);
  955. return spa_map->iomem;
  956. }
  957. spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL);
  958. if (!spa_map)
  959. return NULL;
  960. INIT_LIST_HEAD(&spa_map->list);
  961. spa_map->spa = spa;
  962. kref_init(&spa_map->kref);
  963. spa_map->acpi_desc = acpi_desc;
  964. res = request_mem_region(start, n, dev_name(acpi_desc->dev));
  965. if (!res)
  966. goto err_mem;
  967. /* TODO: cacheability based on the spa type */
  968. spa_map->iomem = ioremap_nocache(start, n);
  969. if (!spa_map->iomem)
  970. goto err_map;
  971. list_add_tail(&spa_map->list, &acpi_desc->spa_maps);
  972. return spa_map->iomem;
  973. err_map:
  974. release_mem_region(start, n);
  975. err_mem:
  976. kfree(spa_map);
  977. return NULL;
  978. }
  979. /**
  980. * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges
  981. * @nvdimm_bus: NFIT-bus that provided the spa table entry
  982. * @nfit_spa: spa table to map
  983. *
  984. * In the case where block-data-window apertures and
  985. * dimm-control-regions are interleaved they will end up sharing a
  986. * single request_mem_region() + ioremap() for the address range. In
  987. * the style of devm nfit_spa_map() mappings are automatically dropped
  988. * when all region devices referencing the same mapping are disabled /
  989. * unbound.
  990. */
  991. static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
  992. struct acpi_nfit_system_address *spa)
  993. {
  994. void __iomem *iomem;
  995. mutex_lock(&acpi_desc->spa_map_mutex);
  996. iomem = __nfit_spa_map(acpi_desc, spa);
  997. mutex_unlock(&acpi_desc->spa_map_mutex);
  998. return iomem;
  999. }
  1000. static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
  1001. struct acpi_nfit_interleave *idt, u16 interleave_ways)
  1002. {
  1003. if (idt) {
  1004. mmio->num_lines = idt->line_count;
  1005. mmio->line_size = idt->line_size;
  1006. if (interleave_ways == 0)
  1007. return -ENXIO;
  1008. mmio->table_size = mmio->num_lines * interleave_ways
  1009. * mmio->line_size;
  1010. }
  1011. return 0;
  1012. }
  1013. static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
  1014. struct device *dev)
  1015. {
  1016. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1017. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1018. struct nd_blk_region *ndbr = to_nd_blk_region(dev);
  1019. struct nfit_blk_mmio *mmio;
  1020. struct nfit_blk *nfit_blk;
  1021. struct nfit_mem *nfit_mem;
  1022. struct nvdimm *nvdimm;
  1023. int rc;
  1024. nvdimm = nd_blk_region_to_dimm(ndbr);
  1025. nfit_mem = nvdimm_provider_data(nvdimm);
  1026. if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
  1027. dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
  1028. nfit_mem ? "" : " nfit_mem",
  1029. nfit_mem->dcr ? "" : " dcr",
  1030. nfit_mem->bdw ? "" : " bdw");
  1031. return -ENXIO;
  1032. }
  1033. nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
  1034. if (!nfit_blk)
  1035. return -ENOMEM;
  1036. nd_blk_region_set_provider_data(ndbr, nfit_blk);
  1037. nfit_blk->nd_region = to_nd_region(dev);
  1038. /* map block aperture memory */
  1039. nfit_blk->bdw_offset = nfit_mem->bdw->offset;
  1040. mmio = &nfit_blk->mmio[BDW];
  1041. mmio->base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw);
  1042. if (!mmio->base) {
  1043. dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
  1044. nvdimm_name(nvdimm));
  1045. return -ENOMEM;
  1046. }
  1047. mmio->size = nfit_mem->bdw->size;
  1048. mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
  1049. mmio->idt = nfit_mem->idt_bdw;
  1050. mmio->spa = nfit_mem->spa_bdw;
  1051. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
  1052. nfit_mem->memdev_bdw->interleave_ways);
  1053. if (rc) {
  1054. dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
  1055. __func__, nvdimm_name(nvdimm));
  1056. return rc;
  1057. }
  1058. /* map block control memory */
  1059. nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
  1060. nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
  1061. mmio = &nfit_blk->mmio[DCR];
  1062. mmio->base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr);
  1063. if (!mmio->base) {
  1064. dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
  1065. nvdimm_name(nvdimm));
  1066. return -ENOMEM;
  1067. }
  1068. mmio->size = nfit_mem->dcr->window_size;
  1069. mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
  1070. mmio->idt = nfit_mem->idt_dcr;
  1071. mmio->spa = nfit_mem->spa_dcr;
  1072. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
  1073. nfit_mem->memdev_dcr->interleave_ways);
  1074. if (rc) {
  1075. dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
  1076. __func__, nvdimm_name(nvdimm));
  1077. return rc;
  1078. }
  1079. if (mmio->line_size == 0)
  1080. return 0;
  1081. if ((u32) nfit_blk->cmd_offset % mmio->line_size
  1082. + 8 > mmio->line_size) {
  1083. dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
  1084. return -ENXIO;
  1085. } else if ((u32) nfit_blk->stat_offset % mmio->line_size
  1086. + 8 > mmio->line_size) {
  1087. dev_dbg(dev, "stat_offset crosses interleave boundary\n");
  1088. return -ENXIO;
  1089. }
  1090. return 0;
  1091. }
  1092. static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus,
  1093. struct device *dev)
  1094. {
  1095. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1096. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1097. struct nd_blk_region *ndbr = to_nd_blk_region(dev);
  1098. struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
  1099. int i;
  1100. if (!nfit_blk)
  1101. return; /* never enabled */
  1102. /* auto-free BLK spa mappings */
  1103. for (i = 0; i < 2; i++) {
  1104. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i];
  1105. if (mmio->base)
  1106. nfit_spa_unmap(acpi_desc, mmio->spa);
  1107. }
  1108. nd_blk_region_set_provider_data(ndbr, NULL);
  1109. /* devm will free nfit_blk */
  1110. }
  1111. static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
  1112. struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc,
  1113. struct acpi_nfit_memory_map *memdev,
  1114. struct acpi_nfit_system_address *spa)
  1115. {
  1116. struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
  1117. memdev->device_handle);
  1118. struct nd_blk_region_desc *ndbr_desc;
  1119. struct nfit_mem *nfit_mem;
  1120. int blk_valid = 0;
  1121. if (!nvdimm) {
  1122. dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
  1123. spa->range_index, memdev->device_handle);
  1124. return -ENODEV;
  1125. }
  1126. nd_mapping->nvdimm = nvdimm;
  1127. switch (nfit_spa_type(spa)) {
  1128. case NFIT_SPA_PM:
  1129. case NFIT_SPA_VOLATILE:
  1130. nd_mapping->start = memdev->address;
  1131. nd_mapping->size = memdev->region_size;
  1132. break;
  1133. case NFIT_SPA_DCR:
  1134. nfit_mem = nvdimm_provider_data(nvdimm);
  1135. if (!nfit_mem || !nfit_mem->bdw) {
  1136. dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
  1137. spa->range_index, nvdimm_name(nvdimm));
  1138. } else {
  1139. nd_mapping->size = nfit_mem->bdw->capacity;
  1140. nd_mapping->start = nfit_mem->bdw->start_address;
  1141. ndr_desc->num_lanes = nfit_mem->bdw->windows;
  1142. blk_valid = 1;
  1143. }
  1144. ndr_desc->nd_mapping = nd_mapping;
  1145. ndr_desc->num_mappings = blk_valid;
  1146. ndbr_desc = to_blk_region_desc(ndr_desc);
  1147. ndbr_desc->enable = acpi_nfit_blk_region_enable;
  1148. ndbr_desc->disable = acpi_nfit_blk_region_disable;
  1149. ndbr_desc->do_io = acpi_desc->blk_do_io;
  1150. if (!nvdimm_blk_region_create(acpi_desc->nvdimm_bus, ndr_desc))
  1151. return -ENOMEM;
  1152. break;
  1153. }
  1154. return 0;
  1155. }
  1156. static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
  1157. struct nfit_spa *nfit_spa)
  1158. {
  1159. static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS];
  1160. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1161. struct nd_blk_region_desc ndbr_desc;
  1162. struct nd_region_desc *ndr_desc;
  1163. struct nfit_memdev *nfit_memdev;
  1164. struct nvdimm_bus *nvdimm_bus;
  1165. struct resource res;
  1166. int count = 0, rc;
  1167. if (spa->range_index == 0) {
  1168. dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
  1169. __func__);
  1170. return 0;
  1171. }
  1172. memset(&res, 0, sizeof(res));
  1173. memset(&nd_mappings, 0, sizeof(nd_mappings));
  1174. memset(&ndbr_desc, 0, sizeof(ndbr_desc));
  1175. res.start = spa->address;
  1176. res.end = res.start + spa->length - 1;
  1177. ndr_desc = &ndbr_desc.ndr_desc;
  1178. ndr_desc->res = &res;
  1179. ndr_desc->provider_data = nfit_spa;
  1180. ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
  1181. if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
  1182. ndr_desc->numa_node = acpi_map_pxm_to_online_node(
  1183. spa->proximity_domain);
  1184. else
  1185. ndr_desc->numa_node = NUMA_NO_NODE;
  1186. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1187. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  1188. struct nd_mapping *nd_mapping;
  1189. if (memdev->range_index != spa->range_index)
  1190. continue;
  1191. if (count >= ND_MAX_MAPPINGS) {
  1192. dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
  1193. spa->range_index, ND_MAX_MAPPINGS);
  1194. return -ENXIO;
  1195. }
  1196. nd_mapping = &nd_mappings[count++];
  1197. rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc,
  1198. memdev, spa);
  1199. if (rc)
  1200. return rc;
  1201. }
  1202. ndr_desc->nd_mapping = nd_mappings;
  1203. ndr_desc->num_mappings = count;
  1204. rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
  1205. if (rc)
  1206. return rc;
  1207. nvdimm_bus = acpi_desc->nvdimm_bus;
  1208. if (nfit_spa_type(spa) == NFIT_SPA_PM) {
  1209. if (!nvdimm_pmem_region_create(nvdimm_bus, ndr_desc))
  1210. return -ENOMEM;
  1211. } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
  1212. if (!nvdimm_volatile_region_create(nvdimm_bus, ndr_desc))
  1213. return -ENOMEM;
  1214. }
  1215. return 0;
  1216. }
  1217. static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
  1218. {
  1219. struct nfit_spa *nfit_spa;
  1220. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  1221. int rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
  1222. if (rc)
  1223. return rc;
  1224. }
  1225. return 0;
  1226. }
  1227. int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz)
  1228. {
  1229. struct device *dev = acpi_desc->dev;
  1230. const void *end;
  1231. u8 *data;
  1232. int rc;
  1233. INIT_LIST_HEAD(&acpi_desc->spa_maps);
  1234. INIT_LIST_HEAD(&acpi_desc->spas);
  1235. INIT_LIST_HEAD(&acpi_desc->dcrs);
  1236. INIT_LIST_HEAD(&acpi_desc->bdws);
  1237. INIT_LIST_HEAD(&acpi_desc->idts);
  1238. INIT_LIST_HEAD(&acpi_desc->memdevs);
  1239. INIT_LIST_HEAD(&acpi_desc->dimms);
  1240. mutex_init(&acpi_desc->spa_map_mutex);
  1241. data = (u8 *) acpi_desc->nfit;
  1242. end = data + sz;
  1243. data += sizeof(struct acpi_table_nfit);
  1244. while (!IS_ERR_OR_NULL(data))
  1245. data = add_table(acpi_desc, data, end);
  1246. if (IS_ERR(data)) {
  1247. dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
  1248. PTR_ERR(data));
  1249. return PTR_ERR(data);
  1250. }
  1251. if (nfit_mem_init(acpi_desc) != 0)
  1252. return -ENOMEM;
  1253. acpi_nfit_init_dsms(acpi_desc);
  1254. rc = acpi_nfit_register_dimms(acpi_desc);
  1255. if (rc)
  1256. return rc;
  1257. return acpi_nfit_register_regions(acpi_desc);
  1258. }
  1259. EXPORT_SYMBOL_GPL(acpi_nfit_init);
  1260. static int acpi_nfit_add(struct acpi_device *adev)
  1261. {
  1262. struct nvdimm_bus_descriptor *nd_desc;
  1263. struct acpi_nfit_desc *acpi_desc;
  1264. struct device *dev = &adev->dev;
  1265. struct acpi_table_header *tbl;
  1266. acpi_status status = AE_OK;
  1267. acpi_size sz;
  1268. int rc;
  1269. status = acpi_get_table_with_size("NFIT", 0, &tbl, &sz);
  1270. if (ACPI_FAILURE(status)) {
  1271. dev_err(dev, "failed to find NFIT\n");
  1272. return -ENXIO;
  1273. }
  1274. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  1275. if (!acpi_desc)
  1276. return -ENOMEM;
  1277. dev_set_drvdata(dev, acpi_desc);
  1278. acpi_desc->dev = dev;
  1279. acpi_desc->nfit = (struct acpi_table_nfit *) tbl;
  1280. acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
  1281. nd_desc = &acpi_desc->nd_desc;
  1282. nd_desc->provider_name = "ACPI.NFIT";
  1283. nd_desc->ndctl = acpi_nfit_ctl;
  1284. nd_desc->attr_groups = acpi_nfit_attribute_groups;
  1285. acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, nd_desc);
  1286. if (!acpi_desc->nvdimm_bus)
  1287. return -ENXIO;
  1288. rc = acpi_nfit_init(acpi_desc, sz);
  1289. if (rc) {
  1290. nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
  1291. return rc;
  1292. }
  1293. return 0;
  1294. }
  1295. static int acpi_nfit_remove(struct acpi_device *adev)
  1296. {
  1297. struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
  1298. nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
  1299. return 0;
  1300. }
  1301. static const struct acpi_device_id acpi_nfit_ids[] = {
  1302. { "ACPI0012", 0 },
  1303. { "", 0 },
  1304. };
  1305. MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
  1306. static struct acpi_driver acpi_nfit_driver = {
  1307. .name = KBUILD_MODNAME,
  1308. .ids = acpi_nfit_ids,
  1309. .ops = {
  1310. .add = acpi_nfit_add,
  1311. .remove = acpi_nfit_remove,
  1312. },
  1313. };
  1314. static __init int nfit_init(void)
  1315. {
  1316. BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
  1317. BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
  1318. BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
  1319. BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
  1320. BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
  1321. BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
  1322. BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
  1323. acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
  1324. acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
  1325. acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
  1326. acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
  1327. acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
  1328. acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
  1329. acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
  1330. acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
  1331. acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
  1332. acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
  1333. return acpi_bus_register_driver(&acpi_nfit_driver);
  1334. }
  1335. static __exit void nfit_exit(void)
  1336. {
  1337. acpi_bus_unregister_driver(&acpi_nfit_driver);
  1338. }
  1339. module_init(nfit_init);
  1340. module_exit(nfit_exit);
  1341. MODULE_LICENSE("GPL v2");
  1342. MODULE_AUTHOR("Intel Corporation");