setup-common.c 18 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/screen_info.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/debugfs.h>
  33. #include <linux/percpu.h>
  34. #include <linux/memblock.h>
  35. #include <linux/of_platform.h>
  36. #include <asm/io.h>
  37. #include <asm/paca.h>
  38. #include <asm/prom.h>
  39. #include <asm/processor.h>
  40. #include <asm/vdso_datapage.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/smp.h>
  43. #include <asm/elf.h>
  44. #include <asm/machdep.h>
  45. #include <asm/time.h>
  46. #include <asm/cputable.h>
  47. #include <asm/sections.h>
  48. #include <asm/firmware.h>
  49. #include <asm/btext.h>
  50. #include <asm/nvram.h>
  51. #include <asm/setup.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/xmon.h>
  59. #include <asm/cputhreads.h>
  60. #include <mm/mmu_decl.h>
  61. #include <asm/fadump.h>
  62. #ifdef DEBUG
  63. #include <asm/udbg.h>
  64. #define DBG(fmt...) udbg_printf(fmt)
  65. #else
  66. #define DBG(fmt...)
  67. #endif
  68. /* The main machine-dep calls structure
  69. */
  70. struct machdep_calls ppc_md;
  71. EXPORT_SYMBOL(ppc_md);
  72. struct machdep_calls *machine_id;
  73. EXPORT_SYMBOL(machine_id);
  74. int boot_cpuid = -1;
  75. EXPORT_SYMBOL_GPL(boot_cpuid);
  76. unsigned long klimit = (unsigned long) _end;
  77. /*
  78. * This still seems to be needed... -- paulus
  79. */
  80. struct screen_info screen_info = {
  81. .orig_x = 0,
  82. .orig_y = 25,
  83. .orig_video_cols = 80,
  84. .orig_video_lines = 25,
  85. .orig_video_isVGA = 1,
  86. .orig_video_points = 16
  87. };
  88. #if defined(CONFIG_FB_VGA16_MODULE)
  89. EXPORT_SYMBOL(screen_info);
  90. #endif
  91. /* Variables required to store legacy IO irq routing */
  92. int of_i8042_kbd_irq;
  93. EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
  94. int of_i8042_aux_irq;
  95. EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
  96. #ifdef __DO_IRQ_CANON
  97. /* XXX should go elsewhere eventually */
  98. int ppc_do_canonicalize_irqs;
  99. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  100. #endif
  101. /* also used by kexec */
  102. void machine_shutdown(void)
  103. {
  104. #ifdef CONFIG_FA_DUMP
  105. /*
  106. * if fadump is active, cleanup the fadump registration before we
  107. * shutdown.
  108. */
  109. fadump_cleanup();
  110. #endif
  111. if (ppc_md.machine_shutdown)
  112. ppc_md.machine_shutdown();
  113. }
  114. void machine_restart(char *cmd)
  115. {
  116. machine_shutdown();
  117. if (ppc_md.restart)
  118. ppc_md.restart(cmd);
  119. #ifdef CONFIG_SMP
  120. smp_send_stop();
  121. #endif
  122. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  123. local_irq_disable();
  124. while (1) ;
  125. }
  126. void machine_power_off(void)
  127. {
  128. machine_shutdown();
  129. if (pm_power_off)
  130. pm_power_off();
  131. #ifdef CONFIG_SMP
  132. smp_send_stop();
  133. #endif
  134. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  135. local_irq_disable();
  136. while (1) ;
  137. }
  138. /* Used by the G5 thermal driver */
  139. EXPORT_SYMBOL_GPL(machine_power_off);
  140. void (*pm_power_off)(void);
  141. EXPORT_SYMBOL_GPL(pm_power_off);
  142. void machine_halt(void)
  143. {
  144. machine_shutdown();
  145. if (ppc_md.halt)
  146. ppc_md.halt();
  147. #ifdef CONFIG_SMP
  148. smp_send_stop();
  149. #endif
  150. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  151. local_irq_disable();
  152. while (1) ;
  153. }
  154. #ifdef CONFIG_TAU
  155. extern u32 cpu_temp(unsigned long cpu);
  156. extern u32 cpu_temp_both(unsigned long cpu);
  157. #endif /* CONFIG_TAU */
  158. #ifdef CONFIG_SMP
  159. DEFINE_PER_CPU(unsigned int, cpu_pvr);
  160. #endif
  161. static void show_cpuinfo_summary(struct seq_file *m)
  162. {
  163. struct device_node *root;
  164. const char *model = NULL;
  165. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  166. unsigned long bogosum = 0;
  167. int i;
  168. for_each_online_cpu(i)
  169. bogosum += loops_per_jiffy;
  170. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  171. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  172. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  173. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  174. if (ppc_md.name)
  175. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  176. root = of_find_node_by_path("/");
  177. if (root)
  178. model = of_get_property(root, "model", NULL);
  179. if (model)
  180. seq_printf(m, "model\t\t: %s\n", model);
  181. of_node_put(root);
  182. if (ppc_md.show_cpuinfo != NULL)
  183. ppc_md.show_cpuinfo(m);
  184. #ifdef CONFIG_PPC32
  185. /* Display the amount of memory */
  186. seq_printf(m, "Memory\t\t: %d MB\n",
  187. (unsigned int)(total_memory / (1024 * 1024)));
  188. #endif
  189. }
  190. static int show_cpuinfo(struct seq_file *m, void *v)
  191. {
  192. unsigned long cpu_id = (unsigned long)v - 1;
  193. unsigned int pvr;
  194. unsigned long proc_freq;
  195. unsigned short maj;
  196. unsigned short min;
  197. /* We only show online cpus: disable preempt (overzealous, I
  198. * knew) to prevent cpu going down. */
  199. preempt_disable();
  200. if (!cpu_online(cpu_id)) {
  201. preempt_enable();
  202. return 0;
  203. }
  204. #ifdef CONFIG_SMP
  205. pvr = per_cpu(cpu_pvr, cpu_id);
  206. #else
  207. pvr = mfspr(SPRN_PVR);
  208. #endif
  209. maj = (pvr >> 8) & 0xFF;
  210. min = pvr & 0xFF;
  211. seq_printf(m, "processor\t: %lu\n", cpu_id);
  212. seq_printf(m, "cpu\t\t: ");
  213. if (cur_cpu_spec->pvr_mask)
  214. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  215. else
  216. seq_printf(m, "unknown (%08x)", pvr);
  217. #ifdef CONFIG_ALTIVEC
  218. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  219. seq_printf(m, ", altivec supported");
  220. #endif /* CONFIG_ALTIVEC */
  221. seq_printf(m, "\n");
  222. #ifdef CONFIG_TAU
  223. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  224. #ifdef CONFIG_TAU_AVERAGE
  225. /* more straightforward, but potentially misleading */
  226. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  227. cpu_temp(cpu_id));
  228. #else
  229. /* show the actual temp sensor range */
  230. u32 temp;
  231. temp = cpu_temp_both(cpu_id);
  232. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  233. temp & 0xff, temp >> 16);
  234. #endif
  235. }
  236. #endif /* CONFIG_TAU */
  237. /*
  238. * Platforms that have variable clock rates, should implement
  239. * the method ppc_md.get_proc_freq() that reports the clock
  240. * rate of a given cpu. The rest can use ppc_proc_freq to
  241. * report the clock rate that is same across all cpus.
  242. */
  243. if (ppc_md.get_proc_freq)
  244. proc_freq = ppc_md.get_proc_freq(cpu_id);
  245. else
  246. proc_freq = ppc_proc_freq;
  247. if (proc_freq)
  248. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  249. proc_freq / 1000000, proc_freq % 1000000);
  250. if (ppc_md.show_percpuinfo != NULL)
  251. ppc_md.show_percpuinfo(m, cpu_id);
  252. /* If we are a Freescale core do a simple check so
  253. * we dont have to keep adding cases in the future */
  254. if (PVR_VER(pvr) & 0x8000) {
  255. switch (PVR_VER(pvr)) {
  256. case 0x8000: /* 7441/7450/7451, Voyager */
  257. case 0x8001: /* 7445/7455, Apollo 6 */
  258. case 0x8002: /* 7447/7457, Apollo 7 */
  259. case 0x8003: /* 7447A, Apollo 7 PM */
  260. case 0x8004: /* 7448, Apollo 8 */
  261. case 0x800c: /* 7410, Nitro */
  262. maj = ((pvr >> 8) & 0xF);
  263. min = PVR_MIN(pvr);
  264. break;
  265. default: /* e500/book-e */
  266. maj = PVR_MAJ(pvr);
  267. min = PVR_MIN(pvr);
  268. break;
  269. }
  270. } else {
  271. switch (PVR_VER(pvr)) {
  272. case 0x0020: /* 403 family */
  273. maj = PVR_MAJ(pvr) + 1;
  274. min = PVR_MIN(pvr);
  275. break;
  276. case 0x1008: /* 740P/750P ?? */
  277. maj = ((pvr >> 8) & 0xFF) - 1;
  278. min = pvr & 0xFF;
  279. break;
  280. default:
  281. maj = (pvr >> 8) & 0xFF;
  282. min = pvr & 0xFF;
  283. break;
  284. }
  285. }
  286. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  287. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  288. #ifdef CONFIG_PPC32
  289. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  290. loops_per_jiffy / (500000/HZ),
  291. (loops_per_jiffy / (5000/HZ)) % 100);
  292. #endif
  293. #ifdef CONFIG_SMP
  294. seq_printf(m, "\n");
  295. #endif
  296. preempt_enable();
  297. /* If this is the last cpu, print the summary */
  298. if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
  299. show_cpuinfo_summary(m);
  300. return 0;
  301. }
  302. static void *c_start(struct seq_file *m, loff_t *pos)
  303. {
  304. if (*pos == 0) /* just in case, cpu 0 is not the first */
  305. *pos = cpumask_first(cpu_online_mask);
  306. else
  307. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  308. if ((*pos) < nr_cpu_ids)
  309. return (void *)(unsigned long)(*pos + 1);
  310. return NULL;
  311. }
  312. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  313. {
  314. (*pos)++;
  315. return c_start(m, pos);
  316. }
  317. static void c_stop(struct seq_file *m, void *v)
  318. {
  319. }
  320. const struct seq_operations cpuinfo_op = {
  321. .start =c_start,
  322. .next = c_next,
  323. .stop = c_stop,
  324. .show = show_cpuinfo,
  325. };
  326. void __init check_for_initrd(void)
  327. {
  328. #ifdef CONFIG_BLK_DEV_INITRD
  329. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  330. initrd_start, initrd_end);
  331. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  332. * look sensible. If not, clear initrd reference.
  333. */
  334. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  335. initrd_end > initrd_start)
  336. ROOT_DEV = Root_RAM0;
  337. else
  338. initrd_start = initrd_end = 0;
  339. if (initrd_start)
  340. pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  341. DBG(" <- check_for_initrd()\n");
  342. #endif /* CONFIG_BLK_DEV_INITRD */
  343. }
  344. #ifdef CONFIG_SMP
  345. int threads_per_core, threads_per_subcore, threads_shift;
  346. cpumask_t threads_core_mask;
  347. EXPORT_SYMBOL_GPL(threads_per_core);
  348. EXPORT_SYMBOL_GPL(threads_per_subcore);
  349. EXPORT_SYMBOL_GPL(threads_shift);
  350. EXPORT_SYMBOL_GPL(threads_core_mask);
  351. static void __init cpu_init_thread_core_maps(int tpc)
  352. {
  353. int i;
  354. threads_per_core = tpc;
  355. threads_per_subcore = tpc;
  356. cpumask_clear(&threads_core_mask);
  357. /* This implementation only supports power of 2 number of threads
  358. * for simplicity and performance
  359. */
  360. threads_shift = ilog2(tpc);
  361. BUG_ON(tpc != (1 << threads_shift));
  362. for (i = 0; i < tpc; i++)
  363. cpumask_set_cpu(i, &threads_core_mask);
  364. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  365. tpc, tpc > 1 ? "s" : "");
  366. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  367. }
  368. /**
  369. * setup_cpu_maps - initialize the following cpu maps:
  370. * cpu_possible_mask
  371. * cpu_present_mask
  372. *
  373. * Having the possible map set up early allows us to restrict allocations
  374. * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
  375. *
  376. * We do not initialize the online map here; cpus set their own bits in
  377. * cpu_online_mask as they come up.
  378. *
  379. * This function is valid only for Open Firmware systems. finish_device_tree
  380. * must be called before using this.
  381. *
  382. * While we're here, we may as well set the "physical" cpu ids in the paca.
  383. *
  384. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  385. */
  386. void __init smp_setup_cpu_maps(void)
  387. {
  388. struct device_node *dn = NULL;
  389. int cpu = 0;
  390. int nthreads = 1;
  391. DBG("smp_setup_cpu_maps()\n");
  392. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
  393. const __be32 *intserv;
  394. __be32 cpu_be;
  395. int j, len;
  396. DBG(" * %s...\n", dn->full_name);
  397. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  398. &len);
  399. if (intserv) {
  400. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  401. nthreads);
  402. } else {
  403. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  404. intserv = of_get_property(dn, "reg", &len);
  405. if (!intserv) {
  406. cpu_be = cpu_to_be32(cpu);
  407. intserv = &cpu_be; /* assume logical == phys */
  408. len = 4;
  409. }
  410. }
  411. nthreads = len / sizeof(int);
  412. for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
  413. bool avail;
  414. DBG(" thread %d -> cpu %d (hard id %d)\n",
  415. j, cpu, be32_to_cpu(intserv[j]));
  416. avail = of_device_is_available(dn);
  417. if (!avail)
  418. avail = !of_property_match_string(dn,
  419. "enable-method", "spin-table");
  420. set_cpu_present(cpu, avail);
  421. set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
  422. set_cpu_possible(cpu, true);
  423. cpu++;
  424. }
  425. }
  426. /* If no SMT supported, nthreads is forced to 1 */
  427. if (!cpu_has_feature(CPU_FTR_SMT)) {
  428. DBG(" SMT disabled ! nthreads forced to 1\n");
  429. nthreads = 1;
  430. }
  431. #ifdef CONFIG_PPC64
  432. /*
  433. * On pSeries LPAR, we need to know how many cpus
  434. * could possibly be added to this partition.
  435. */
  436. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  437. (dn = of_find_node_by_path("/rtas"))) {
  438. int num_addr_cell, num_size_cell, maxcpus;
  439. const __be32 *ireg;
  440. num_addr_cell = of_n_addr_cells(dn);
  441. num_size_cell = of_n_size_cells(dn);
  442. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  443. if (!ireg)
  444. goto out;
  445. maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
  446. /* Double maxcpus for processors which have SMT capability */
  447. if (cpu_has_feature(CPU_FTR_SMT))
  448. maxcpus *= nthreads;
  449. if (maxcpus > nr_cpu_ids) {
  450. printk(KERN_WARNING
  451. "Partition configured for %d cpus, "
  452. "operating system maximum is %d.\n",
  453. maxcpus, nr_cpu_ids);
  454. maxcpus = nr_cpu_ids;
  455. } else
  456. printk(KERN_INFO "Partition configured for %d cpus.\n",
  457. maxcpus);
  458. for (cpu = 0; cpu < maxcpus; cpu++)
  459. set_cpu_possible(cpu, true);
  460. out:
  461. of_node_put(dn);
  462. }
  463. vdso_data->processorCount = num_present_cpus();
  464. #endif /* CONFIG_PPC64 */
  465. /* Initialize CPU <=> thread mapping/
  466. *
  467. * WARNING: We assume that the number of threads is the same for
  468. * every CPU in the system. If that is not the case, then some code
  469. * here will have to be reworked
  470. */
  471. cpu_init_thread_core_maps(nthreads);
  472. /* Now that possible cpus are set, set nr_cpu_ids for later use */
  473. setup_nr_cpu_ids();
  474. free_unused_pacas();
  475. }
  476. #endif /* CONFIG_SMP */
  477. #ifdef CONFIG_PCSPKR_PLATFORM
  478. static __init int add_pcspkr(void)
  479. {
  480. struct device_node *np;
  481. struct platform_device *pd;
  482. int ret;
  483. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  484. of_node_put(np);
  485. if (!np)
  486. return -ENODEV;
  487. pd = platform_device_alloc("pcspkr", -1);
  488. if (!pd)
  489. return -ENOMEM;
  490. ret = platform_device_add(pd);
  491. if (ret)
  492. platform_device_put(pd);
  493. return ret;
  494. }
  495. device_initcall(add_pcspkr);
  496. #endif /* CONFIG_PCSPKR_PLATFORM */
  497. void probe_machine(void)
  498. {
  499. extern struct machdep_calls __machine_desc_start;
  500. extern struct machdep_calls __machine_desc_end;
  501. /*
  502. * Iterate all ppc_md structures until we find the proper
  503. * one for the current machine type
  504. */
  505. DBG("Probing machine type ...\n");
  506. for (machine_id = &__machine_desc_start;
  507. machine_id < &__machine_desc_end;
  508. machine_id++) {
  509. DBG(" %s ...", machine_id->name);
  510. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  511. if (ppc_md.probe()) {
  512. DBG(" match !\n");
  513. break;
  514. }
  515. DBG("\n");
  516. }
  517. /* What can we do if we didn't find ? */
  518. if (machine_id >= &__machine_desc_end) {
  519. DBG("No suitable machine found !\n");
  520. for (;;);
  521. }
  522. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  523. }
  524. /* Match a class of boards, not a specific device configuration. */
  525. int check_legacy_ioport(unsigned long base_port)
  526. {
  527. struct device_node *parent, *np = NULL;
  528. int ret = -ENODEV;
  529. switch(base_port) {
  530. case I8042_DATA_REG:
  531. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  532. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  533. if (np) {
  534. parent = of_get_parent(np);
  535. of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
  536. if (!of_i8042_kbd_irq)
  537. of_i8042_kbd_irq = 1;
  538. of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
  539. if (!of_i8042_aux_irq)
  540. of_i8042_aux_irq = 12;
  541. of_node_put(np);
  542. np = parent;
  543. break;
  544. }
  545. np = of_find_node_by_type(NULL, "8042");
  546. /* Pegasos has no device_type on its 8042 node, look for the
  547. * name instead */
  548. if (!np)
  549. np = of_find_node_by_name(NULL, "8042");
  550. if (np) {
  551. of_i8042_kbd_irq = 1;
  552. of_i8042_aux_irq = 12;
  553. }
  554. break;
  555. case FDC_BASE: /* FDC1 */
  556. np = of_find_node_by_type(NULL, "fdc");
  557. break;
  558. default:
  559. /* ipmi is supposed to fail here */
  560. break;
  561. }
  562. if (!np)
  563. return ret;
  564. parent = of_get_parent(np);
  565. if (parent) {
  566. if (strcmp(parent->type, "isa") == 0)
  567. ret = 0;
  568. of_node_put(parent);
  569. }
  570. of_node_put(np);
  571. return ret;
  572. }
  573. EXPORT_SYMBOL(check_legacy_ioport);
  574. static int ppc_panic_event(struct notifier_block *this,
  575. unsigned long event, void *ptr)
  576. {
  577. /*
  578. * If firmware-assisted dump has been registered then trigger
  579. * firmware-assisted dump and let firmware handle everything else.
  580. */
  581. crash_fadump(NULL, ptr);
  582. ppc_md.panic(ptr); /* May not return */
  583. return NOTIFY_DONE;
  584. }
  585. static struct notifier_block ppc_panic_block = {
  586. .notifier_call = ppc_panic_event,
  587. .priority = INT_MIN /* may not return; must be done last */
  588. };
  589. void __init setup_panic(void)
  590. {
  591. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  592. }
  593. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  594. /*
  595. * For platforms that have configurable cache-coherency. This function
  596. * checks that the cache coherency setting of the kernel matches the setting
  597. * left by the firmware, as indicated in the device tree. Since a mismatch
  598. * will eventually result in DMA failures, we print * and error and call
  599. * BUG() in that case.
  600. */
  601. #ifdef CONFIG_NOT_COHERENT_CACHE
  602. #define KERNEL_COHERENCY 0
  603. #else
  604. #define KERNEL_COHERENCY 1
  605. #endif
  606. static int __init check_cache_coherency(void)
  607. {
  608. struct device_node *np;
  609. const void *prop;
  610. int devtree_coherency;
  611. np = of_find_node_by_path("/");
  612. prop = of_get_property(np, "coherency-off", NULL);
  613. of_node_put(np);
  614. devtree_coherency = prop ? 0 : 1;
  615. if (devtree_coherency != KERNEL_COHERENCY) {
  616. printk(KERN_ERR
  617. "kernel coherency:%s != device tree_coherency:%s\n",
  618. KERNEL_COHERENCY ? "on" : "off",
  619. devtree_coherency ? "on" : "off");
  620. BUG();
  621. }
  622. return 0;
  623. }
  624. late_initcall(check_cache_coherency);
  625. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  626. #ifdef CONFIG_DEBUG_FS
  627. struct dentry *powerpc_debugfs_root;
  628. EXPORT_SYMBOL(powerpc_debugfs_root);
  629. static int powerpc_debugfs_init(void)
  630. {
  631. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  632. return powerpc_debugfs_root == NULL;
  633. }
  634. arch_initcall(powerpc_debugfs_init);
  635. #endif
  636. void ppc_printk_progress(char *s, unsigned short hex)
  637. {
  638. pr_info("%s\n", s);
  639. }
  640. void arch_setup_pdev_archdata(struct platform_device *pdev)
  641. {
  642. pdev->archdata.dma_mask = DMA_BIT_MASK(32);
  643. pdev->dev.dma_mask = &pdev->archdata.dma_mask;
  644. set_dma_ops(&pdev->dev, &dma_direct_ops);
  645. }