pci-tx4938.c 4.0 KB

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  1. /*
  2. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  3. * and RBTX49xx patch from CELF patch archive.
  4. *
  5. * Copyright 2001, 2003-2005 MontaVista Software Inc.
  6. * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
  7. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  8. *
  9. * This file is subject to the terms and conditions of the GNU General Public
  10. * License. See the file "COPYING" in the main directory of this archive
  11. * for more details.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/kernel.h>
  16. #include <linux/interrupt.h>
  17. #include <asm/txx9/generic.h>
  18. #include <asm/txx9/tx4938.h>
  19. int __init tx4938_report_pciclk(void)
  20. {
  21. int pciclk = 0;
  22. printk(KERN_INFO "PCIC --%s PCICLK:",
  23. (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ?
  24. " PCI66" : "");
  25. if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
  26. u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
  27. switch ((unsigned long)ccfg &
  28. TX4938_CCFG_PCIDIVMODE_MASK) {
  29. case TX4938_CCFG_PCIDIVMODE_4:
  30. pciclk = txx9_cpu_clock / 4; break;
  31. case TX4938_CCFG_PCIDIVMODE_4_5:
  32. pciclk = txx9_cpu_clock * 2 / 9; break;
  33. case TX4938_CCFG_PCIDIVMODE_5:
  34. pciclk = txx9_cpu_clock / 5; break;
  35. case TX4938_CCFG_PCIDIVMODE_5_5:
  36. pciclk = txx9_cpu_clock * 2 / 11; break;
  37. case TX4938_CCFG_PCIDIVMODE_8:
  38. pciclk = txx9_cpu_clock / 8; break;
  39. case TX4938_CCFG_PCIDIVMODE_9:
  40. pciclk = txx9_cpu_clock / 9; break;
  41. case TX4938_CCFG_PCIDIVMODE_10:
  42. pciclk = txx9_cpu_clock / 10; break;
  43. case TX4938_CCFG_PCIDIVMODE_11:
  44. pciclk = txx9_cpu_clock / 11; break;
  45. }
  46. printk("Internal(%u.%uMHz)",
  47. (pciclk + 50000) / 1000000,
  48. ((pciclk + 50000) / 100000) % 10);
  49. } else {
  50. printk("External");
  51. pciclk = -1;
  52. }
  53. printk("\n");
  54. return pciclk;
  55. }
  56. void __init tx4938_report_pci1clk(void)
  57. {
  58. __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
  59. unsigned int pciclk =
  60. txx9_gbus_clock / ((ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2);
  61. printk(KERN_INFO "PCIC1 -- %sPCICLK:%u.%uMHz\n",
  62. (ccfg & TX4938_CCFG_PCI1_66) ? "PCI66 " : "",
  63. (pciclk + 50000) / 1000000,
  64. ((pciclk + 50000) / 100000) % 10);
  65. }
  66. int __init tx4938_pciclk66_setup(void)
  67. {
  68. int pciclk;
  69. /* Assert M66EN */
  70. tx4938_ccfg_set(TX4938_CCFG_PCI66);
  71. /* Double PCICLK (if possible) */
  72. if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
  73. unsigned int pcidivmode = 0;
  74. u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
  75. pcidivmode = (unsigned long)ccfg &
  76. TX4938_CCFG_PCIDIVMODE_MASK;
  77. switch (pcidivmode) {
  78. case TX4938_CCFG_PCIDIVMODE_8:
  79. case TX4938_CCFG_PCIDIVMODE_4:
  80. pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
  81. pciclk = txx9_cpu_clock / 4;
  82. break;
  83. case TX4938_CCFG_PCIDIVMODE_9:
  84. case TX4938_CCFG_PCIDIVMODE_4_5:
  85. pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
  86. pciclk = txx9_cpu_clock * 2 / 9;
  87. break;
  88. case TX4938_CCFG_PCIDIVMODE_10:
  89. case TX4938_CCFG_PCIDIVMODE_5:
  90. pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
  91. pciclk = txx9_cpu_clock / 5;
  92. break;
  93. case TX4938_CCFG_PCIDIVMODE_11:
  94. case TX4938_CCFG_PCIDIVMODE_5_5:
  95. default:
  96. pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
  97. pciclk = txx9_cpu_clock * 2 / 11;
  98. break;
  99. }
  100. tx4938_ccfg_change(TX4938_CCFG_PCIDIVMODE_MASK,
  101. pcidivmode);
  102. printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
  103. (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg));
  104. } else
  105. pciclk = -1;
  106. return pciclk;
  107. }
  108. int __init tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
  109. {
  110. if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) {
  111. switch (slot) {
  112. case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
  113. if (__raw_readq(&tx4938_ccfgptr->pcfg) &
  114. TX4938_PCFG_ETH0_SEL)
  115. return TXX9_IRQ_BASE + TX4938_IR_ETH0;
  116. break;
  117. case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
  118. if (__raw_readq(&tx4938_ccfgptr->pcfg) &
  119. TX4938_PCFG_ETH1_SEL)
  120. return TXX9_IRQ_BASE + TX4938_IR_ETH1;
  121. break;
  122. }
  123. return 0;
  124. }
  125. return -1;
  126. }
  127. void __init tx4938_setup_pcierr_irq(void)
  128. {
  129. if (request_irq(TXX9_IRQ_BASE + TX4938_IR_PCIERR,
  130. tx4927_pcierr_interrupt,
  131. 0, "PCI error",
  132. (void *)TX4927_PCIC_REG))
  133. printk(KERN_WARNING "Failed to request irq for PCIERR\n");
  134. }