ops-emma2rh.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183
  1. /*
  2. * Copyright (C) NEC Electronics Corporation 2004-2006
  3. *
  4. * This file is based on the arch/mips/pci/ops-vr41xx.c
  5. *
  6. * Copyright 2001 MontaVista Software Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/pci.h>
  23. #include <linux/kernel.h>
  24. #include <linux/types.h>
  25. #include <asm/addrspace.h>
  26. #include <asm/debug.h>
  27. #include <asm/emma/emma2rh.h>
  28. #define RTABORT (0x1<<9)
  29. #define RMABORT (0x1<<10)
  30. #define EMMA2RH_PCI_SLOT_NUM 9 /* 0000:09.0 is final PCI device */
  31. /*
  32. * access config space
  33. */
  34. static int check_args(struct pci_bus *bus, u32 devfn, u32 * bus_num)
  35. {
  36. /* check if the bus is top-level */
  37. if (bus->parent != NULL) {
  38. *bus_num = bus->number;
  39. db_assert(bus_num != NULL);
  40. } else
  41. *bus_num = 0;
  42. if (*bus_num == 0) {
  43. /* Type 0 */
  44. if (PCI_SLOT(devfn) >= 10)
  45. return PCIBIOS_DEVICE_NOT_FOUND;
  46. } else {
  47. /* Type 1 */
  48. if ((*bus_num >= 64) || (PCI_SLOT(devfn) >= 16))
  49. return PCIBIOS_DEVICE_NOT_FOUND;
  50. }
  51. return 0;
  52. }
  53. static inline int set_pci_configuration_address(unsigned char bus_num,
  54. unsigned int devfn, int where)
  55. {
  56. u32 config_win0;
  57. emma2rh_out32(EMMA2RH_PCI_INT, ~RMABORT);
  58. if (bus_num == 0)
  59. /*
  60. * Type 0 configuration
  61. */
  62. config_win0 = (1 << (22 + PCI_SLOT(devfn))) | (5 << 9);
  63. else
  64. /*
  65. * Type 1 configuration
  66. */
  67. config_win0 = (bus_num << 26) | (PCI_SLOT(devfn) << 22) |
  68. (1 << 15) | (5 << 9);
  69. emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, config_win0);
  70. return 0;
  71. }
  72. static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
  73. int size, uint32_t * val)
  74. {
  75. u32 bus_num;
  76. u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE);
  77. u32 backup_win0;
  78. u32 data;
  79. *val = 0xffffffffU;
  80. if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
  81. return PCIBIOS_DEVICE_NOT_FOUND;
  82. backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
  83. if (set_pci_configuration_address(bus_num, devfn, where) < 0)
  84. return PCIBIOS_DEVICE_NOT_FOUND;
  85. data =
  86. *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
  87. (where & 0xfffffffc));
  88. switch (size) {
  89. case 1:
  90. *val = (data >> ((where & 3) << 3)) & 0xffU;
  91. break;
  92. case 2:
  93. *val = (data >> ((where & 2) << 3)) & 0xffffU;
  94. break;
  95. case 4:
  96. *val = data;
  97. break;
  98. default:
  99. emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
  100. return PCIBIOS_FUNC_NOT_SUPPORTED;
  101. }
  102. emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
  103. if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
  104. return PCIBIOS_DEVICE_NOT_FOUND;
  105. return PCIBIOS_SUCCESSFUL;
  106. }
  107. static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
  108. int size, u32 val)
  109. {
  110. u32 bus_num;
  111. u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE);
  112. u32 backup_win0;
  113. u32 data;
  114. int shift;
  115. if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
  116. return PCIBIOS_DEVICE_NOT_FOUND;
  117. backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
  118. if (set_pci_configuration_address(bus_num, devfn, where) < 0)
  119. return PCIBIOS_DEVICE_NOT_FOUND;
  120. /* read modify write */
  121. data =
  122. *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
  123. (where & 0xfffffffc));
  124. switch (size) {
  125. case 1:
  126. shift = (where & 3) << 3;
  127. data &= ~(0xffU << shift);
  128. data |= ((val & 0xffU) << shift);
  129. break;
  130. case 2:
  131. shift = (where & 2) << 3;
  132. data &= ~(0xffffU << shift);
  133. data |= ((val & 0xffffU) << shift);
  134. break;
  135. case 4:
  136. data = val;
  137. break;
  138. default:
  139. emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
  140. return PCIBIOS_FUNC_NOT_SUPPORTED;
  141. }
  142. *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
  143. (where & 0xfffffffc)) = data;
  144. emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
  145. if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
  146. return PCIBIOS_DEVICE_NOT_FOUND;
  147. return PCIBIOS_SUCCESSFUL;
  148. }
  149. struct pci_ops emma2rh_pci_ops = {
  150. .read = pci_config_read,
  151. .write = pci_config_write,
  152. };