tlb.c 20 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * KVM/MIPS TLB handling, this file is part of the Linux host kernel so that
  7. * TLB handlers run from KSEG0
  8. *
  9. * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
  10. * Authors: Sanjay Lal <sanjayl@kymasys.com>
  11. */
  12. #include <linux/sched.h>
  13. #include <linux/smp.h>
  14. #include <linux/mm.h>
  15. #include <linux/delay.h>
  16. #include <linux/module.h>
  17. #include <linux/kvm_host.h>
  18. #include <linux/srcu.h>
  19. #include <asm/cpu.h>
  20. #include <asm/bootinfo.h>
  21. #include <asm/mmu_context.h>
  22. #include <asm/pgtable.h>
  23. #include <asm/cacheflush.h>
  24. #include <asm/tlb.h>
  25. #undef CONFIG_MIPS_MT
  26. #include <asm/r4kcache.h>
  27. #define CONFIG_MIPS_MT
  28. #define KVM_GUEST_PC_TLB 0
  29. #define KVM_GUEST_SP_TLB 1
  30. #define PRIx64 "llx"
  31. atomic_t kvm_mips_instance;
  32. EXPORT_SYMBOL(kvm_mips_instance);
  33. /* These function pointers are initialized once the KVM module is loaded */
  34. pfn_t (*kvm_mips_gfn_to_pfn)(struct kvm *kvm, gfn_t gfn);
  35. EXPORT_SYMBOL(kvm_mips_gfn_to_pfn);
  36. void (*kvm_mips_release_pfn_clean)(pfn_t pfn);
  37. EXPORT_SYMBOL(kvm_mips_release_pfn_clean);
  38. bool (*kvm_mips_is_error_pfn)(pfn_t pfn);
  39. EXPORT_SYMBOL(kvm_mips_is_error_pfn);
  40. uint32_t kvm_mips_get_kernel_asid(struct kvm_vcpu *vcpu)
  41. {
  42. return vcpu->arch.guest_kernel_asid[smp_processor_id()] & ASID_MASK;
  43. }
  44. uint32_t kvm_mips_get_user_asid(struct kvm_vcpu *vcpu)
  45. {
  46. return vcpu->arch.guest_user_asid[smp_processor_id()] & ASID_MASK;
  47. }
  48. inline uint32_t kvm_mips_get_commpage_asid(struct kvm_vcpu *vcpu)
  49. {
  50. return vcpu->kvm->arch.commpage_tlb;
  51. }
  52. /* Structure defining an tlb entry data set. */
  53. void kvm_mips_dump_host_tlbs(void)
  54. {
  55. unsigned long old_entryhi;
  56. unsigned long old_pagemask;
  57. struct kvm_mips_tlb tlb;
  58. unsigned long flags;
  59. int i;
  60. local_irq_save(flags);
  61. old_entryhi = read_c0_entryhi();
  62. old_pagemask = read_c0_pagemask();
  63. kvm_info("HOST TLBs:\n");
  64. kvm_info("ASID: %#lx\n", read_c0_entryhi() & ASID_MASK);
  65. for (i = 0; i < current_cpu_data.tlbsize; i++) {
  66. write_c0_index(i);
  67. mtc0_tlbw_hazard();
  68. tlb_read();
  69. tlbw_use_hazard();
  70. tlb.tlb_hi = read_c0_entryhi();
  71. tlb.tlb_lo0 = read_c0_entrylo0();
  72. tlb.tlb_lo1 = read_c0_entrylo1();
  73. tlb.tlb_mask = read_c0_pagemask();
  74. kvm_info("TLB%c%3d Hi 0x%08lx ",
  75. (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
  76. i, tlb.tlb_hi);
  77. kvm_info("Lo0=0x%09" PRIx64 " %c%c attr %lx ",
  78. (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo0),
  79. (tlb.tlb_lo0 & MIPS3_PG_D) ? 'D' : ' ',
  80. (tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
  81. (tlb.tlb_lo0 >> 3) & 7);
  82. kvm_info("Lo1=0x%09" PRIx64 " %c%c attr %lx sz=%lx\n",
  83. (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo1),
  84. (tlb.tlb_lo1 & MIPS3_PG_D) ? 'D' : ' ',
  85. (tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
  86. (tlb.tlb_lo1 >> 3) & 7, tlb.tlb_mask);
  87. }
  88. write_c0_entryhi(old_entryhi);
  89. write_c0_pagemask(old_pagemask);
  90. mtc0_tlbw_hazard();
  91. local_irq_restore(flags);
  92. }
  93. EXPORT_SYMBOL(kvm_mips_dump_host_tlbs);
  94. void kvm_mips_dump_guest_tlbs(struct kvm_vcpu *vcpu)
  95. {
  96. struct mips_coproc *cop0 = vcpu->arch.cop0;
  97. struct kvm_mips_tlb tlb;
  98. int i;
  99. kvm_info("Guest TLBs:\n");
  100. kvm_info("Guest EntryHi: %#lx\n", kvm_read_c0_guest_entryhi(cop0));
  101. for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
  102. tlb = vcpu->arch.guest_tlb[i];
  103. kvm_info("TLB%c%3d Hi 0x%08lx ",
  104. (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
  105. i, tlb.tlb_hi);
  106. kvm_info("Lo0=0x%09" PRIx64 " %c%c attr %lx ",
  107. (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo0),
  108. (tlb.tlb_lo0 & MIPS3_PG_D) ? 'D' : ' ',
  109. (tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
  110. (tlb.tlb_lo0 >> 3) & 7);
  111. kvm_info("Lo1=0x%09" PRIx64 " %c%c attr %lx sz=%lx\n",
  112. (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo1),
  113. (tlb.tlb_lo1 & MIPS3_PG_D) ? 'D' : ' ',
  114. (tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
  115. (tlb.tlb_lo1 >> 3) & 7, tlb.tlb_mask);
  116. }
  117. }
  118. EXPORT_SYMBOL(kvm_mips_dump_guest_tlbs);
  119. static int kvm_mips_map_page(struct kvm *kvm, gfn_t gfn)
  120. {
  121. int srcu_idx, err = 0;
  122. pfn_t pfn;
  123. if (kvm->arch.guest_pmap[gfn] != KVM_INVALID_PAGE)
  124. return 0;
  125. srcu_idx = srcu_read_lock(&kvm->srcu);
  126. pfn = kvm_mips_gfn_to_pfn(kvm, gfn);
  127. if (kvm_mips_is_error_pfn(pfn)) {
  128. kvm_err("Couldn't get pfn for gfn %#" PRIx64 "!\n", gfn);
  129. err = -EFAULT;
  130. goto out;
  131. }
  132. kvm->arch.guest_pmap[gfn] = pfn;
  133. out:
  134. srcu_read_unlock(&kvm->srcu, srcu_idx);
  135. return err;
  136. }
  137. /* Translate guest KSEG0 addresses to Host PA */
  138. unsigned long kvm_mips_translate_guest_kseg0_to_hpa(struct kvm_vcpu *vcpu,
  139. unsigned long gva)
  140. {
  141. gfn_t gfn;
  142. uint32_t offset = gva & ~PAGE_MASK;
  143. struct kvm *kvm = vcpu->kvm;
  144. if (KVM_GUEST_KSEGX(gva) != KVM_GUEST_KSEG0) {
  145. kvm_err("%s/%p: Invalid gva: %#lx\n", __func__,
  146. __builtin_return_address(0), gva);
  147. return KVM_INVALID_PAGE;
  148. }
  149. gfn = (KVM_GUEST_CPHYSADDR(gva) >> PAGE_SHIFT);
  150. if (gfn >= kvm->arch.guest_pmap_npages) {
  151. kvm_err("%s: Invalid gfn: %#llx, GVA: %#lx\n", __func__, gfn,
  152. gva);
  153. return KVM_INVALID_PAGE;
  154. }
  155. if (kvm_mips_map_page(vcpu->kvm, gfn) < 0)
  156. return KVM_INVALID_ADDR;
  157. return (kvm->arch.guest_pmap[gfn] << PAGE_SHIFT) + offset;
  158. }
  159. EXPORT_SYMBOL(kvm_mips_translate_guest_kseg0_to_hpa);
  160. /* XXXKYMA: Must be called with interrupts disabled */
  161. /* set flush_dcache_mask == 0 if no dcache flush required */
  162. int kvm_mips_host_tlb_write(struct kvm_vcpu *vcpu, unsigned long entryhi,
  163. unsigned long entrylo0, unsigned long entrylo1,
  164. int flush_dcache_mask)
  165. {
  166. unsigned long flags;
  167. unsigned long old_entryhi;
  168. int idx;
  169. local_irq_save(flags);
  170. old_entryhi = read_c0_entryhi();
  171. write_c0_entryhi(entryhi);
  172. mtc0_tlbw_hazard();
  173. tlb_probe();
  174. tlb_probe_hazard();
  175. idx = read_c0_index();
  176. if (idx > current_cpu_data.tlbsize) {
  177. kvm_err("%s: Invalid Index: %d\n", __func__, idx);
  178. kvm_mips_dump_host_tlbs();
  179. local_irq_restore(flags);
  180. return -1;
  181. }
  182. write_c0_entrylo0(entrylo0);
  183. write_c0_entrylo1(entrylo1);
  184. mtc0_tlbw_hazard();
  185. if (idx < 0)
  186. tlb_write_random();
  187. else
  188. tlb_write_indexed();
  189. tlbw_use_hazard();
  190. kvm_debug("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0(R): 0x%08lx, entrylo1(R): 0x%08lx\n",
  191. vcpu->arch.pc, idx, read_c0_entryhi(),
  192. read_c0_entrylo0(), read_c0_entrylo1());
  193. /* Flush D-cache */
  194. if (flush_dcache_mask) {
  195. if (entrylo0 & MIPS3_PG_V) {
  196. ++vcpu->stat.flush_dcache_exits;
  197. flush_data_cache_page((entryhi & VPN2_MASK) &
  198. ~flush_dcache_mask);
  199. }
  200. if (entrylo1 & MIPS3_PG_V) {
  201. ++vcpu->stat.flush_dcache_exits;
  202. flush_data_cache_page(((entryhi & VPN2_MASK) &
  203. ~flush_dcache_mask) |
  204. (0x1 << PAGE_SHIFT));
  205. }
  206. }
  207. /* Restore old ASID */
  208. write_c0_entryhi(old_entryhi);
  209. mtc0_tlbw_hazard();
  210. tlbw_use_hazard();
  211. local_irq_restore(flags);
  212. return 0;
  213. }
  214. /* XXXKYMA: Must be called with interrupts disabled */
  215. int kvm_mips_handle_kseg0_tlb_fault(unsigned long badvaddr,
  216. struct kvm_vcpu *vcpu)
  217. {
  218. gfn_t gfn;
  219. pfn_t pfn0, pfn1;
  220. unsigned long vaddr = 0;
  221. unsigned long entryhi = 0, entrylo0 = 0, entrylo1 = 0;
  222. int even;
  223. struct kvm *kvm = vcpu->kvm;
  224. const int flush_dcache_mask = 0;
  225. if (KVM_GUEST_KSEGX(badvaddr) != KVM_GUEST_KSEG0) {
  226. kvm_err("%s: Invalid BadVaddr: %#lx\n", __func__, badvaddr);
  227. kvm_mips_dump_host_tlbs();
  228. return -1;
  229. }
  230. gfn = (KVM_GUEST_CPHYSADDR(badvaddr) >> PAGE_SHIFT);
  231. if (gfn >= kvm->arch.guest_pmap_npages) {
  232. kvm_err("%s: Invalid gfn: %#llx, BadVaddr: %#lx\n", __func__,
  233. gfn, badvaddr);
  234. kvm_mips_dump_host_tlbs();
  235. return -1;
  236. }
  237. even = !(gfn & 0x1);
  238. vaddr = badvaddr & (PAGE_MASK << 1);
  239. if (kvm_mips_map_page(vcpu->kvm, gfn) < 0)
  240. return -1;
  241. if (kvm_mips_map_page(vcpu->kvm, gfn ^ 0x1) < 0)
  242. return -1;
  243. if (even) {
  244. pfn0 = kvm->arch.guest_pmap[gfn];
  245. pfn1 = kvm->arch.guest_pmap[gfn ^ 0x1];
  246. } else {
  247. pfn0 = kvm->arch.guest_pmap[gfn ^ 0x1];
  248. pfn1 = kvm->arch.guest_pmap[gfn];
  249. }
  250. entryhi = (vaddr | kvm_mips_get_kernel_asid(vcpu));
  251. entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) |
  252. (1 << 2) | (0x1 << 1);
  253. entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) | (0x3 << 3) |
  254. (1 << 2) | (0x1 << 1);
  255. return kvm_mips_host_tlb_write(vcpu, entryhi, entrylo0, entrylo1,
  256. flush_dcache_mask);
  257. }
  258. EXPORT_SYMBOL(kvm_mips_handle_kseg0_tlb_fault);
  259. int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr,
  260. struct kvm_vcpu *vcpu)
  261. {
  262. pfn_t pfn0, pfn1;
  263. unsigned long flags, old_entryhi = 0, vaddr = 0;
  264. unsigned long entrylo0 = 0, entrylo1 = 0;
  265. pfn0 = CPHYSADDR(vcpu->arch.kseg0_commpage) >> PAGE_SHIFT;
  266. pfn1 = 0;
  267. entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) |
  268. (1 << 2) | (0x1 << 1);
  269. entrylo1 = 0;
  270. local_irq_save(flags);
  271. old_entryhi = read_c0_entryhi();
  272. vaddr = badvaddr & (PAGE_MASK << 1);
  273. write_c0_entryhi(vaddr | kvm_mips_get_kernel_asid(vcpu));
  274. mtc0_tlbw_hazard();
  275. write_c0_entrylo0(entrylo0);
  276. mtc0_tlbw_hazard();
  277. write_c0_entrylo1(entrylo1);
  278. mtc0_tlbw_hazard();
  279. write_c0_index(kvm_mips_get_commpage_asid(vcpu));
  280. mtc0_tlbw_hazard();
  281. tlb_write_indexed();
  282. mtc0_tlbw_hazard();
  283. tlbw_use_hazard();
  284. kvm_debug("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0 (R): 0x%08lx, entrylo1(R): 0x%08lx\n",
  285. vcpu->arch.pc, read_c0_index(), read_c0_entryhi(),
  286. read_c0_entrylo0(), read_c0_entrylo1());
  287. /* Restore old ASID */
  288. write_c0_entryhi(old_entryhi);
  289. mtc0_tlbw_hazard();
  290. tlbw_use_hazard();
  291. local_irq_restore(flags);
  292. return 0;
  293. }
  294. EXPORT_SYMBOL(kvm_mips_handle_commpage_tlb_fault);
  295. int kvm_mips_handle_mapped_seg_tlb_fault(struct kvm_vcpu *vcpu,
  296. struct kvm_mips_tlb *tlb,
  297. unsigned long *hpa0,
  298. unsigned long *hpa1)
  299. {
  300. unsigned long entryhi = 0, entrylo0 = 0, entrylo1 = 0;
  301. struct kvm *kvm = vcpu->kvm;
  302. pfn_t pfn0, pfn1;
  303. if ((tlb->tlb_hi & VPN2_MASK) == 0) {
  304. pfn0 = 0;
  305. pfn1 = 0;
  306. } else {
  307. if (kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo0)
  308. >> PAGE_SHIFT) < 0)
  309. return -1;
  310. if (kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo1)
  311. >> PAGE_SHIFT) < 0)
  312. return -1;
  313. pfn0 = kvm->arch.guest_pmap[mips3_tlbpfn_to_paddr(tlb->tlb_lo0)
  314. >> PAGE_SHIFT];
  315. pfn1 = kvm->arch.guest_pmap[mips3_tlbpfn_to_paddr(tlb->tlb_lo1)
  316. >> PAGE_SHIFT];
  317. }
  318. if (hpa0)
  319. *hpa0 = pfn0 << PAGE_SHIFT;
  320. if (hpa1)
  321. *hpa1 = pfn1 << PAGE_SHIFT;
  322. /* Get attributes from the Guest TLB */
  323. entryhi = (tlb->tlb_hi & VPN2_MASK) | (KVM_GUEST_KERNEL_MODE(vcpu) ?
  324. kvm_mips_get_kernel_asid(vcpu) :
  325. kvm_mips_get_user_asid(vcpu));
  326. entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) |
  327. (tlb->tlb_lo0 & MIPS3_PG_D) | (tlb->tlb_lo0 & MIPS3_PG_V);
  328. entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) | (0x3 << 3) |
  329. (tlb->tlb_lo1 & MIPS3_PG_D) | (tlb->tlb_lo1 & MIPS3_PG_V);
  330. kvm_debug("@ %#lx tlb_lo0: 0x%08lx tlb_lo1: 0x%08lx\n", vcpu->arch.pc,
  331. tlb->tlb_lo0, tlb->tlb_lo1);
  332. return kvm_mips_host_tlb_write(vcpu, entryhi, entrylo0, entrylo1,
  333. tlb->tlb_mask);
  334. }
  335. EXPORT_SYMBOL(kvm_mips_handle_mapped_seg_tlb_fault);
  336. int kvm_mips_guest_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long entryhi)
  337. {
  338. int i;
  339. int index = -1;
  340. struct kvm_mips_tlb *tlb = vcpu->arch.guest_tlb;
  341. for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
  342. if (TLB_HI_VPN2_HIT(tlb[i], entryhi) &&
  343. TLB_HI_ASID_HIT(tlb[i], entryhi)) {
  344. index = i;
  345. break;
  346. }
  347. }
  348. kvm_debug("%s: entryhi: %#lx, index: %d lo0: %#lx, lo1: %#lx\n",
  349. __func__, entryhi, index, tlb[i].tlb_lo0, tlb[i].tlb_lo1);
  350. return index;
  351. }
  352. EXPORT_SYMBOL(kvm_mips_guest_tlb_lookup);
  353. int kvm_mips_host_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long vaddr)
  354. {
  355. unsigned long old_entryhi, flags;
  356. int idx;
  357. local_irq_save(flags);
  358. old_entryhi = read_c0_entryhi();
  359. if (KVM_GUEST_KERNEL_MODE(vcpu))
  360. write_c0_entryhi((vaddr & VPN2_MASK) |
  361. kvm_mips_get_kernel_asid(vcpu));
  362. else {
  363. write_c0_entryhi((vaddr & VPN2_MASK) |
  364. kvm_mips_get_user_asid(vcpu));
  365. }
  366. mtc0_tlbw_hazard();
  367. tlb_probe();
  368. tlb_probe_hazard();
  369. idx = read_c0_index();
  370. /* Restore old ASID */
  371. write_c0_entryhi(old_entryhi);
  372. mtc0_tlbw_hazard();
  373. tlbw_use_hazard();
  374. local_irq_restore(flags);
  375. kvm_debug("Host TLB lookup, %#lx, idx: %2d\n", vaddr, idx);
  376. return idx;
  377. }
  378. EXPORT_SYMBOL(kvm_mips_host_tlb_lookup);
  379. int kvm_mips_host_tlb_inv(struct kvm_vcpu *vcpu, unsigned long va)
  380. {
  381. int idx;
  382. unsigned long flags, old_entryhi;
  383. local_irq_save(flags);
  384. old_entryhi = read_c0_entryhi();
  385. write_c0_entryhi((va & VPN2_MASK) | kvm_mips_get_user_asid(vcpu));
  386. mtc0_tlbw_hazard();
  387. tlb_probe();
  388. tlb_probe_hazard();
  389. idx = read_c0_index();
  390. if (idx >= current_cpu_data.tlbsize)
  391. BUG();
  392. if (idx > 0) {
  393. write_c0_entryhi(UNIQUE_ENTRYHI(idx));
  394. mtc0_tlbw_hazard();
  395. write_c0_entrylo0(0);
  396. mtc0_tlbw_hazard();
  397. write_c0_entrylo1(0);
  398. mtc0_tlbw_hazard();
  399. tlb_write_indexed();
  400. mtc0_tlbw_hazard();
  401. }
  402. write_c0_entryhi(old_entryhi);
  403. mtc0_tlbw_hazard();
  404. tlbw_use_hazard();
  405. local_irq_restore(flags);
  406. if (idx > 0)
  407. kvm_debug("%s: Invalidated entryhi %#lx @ idx %d\n", __func__,
  408. (va & VPN2_MASK) | kvm_mips_get_user_asid(vcpu), idx);
  409. return 0;
  410. }
  411. EXPORT_SYMBOL(kvm_mips_host_tlb_inv);
  412. /* XXXKYMA: Fix Guest USER/KERNEL no longer share the same ASID */
  413. int kvm_mips_host_tlb_inv_index(struct kvm_vcpu *vcpu, int index)
  414. {
  415. unsigned long flags, old_entryhi;
  416. if (index >= current_cpu_data.tlbsize)
  417. BUG();
  418. local_irq_save(flags);
  419. old_entryhi = read_c0_entryhi();
  420. write_c0_entryhi(UNIQUE_ENTRYHI(index));
  421. mtc0_tlbw_hazard();
  422. write_c0_index(index);
  423. mtc0_tlbw_hazard();
  424. write_c0_entrylo0(0);
  425. mtc0_tlbw_hazard();
  426. write_c0_entrylo1(0);
  427. mtc0_tlbw_hazard();
  428. tlb_write_indexed();
  429. mtc0_tlbw_hazard();
  430. tlbw_use_hazard();
  431. write_c0_entryhi(old_entryhi);
  432. mtc0_tlbw_hazard();
  433. tlbw_use_hazard();
  434. local_irq_restore(flags);
  435. return 0;
  436. }
  437. void kvm_mips_flush_host_tlb(int skip_kseg0)
  438. {
  439. unsigned long flags;
  440. unsigned long old_entryhi, entryhi;
  441. unsigned long old_pagemask;
  442. int entry = 0;
  443. int maxentry = current_cpu_data.tlbsize;
  444. local_irq_save(flags);
  445. old_entryhi = read_c0_entryhi();
  446. old_pagemask = read_c0_pagemask();
  447. /* Blast 'em all away. */
  448. for (entry = 0; entry < maxentry; entry++) {
  449. write_c0_index(entry);
  450. mtc0_tlbw_hazard();
  451. if (skip_kseg0) {
  452. tlb_read();
  453. tlbw_use_hazard();
  454. entryhi = read_c0_entryhi();
  455. /* Don't blow away guest kernel entries */
  456. if (KVM_GUEST_KSEGX(entryhi) == KVM_GUEST_KSEG0)
  457. continue;
  458. }
  459. /* Make sure all entries differ. */
  460. write_c0_entryhi(UNIQUE_ENTRYHI(entry));
  461. mtc0_tlbw_hazard();
  462. write_c0_entrylo0(0);
  463. mtc0_tlbw_hazard();
  464. write_c0_entrylo1(0);
  465. mtc0_tlbw_hazard();
  466. tlb_write_indexed();
  467. mtc0_tlbw_hazard();
  468. }
  469. tlbw_use_hazard();
  470. write_c0_entryhi(old_entryhi);
  471. write_c0_pagemask(old_pagemask);
  472. mtc0_tlbw_hazard();
  473. tlbw_use_hazard();
  474. local_irq_restore(flags);
  475. }
  476. EXPORT_SYMBOL(kvm_mips_flush_host_tlb);
  477. void kvm_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu,
  478. struct kvm_vcpu *vcpu)
  479. {
  480. unsigned long asid = asid_cache(cpu);
  481. asid += ASID_INC;
  482. if (!(asid & ASID_MASK)) {
  483. if (cpu_has_vtag_icache)
  484. flush_icache_all();
  485. kvm_local_flush_tlb_all(); /* start new asid cycle */
  486. if (!asid) /* fix version if needed */
  487. asid = ASID_FIRST_VERSION;
  488. }
  489. cpu_context(cpu, mm) = asid_cache(cpu) = asid;
  490. }
  491. void kvm_local_flush_tlb_all(void)
  492. {
  493. unsigned long flags;
  494. unsigned long old_ctx;
  495. int entry = 0;
  496. local_irq_save(flags);
  497. /* Save old context and create impossible VPN2 value */
  498. old_ctx = read_c0_entryhi();
  499. write_c0_entrylo0(0);
  500. write_c0_entrylo1(0);
  501. /* Blast 'em all away. */
  502. while (entry < current_cpu_data.tlbsize) {
  503. /* Make sure all entries differ. */
  504. write_c0_entryhi(UNIQUE_ENTRYHI(entry));
  505. write_c0_index(entry);
  506. mtc0_tlbw_hazard();
  507. tlb_write_indexed();
  508. entry++;
  509. }
  510. tlbw_use_hazard();
  511. write_c0_entryhi(old_ctx);
  512. mtc0_tlbw_hazard();
  513. local_irq_restore(flags);
  514. }
  515. EXPORT_SYMBOL(kvm_local_flush_tlb_all);
  516. /**
  517. * kvm_mips_migrate_count() - Migrate timer.
  518. * @vcpu: Virtual CPU.
  519. *
  520. * Migrate CP0_Count hrtimer to the current CPU by cancelling and restarting it
  521. * if it was running prior to being cancelled.
  522. *
  523. * Must be called when the VCPU is migrated to a different CPU to ensure that
  524. * timer expiry during guest execution interrupts the guest and causes the
  525. * interrupt to be delivered in a timely manner.
  526. */
  527. static void kvm_mips_migrate_count(struct kvm_vcpu *vcpu)
  528. {
  529. if (hrtimer_cancel(&vcpu->arch.comparecount_timer))
  530. hrtimer_restart(&vcpu->arch.comparecount_timer);
  531. }
  532. /* Restore ASID once we are scheduled back after preemption */
  533. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  534. {
  535. unsigned long flags;
  536. int newasid = 0;
  537. kvm_debug("%s: vcpu %p, cpu: %d\n", __func__, vcpu, cpu);
  538. /* Alocate new kernel and user ASIDs if needed */
  539. local_irq_save(flags);
  540. if (((vcpu->arch.
  541. guest_kernel_asid[cpu] ^ asid_cache(cpu)) & ASID_VERSION_MASK)) {
  542. kvm_get_new_mmu_context(&vcpu->arch.guest_kernel_mm, cpu, vcpu);
  543. vcpu->arch.guest_kernel_asid[cpu] =
  544. vcpu->arch.guest_kernel_mm.context.asid[cpu];
  545. kvm_get_new_mmu_context(&vcpu->arch.guest_user_mm, cpu, vcpu);
  546. vcpu->arch.guest_user_asid[cpu] =
  547. vcpu->arch.guest_user_mm.context.asid[cpu];
  548. newasid++;
  549. kvm_debug("[%d]: cpu_context: %#lx\n", cpu,
  550. cpu_context(cpu, current->mm));
  551. kvm_debug("[%d]: Allocated new ASID for Guest Kernel: %#x\n",
  552. cpu, vcpu->arch.guest_kernel_asid[cpu]);
  553. kvm_debug("[%d]: Allocated new ASID for Guest User: %#x\n", cpu,
  554. vcpu->arch.guest_user_asid[cpu]);
  555. }
  556. if (vcpu->arch.last_sched_cpu != cpu) {
  557. kvm_debug("[%d->%d]KVM VCPU[%d] switch\n",
  558. vcpu->arch.last_sched_cpu, cpu, vcpu->vcpu_id);
  559. /*
  560. * Migrate the timer interrupt to the current CPU so that it
  561. * always interrupts the guest and synchronously triggers a
  562. * guest timer interrupt.
  563. */
  564. kvm_mips_migrate_count(vcpu);
  565. }
  566. if (!newasid) {
  567. /*
  568. * If we preempted while the guest was executing, then reload
  569. * the pre-empted ASID
  570. */
  571. if (current->flags & PF_VCPU) {
  572. write_c0_entryhi(vcpu->arch.
  573. preempt_entryhi & ASID_MASK);
  574. ehb();
  575. }
  576. } else {
  577. /* New ASIDs were allocated for the VM */
  578. /*
  579. * Were we in guest context? If so then the pre-empted ASID is
  580. * no longer valid, we need to set it to what it should be based
  581. * on the mode of the Guest (Kernel/User)
  582. */
  583. if (current->flags & PF_VCPU) {
  584. if (KVM_GUEST_KERNEL_MODE(vcpu))
  585. write_c0_entryhi(vcpu->arch.
  586. guest_kernel_asid[cpu] &
  587. ASID_MASK);
  588. else
  589. write_c0_entryhi(vcpu->arch.
  590. guest_user_asid[cpu] &
  591. ASID_MASK);
  592. ehb();
  593. }
  594. }
  595. /* restore guest state to registers */
  596. kvm_mips_callbacks->vcpu_set_regs(vcpu);
  597. local_irq_restore(flags);
  598. }
  599. EXPORT_SYMBOL(kvm_arch_vcpu_load);
  600. /* ASID can change if another task is scheduled during preemption */
  601. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  602. {
  603. unsigned long flags;
  604. uint32_t cpu;
  605. local_irq_save(flags);
  606. cpu = smp_processor_id();
  607. vcpu->arch.preempt_entryhi = read_c0_entryhi();
  608. vcpu->arch.last_sched_cpu = cpu;
  609. /* save guest state in registers */
  610. kvm_mips_callbacks->vcpu_get_regs(vcpu);
  611. if (((cpu_context(cpu, current->mm) ^ asid_cache(cpu)) &
  612. ASID_VERSION_MASK)) {
  613. kvm_debug("%s: Dropping MMU Context: %#lx\n", __func__,
  614. cpu_context(cpu, current->mm));
  615. drop_mmu_context(current->mm, cpu);
  616. }
  617. write_c0_entryhi(cpu_asid(cpu, current->mm));
  618. ehb();
  619. local_irq_restore(flags);
  620. }
  621. EXPORT_SYMBOL(kvm_arch_vcpu_put);
  622. uint32_t kvm_get_inst(uint32_t *opc, struct kvm_vcpu *vcpu)
  623. {
  624. struct mips_coproc *cop0 = vcpu->arch.cop0;
  625. unsigned long paddr, flags, vpn2, asid;
  626. uint32_t inst;
  627. int index;
  628. if (KVM_GUEST_KSEGX((unsigned long) opc) < KVM_GUEST_KSEG0 ||
  629. KVM_GUEST_KSEGX((unsigned long) opc) == KVM_GUEST_KSEG23) {
  630. local_irq_save(flags);
  631. index = kvm_mips_host_tlb_lookup(vcpu, (unsigned long) opc);
  632. if (index >= 0) {
  633. inst = *(opc);
  634. } else {
  635. vpn2 = (unsigned long) opc & VPN2_MASK;
  636. asid = kvm_read_c0_guest_entryhi(cop0) & ASID_MASK;
  637. index = kvm_mips_guest_tlb_lookup(vcpu, vpn2 | asid);
  638. if (index < 0) {
  639. kvm_err("%s: get_user_failed for %p, vcpu: %p, ASID: %#lx\n",
  640. __func__, opc, vcpu, read_c0_entryhi());
  641. kvm_mips_dump_host_tlbs();
  642. local_irq_restore(flags);
  643. return KVM_INVALID_INST;
  644. }
  645. kvm_mips_handle_mapped_seg_tlb_fault(vcpu,
  646. &vcpu->arch.
  647. guest_tlb[index],
  648. NULL, NULL);
  649. inst = *(opc);
  650. }
  651. local_irq_restore(flags);
  652. } else if (KVM_GUEST_KSEGX(opc) == KVM_GUEST_KSEG0) {
  653. paddr =
  654. kvm_mips_translate_guest_kseg0_to_hpa(vcpu,
  655. (unsigned long) opc);
  656. inst = *(uint32_t *) CKSEG0ADDR(paddr);
  657. } else {
  658. kvm_err("%s: illegal address: %p\n", __func__, opc);
  659. return KVM_INVALID_INST;
  660. }
  661. return inst;
  662. }
  663. EXPORT_SYMBOL(kvm_get_inst);