ptrace.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837
  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 Ross Biro
  7. * Copyright (C) Linus Torvalds
  8. * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
  9. * Copyright (C) 1996 David S. Miller
  10. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  11. * Copyright (C) 1999 MIPS Technologies, Inc.
  12. * Copyright (C) 2000 Ulf Carlsson
  13. *
  14. * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  15. * binaries.
  16. */
  17. #include <linux/compiler.h>
  18. #include <linux/context_tracking.h>
  19. #include <linux/elf.h>
  20. #include <linux/kernel.h>
  21. #include <linux/sched.h>
  22. #include <linux/mm.h>
  23. #include <linux/errno.h>
  24. #include <linux/ptrace.h>
  25. #include <linux/regset.h>
  26. #include <linux/smp.h>
  27. #include <linux/security.h>
  28. #include <linux/tracehook.h>
  29. #include <linux/audit.h>
  30. #include <linux/seccomp.h>
  31. #include <linux/ftrace.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/cpu.h>
  34. #include <asm/cpu-info.h>
  35. #include <asm/dsp.h>
  36. #include <asm/fpu.h>
  37. #include <asm/mipsregs.h>
  38. #include <asm/mipsmtregs.h>
  39. #include <asm/pgtable.h>
  40. #include <asm/page.h>
  41. #include <asm/syscall.h>
  42. #include <asm/uaccess.h>
  43. #include <asm/bootinfo.h>
  44. #include <asm/reg.h>
  45. #define CREATE_TRACE_POINTS
  46. #include <trace/events/syscalls.h>
  47. static void init_fp_ctx(struct task_struct *target)
  48. {
  49. /* If FP has been used then the target already has context */
  50. if (tsk_used_math(target))
  51. return;
  52. /* Begin with data registers set to all 1s... */
  53. memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
  54. /* ...and FCSR zeroed */
  55. target->thread.fpu.fcr31 = 0;
  56. /*
  57. * Record that the target has "used" math, such that the context
  58. * just initialised, and any modifications made by the caller,
  59. * aren't discarded.
  60. */
  61. set_stopped_child_used_math(target);
  62. }
  63. /*
  64. * Called by kernel/ptrace.c when detaching..
  65. *
  66. * Make sure single step bits etc are not set.
  67. */
  68. void ptrace_disable(struct task_struct *child)
  69. {
  70. /* Don't load the watchpoint registers for the ex-child. */
  71. clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
  72. }
  73. /*
  74. * Read a general register set. We always use the 64-bit format, even
  75. * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
  76. * Registers are sign extended to fill the available space.
  77. */
  78. int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
  79. {
  80. struct pt_regs *regs;
  81. int i;
  82. if (!access_ok(VERIFY_WRITE, data, 38 * 8))
  83. return -EIO;
  84. regs = task_pt_regs(child);
  85. for (i = 0; i < 32; i++)
  86. __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
  87. __put_user((long)regs->lo, (__s64 __user *)&data->lo);
  88. __put_user((long)regs->hi, (__s64 __user *)&data->hi);
  89. __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
  90. __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
  91. __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
  92. __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
  93. return 0;
  94. }
  95. /*
  96. * Write a general register set. As for PTRACE_GETREGS, we always use
  97. * the 64-bit format. On a 32-bit kernel only the lower order half
  98. * (according to endianness) will be used.
  99. */
  100. int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
  101. {
  102. struct pt_regs *regs;
  103. int i;
  104. if (!access_ok(VERIFY_READ, data, 38 * 8))
  105. return -EIO;
  106. regs = task_pt_regs(child);
  107. for (i = 0; i < 32; i++)
  108. __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
  109. __get_user(regs->lo, (__s64 __user *)&data->lo);
  110. __get_user(regs->hi, (__s64 __user *)&data->hi);
  111. __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
  112. /* badvaddr, status, and cause may not be written. */
  113. return 0;
  114. }
  115. int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
  116. {
  117. int i;
  118. if (!access_ok(VERIFY_WRITE, data, 33 * 8))
  119. return -EIO;
  120. if (tsk_used_math(child)) {
  121. union fpureg *fregs = get_fpu_regs(child);
  122. for (i = 0; i < 32; i++)
  123. __put_user(get_fpr64(&fregs[i], 0),
  124. i + (__u64 __user *)data);
  125. } else {
  126. for (i = 0; i < 32; i++)
  127. __put_user((__u64) -1, i + (__u64 __user *) data);
  128. }
  129. __put_user(child->thread.fpu.fcr31, data + 64);
  130. __put_user(boot_cpu_data.fpu_id, data + 65);
  131. return 0;
  132. }
  133. int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
  134. {
  135. union fpureg *fregs;
  136. u64 fpr_val;
  137. u32 fcr31;
  138. u32 value;
  139. u32 mask;
  140. int i;
  141. if (!access_ok(VERIFY_READ, data, 33 * 8))
  142. return -EIO;
  143. init_fp_ctx(child);
  144. fregs = get_fpu_regs(child);
  145. for (i = 0; i < 32; i++) {
  146. __get_user(fpr_val, i + (__u64 __user *)data);
  147. set_fpr64(&fregs[i], 0, fpr_val);
  148. }
  149. __get_user(value, data + 64);
  150. fcr31 = child->thread.fpu.fcr31;
  151. mask = boot_cpu_data.fpu_msk31;
  152. child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
  153. /* FIR may not be written. */
  154. return 0;
  155. }
  156. int ptrace_get_watch_regs(struct task_struct *child,
  157. struct pt_watch_regs __user *addr)
  158. {
  159. enum pt_watch_style style;
  160. int i;
  161. if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
  162. return -EIO;
  163. if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
  164. return -EIO;
  165. #ifdef CONFIG_32BIT
  166. style = pt_watch_style_mips32;
  167. #define WATCH_STYLE mips32
  168. #else
  169. style = pt_watch_style_mips64;
  170. #define WATCH_STYLE mips64
  171. #endif
  172. __put_user(style, &addr->style);
  173. __put_user(boot_cpu_data.watch_reg_use_cnt,
  174. &addr->WATCH_STYLE.num_valid);
  175. for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
  176. __put_user(child->thread.watch.mips3264.watchlo[i],
  177. &addr->WATCH_STYLE.watchlo[i]);
  178. __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
  179. &addr->WATCH_STYLE.watchhi[i]);
  180. __put_user(boot_cpu_data.watch_reg_masks[i],
  181. &addr->WATCH_STYLE.watch_masks[i]);
  182. }
  183. for (; i < 8; i++) {
  184. __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
  185. __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
  186. __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
  187. }
  188. return 0;
  189. }
  190. int ptrace_set_watch_regs(struct task_struct *child,
  191. struct pt_watch_regs __user *addr)
  192. {
  193. int i;
  194. int watch_active = 0;
  195. unsigned long lt[NUM_WATCH_REGS];
  196. u16 ht[NUM_WATCH_REGS];
  197. if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
  198. return -EIO;
  199. if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
  200. return -EIO;
  201. /* Check the values. */
  202. for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
  203. __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
  204. #ifdef CONFIG_32BIT
  205. if (lt[i] & __UA_LIMIT)
  206. return -EINVAL;
  207. #else
  208. if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
  209. if (lt[i] & 0xffffffff80000000UL)
  210. return -EINVAL;
  211. } else {
  212. if (lt[i] & __UA_LIMIT)
  213. return -EINVAL;
  214. }
  215. #endif
  216. __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
  217. if (ht[i] & ~0xff8)
  218. return -EINVAL;
  219. }
  220. /* Install them. */
  221. for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
  222. if (lt[i] & 7)
  223. watch_active = 1;
  224. child->thread.watch.mips3264.watchlo[i] = lt[i];
  225. /* Set the G bit. */
  226. child->thread.watch.mips3264.watchhi[i] = ht[i];
  227. }
  228. if (watch_active)
  229. set_tsk_thread_flag(child, TIF_LOAD_WATCH);
  230. else
  231. clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
  232. return 0;
  233. }
  234. /* regset get/set implementations */
  235. #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
  236. static int gpr32_get(struct task_struct *target,
  237. const struct user_regset *regset,
  238. unsigned int pos, unsigned int count,
  239. void *kbuf, void __user *ubuf)
  240. {
  241. struct pt_regs *regs = task_pt_regs(target);
  242. u32 uregs[ELF_NGREG] = {};
  243. unsigned i;
  244. for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
  245. /* k0/k1 are copied as zero. */
  246. if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
  247. continue;
  248. uregs[i] = regs->regs[i - MIPS32_EF_R0];
  249. }
  250. uregs[MIPS32_EF_LO] = regs->lo;
  251. uregs[MIPS32_EF_HI] = regs->hi;
  252. uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
  253. uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
  254. uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
  255. uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
  256. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
  257. sizeof(uregs));
  258. }
  259. static int gpr32_set(struct task_struct *target,
  260. const struct user_regset *regset,
  261. unsigned int pos, unsigned int count,
  262. const void *kbuf, const void __user *ubuf)
  263. {
  264. struct pt_regs *regs = task_pt_regs(target);
  265. u32 uregs[ELF_NGREG];
  266. unsigned start, num_regs, i;
  267. int err;
  268. start = pos / sizeof(u32);
  269. num_regs = count / sizeof(u32);
  270. if (start + num_regs > ELF_NGREG)
  271. return -EIO;
  272. err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
  273. sizeof(uregs));
  274. if (err)
  275. return err;
  276. for (i = start; i < num_regs; i++) {
  277. /*
  278. * Cast all values to signed here so that if this is a 64-bit
  279. * kernel, the supplied 32-bit values will be sign extended.
  280. */
  281. switch (i) {
  282. case MIPS32_EF_R1 ... MIPS32_EF_R25:
  283. /* k0/k1 are ignored. */
  284. case MIPS32_EF_R28 ... MIPS32_EF_R31:
  285. regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
  286. break;
  287. case MIPS32_EF_LO:
  288. regs->lo = (s32)uregs[i];
  289. break;
  290. case MIPS32_EF_HI:
  291. regs->hi = (s32)uregs[i];
  292. break;
  293. case MIPS32_EF_CP0_EPC:
  294. regs->cp0_epc = (s32)uregs[i];
  295. break;
  296. }
  297. }
  298. return 0;
  299. }
  300. #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
  301. #ifdef CONFIG_64BIT
  302. static int gpr64_get(struct task_struct *target,
  303. const struct user_regset *regset,
  304. unsigned int pos, unsigned int count,
  305. void *kbuf, void __user *ubuf)
  306. {
  307. struct pt_regs *regs = task_pt_regs(target);
  308. u64 uregs[ELF_NGREG] = {};
  309. unsigned i;
  310. for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
  311. /* k0/k1 are copied as zero. */
  312. if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
  313. continue;
  314. uregs[i] = regs->regs[i - MIPS64_EF_R0];
  315. }
  316. uregs[MIPS64_EF_LO] = regs->lo;
  317. uregs[MIPS64_EF_HI] = regs->hi;
  318. uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
  319. uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
  320. uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
  321. uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
  322. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
  323. sizeof(uregs));
  324. }
  325. static int gpr64_set(struct task_struct *target,
  326. const struct user_regset *regset,
  327. unsigned int pos, unsigned int count,
  328. const void *kbuf, const void __user *ubuf)
  329. {
  330. struct pt_regs *regs = task_pt_regs(target);
  331. u64 uregs[ELF_NGREG];
  332. unsigned start, num_regs, i;
  333. int err;
  334. start = pos / sizeof(u64);
  335. num_regs = count / sizeof(u64);
  336. if (start + num_regs > ELF_NGREG)
  337. return -EIO;
  338. err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
  339. sizeof(uregs));
  340. if (err)
  341. return err;
  342. for (i = start; i < num_regs; i++) {
  343. switch (i) {
  344. case MIPS64_EF_R1 ... MIPS64_EF_R25:
  345. /* k0/k1 are ignored. */
  346. case MIPS64_EF_R28 ... MIPS64_EF_R31:
  347. regs->regs[i - MIPS64_EF_R0] = uregs[i];
  348. break;
  349. case MIPS64_EF_LO:
  350. regs->lo = uregs[i];
  351. break;
  352. case MIPS64_EF_HI:
  353. regs->hi = uregs[i];
  354. break;
  355. case MIPS64_EF_CP0_EPC:
  356. regs->cp0_epc = uregs[i];
  357. break;
  358. }
  359. }
  360. return 0;
  361. }
  362. #endif /* CONFIG_64BIT */
  363. static int fpr_get(struct task_struct *target,
  364. const struct user_regset *regset,
  365. unsigned int pos, unsigned int count,
  366. void *kbuf, void __user *ubuf)
  367. {
  368. unsigned i;
  369. int err;
  370. u64 fpr_val;
  371. /* XXX fcr31 */
  372. if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
  373. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  374. &target->thread.fpu,
  375. 0, sizeof(elf_fpregset_t));
  376. for (i = 0; i < NUM_FPU_REGS; i++) {
  377. fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
  378. err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  379. &fpr_val, i * sizeof(elf_fpreg_t),
  380. (i + 1) * sizeof(elf_fpreg_t));
  381. if (err)
  382. return err;
  383. }
  384. return 0;
  385. }
  386. static int fpr_set(struct task_struct *target,
  387. const struct user_regset *regset,
  388. unsigned int pos, unsigned int count,
  389. const void *kbuf, const void __user *ubuf)
  390. {
  391. unsigned i;
  392. int err;
  393. u64 fpr_val;
  394. /* XXX fcr31 */
  395. init_fp_ctx(target);
  396. if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
  397. return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  398. &target->thread.fpu,
  399. 0, sizeof(elf_fpregset_t));
  400. for (i = 0; i < NUM_FPU_REGS; i++) {
  401. err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  402. &fpr_val, i * sizeof(elf_fpreg_t),
  403. (i + 1) * sizeof(elf_fpreg_t));
  404. if (err)
  405. return err;
  406. set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
  407. }
  408. return 0;
  409. }
  410. enum mips_regset {
  411. REGSET_GPR,
  412. REGSET_FPR,
  413. };
  414. #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
  415. static const struct user_regset mips_regsets[] = {
  416. [REGSET_GPR] = {
  417. .core_note_type = NT_PRSTATUS,
  418. .n = ELF_NGREG,
  419. .size = sizeof(unsigned int),
  420. .align = sizeof(unsigned int),
  421. .get = gpr32_get,
  422. .set = gpr32_set,
  423. },
  424. [REGSET_FPR] = {
  425. .core_note_type = NT_PRFPREG,
  426. .n = ELF_NFPREG,
  427. .size = sizeof(elf_fpreg_t),
  428. .align = sizeof(elf_fpreg_t),
  429. .get = fpr_get,
  430. .set = fpr_set,
  431. },
  432. };
  433. static const struct user_regset_view user_mips_view = {
  434. .name = "mips",
  435. .e_machine = ELF_ARCH,
  436. .ei_osabi = ELF_OSABI,
  437. .regsets = mips_regsets,
  438. .n = ARRAY_SIZE(mips_regsets),
  439. };
  440. #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
  441. #ifdef CONFIG_64BIT
  442. static const struct user_regset mips64_regsets[] = {
  443. [REGSET_GPR] = {
  444. .core_note_type = NT_PRSTATUS,
  445. .n = ELF_NGREG,
  446. .size = sizeof(unsigned long),
  447. .align = sizeof(unsigned long),
  448. .get = gpr64_get,
  449. .set = gpr64_set,
  450. },
  451. [REGSET_FPR] = {
  452. .core_note_type = NT_PRFPREG,
  453. .n = ELF_NFPREG,
  454. .size = sizeof(elf_fpreg_t),
  455. .align = sizeof(elf_fpreg_t),
  456. .get = fpr_get,
  457. .set = fpr_set,
  458. },
  459. };
  460. static const struct user_regset_view user_mips64_view = {
  461. .name = "mips64",
  462. .e_machine = ELF_ARCH,
  463. .ei_osabi = ELF_OSABI,
  464. .regsets = mips64_regsets,
  465. .n = ARRAY_SIZE(mips64_regsets),
  466. };
  467. #endif /* CONFIG_64BIT */
  468. const struct user_regset_view *task_user_regset_view(struct task_struct *task)
  469. {
  470. #ifdef CONFIG_32BIT
  471. return &user_mips_view;
  472. #else
  473. #ifdef CONFIG_MIPS32_O32
  474. if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
  475. return &user_mips_view;
  476. #endif
  477. return &user_mips64_view;
  478. #endif
  479. }
  480. long arch_ptrace(struct task_struct *child, long request,
  481. unsigned long addr, unsigned long data)
  482. {
  483. int ret;
  484. void __user *addrp = (void __user *) addr;
  485. void __user *datavp = (void __user *) data;
  486. unsigned long __user *datalp = (void __user *) data;
  487. switch (request) {
  488. /* when I and D space are separate, these will need to be fixed. */
  489. case PTRACE_PEEKTEXT: /* read word at location addr. */
  490. case PTRACE_PEEKDATA:
  491. ret = generic_ptrace_peekdata(child, addr, data);
  492. break;
  493. /* Read the word at location addr in the USER area. */
  494. case PTRACE_PEEKUSR: {
  495. struct pt_regs *regs;
  496. union fpureg *fregs;
  497. unsigned long tmp = 0;
  498. regs = task_pt_regs(child);
  499. ret = 0; /* Default return value. */
  500. switch (addr) {
  501. case 0 ... 31:
  502. tmp = regs->regs[addr];
  503. break;
  504. case FPR_BASE ... FPR_BASE + 31:
  505. if (!tsk_used_math(child)) {
  506. /* FP not yet used */
  507. tmp = -1;
  508. break;
  509. }
  510. fregs = get_fpu_regs(child);
  511. #ifdef CONFIG_32BIT
  512. if (test_thread_flag(TIF_32BIT_FPREGS)) {
  513. /*
  514. * The odd registers are actually the high
  515. * order bits of the values stored in the even
  516. * registers - unless we're using r2k_switch.S.
  517. */
  518. tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
  519. addr & 1);
  520. break;
  521. }
  522. #endif
  523. tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
  524. break;
  525. case PC:
  526. tmp = regs->cp0_epc;
  527. break;
  528. case CAUSE:
  529. tmp = regs->cp0_cause;
  530. break;
  531. case BADVADDR:
  532. tmp = regs->cp0_badvaddr;
  533. break;
  534. case MMHI:
  535. tmp = regs->hi;
  536. break;
  537. case MMLO:
  538. tmp = regs->lo;
  539. break;
  540. #ifdef CONFIG_CPU_HAS_SMARTMIPS
  541. case ACX:
  542. tmp = regs->acx;
  543. break;
  544. #endif
  545. case FPC_CSR:
  546. tmp = child->thread.fpu.fcr31;
  547. break;
  548. case FPC_EIR:
  549. /* implementation / version register */
  550. tmp = boot_cpu_data.fpu_id;
  551. break;
  552. case DSP_BASE ... DSP_BASE + 5: {
  553. dspreg_t *dregs;
  554. if (!cpu_has_dsp) {
  555. tmp = 0;
  556. ret = -EIO;
  557. goto out;
  558. }
  559. dregs = __get_dsp_regs(child);
  560. tmp = (unsigned long) (dregs[addr - DSP_BASE]);
  561. break;
  562. }
  563. case DSP_CONTROL:
  564. if (!cpu_has_dsp) {
  565. tmp = 0;
  566. ret = -EIO;
  567. goto out;
  568. }
  569. tmp = child->thread.dsp.dspcontrol;
  570. break;
  571. default:
  572. tmp = 0;
  573. ret = -EIO;
  574. goto out;
  575. }
  576. ret = put_user(tmp, datalp);
  577. break;
  578. }
  579. /* when I and D space are separate, this will have to be fixed. */
  580. case PTRACE_POKETEXT: /* write the word at location addr. */
  581. case PTRACE_POKEDATA:
  582. ret = generic_ptrace_pokedata(child, addr, data);
  583. break;
  584. case PTRACE_POKEUSR: {
  585. struct pt_regs *regs;
  586. ret = 0;
  587. regs = task_pt_regs(child);
  588. switch (addr) {
  589. case 0 ... 31:
  590. regs->regs[addr] = data;
  591. break;
  592. case FPR_BASE ... FPR_BASE + 31: {
  593. union fpureg *fregs = get_fpu_regs(child);
  594. init_fp_ctx(child);
  595. #ifdef CONFIG_32BIT
  596. if (test_thread_flag(TIF_32BIT_FPREGS)) {
  597. /*
  598. * The odd registers are actually the high
  599. * order bits of the values stored in the even
  600. * registers - unless we're using r2k_switch.S.
  601. */
  602. set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
  603. addr & 1, data);
  604. break;
  605. }
  606. #endif
  607. set_fpr64(&fregs[addr - FPR_BASE], 0, data);
  608. break;
  609. }
  610. case PC:
  611. regs->cp0_epc = data;
  612. break;
  613. case MMHI:
  614. regs->hi = data;
  615. break;
  616. case MMLO:
  617. regs->lo = data;
  618. break;
  619. #ifdef CONFIG_CPU_HAS_SMARTMIPS
  620. case ACX:
  621. regs->acx = data;
  622. break;
  623. #endif
  624. case FPC_CSR:
  625. child->thread.fpu.fcr31 = data & ~FPU_CSR_ALL_X;
  626. break;
  627. case DSP_BASE ... DSP_BASE + 5: {
  628. dspreg_t *dregs;
  629. if (!cpu_has_dsp) {
  630. ret = -EIO;
  631. break;
  632. }
  633. dregs = __get_dsp_regs(child);
  634. dregs[addr - DSP_BASE] = data;
  635. break;
  636. }
  637. case DSP_CONTROL:
  638. if (!cpu_has_dsp) {
  639. ret = -EIO;
  640. break;
  641. }
  642. child->thread.dsp.dspcontrol = data;
  643. break;
  644. default:
  645. /* The rest are not allowed. */
  646. ret = -EIO;
  647. break;
  648. }
  649. break;
  650. }
  651. case PTRACE_GETREGS:
  652. ret = ptrace_getregs(child, datavp);
  653. break;
  654. case PTRACE_SETREGS:
  655. ret = ptrace_setregs(child, datavp);
  656. break;
  657. case PTRACE_GETFPREGS:
  658. ret = ptrace_getfpregs(child, datavp);
  659. break;
  660. case PTRACE_SETFPREGS:
  661. ret = ptrace_setfpregs(child, datavp);
  662. break;
  663. case PTRACE_GET_THREAD_AREA:
  664. ret = put_user(task_thread_info(child)->tp_value, datalp);
  665. break;
  666. case PTRACE_GET_WATCH_REGS:
  667. ret = ptrace_get_watch_regs(child, addrp);
  668. break;
  669. case PTRACE_SET_WATCH_REGS:
  670. ret = ptrace_set_watch_regs(child, addrp);
  671. break;
  672. default:
  673. ret = ptrace_request(child, request, addr, data);
  674. break;
  675. }
  676. out:
  677. return ret;
  678. }
  679. /*
  680. * Notification of system call entry/exit
  681. * - triggered by current->work.syscall_trace
  682. */
  683. asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
  684. {
  685. long ret = 0;
  686. user_exit();
  687. current_thread_info()->syscall = syscall;
  688. if (secure_computing() == -1)
  689. return -1;
  690. if (test_thread_flag(TIF_SYSCALL_TRACE) &&
  691. tracehook_report_syscall_entry(regs))
  692. ret = -1;
  693. if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
  694. trace_sys_enter(regs, regs->regs[2]);
  695. audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
  696. regs->regs[6], regs->regs[7]);
  697. return syscall;
  698. }
  699. /*
  700. * Notification of system call entry/exit
  701. * - triggered by current->work.syscall_trace
  702. */
  703. asmlinkage void syscall_trace_leave(struct pt_regs *regs)
  704. {
  705. /*
  706. * We may come here right after calling schedule_user()
  707. * or do_notify_resume(), in which case we can be in RCU
  708. * user mode.
  709. */
  710. user_exit();
  711. audit_syscall_exit(regs);
  712. if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
  713. trace_sys_exit(regs, regs->regs[2]);
  714. if (test_thread_flag(TIF_SYSCALL_TRACE))
  715. tracehook_report_syscall_exit(regs, 0);
  716. user_enter();
  717. }