jump_label.c 2.1 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (c) 2010 Cavium Networks, Inc.
  7. */
  8. #include <linux/jump_label.h>
  9. #include <linux/kernel.h>
  10. #include <linux/memory.h>
  11. #include <linux/mutex.h>
  12. #include <linux/types.h>
  13. #include <linux/cpu.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/inst.h>
  16. #ifdef HAVE_JUMP_LABEL
  17. /*
  18. * Define parameters for the standard MIPS and the microMIPS jump
  19. * instruction encoding respectively:
  20. *
  21. * - the ISA bit of the target, either 0 or 1 respectively,
  22. *
  23. * - the amount the jump target address is shifted right to fit in the
  24. * immediate field of the machine instruction, either 2 or 1,
  25. *
  26. * - the mask determining the size of the jump region relative to the
  27. * delay-slot instruction, either 256MB or 128MB,
  28. *
  29. * - the jump target alignment, either 4 or 2 bytes.
  30. */
  31. #define J_ISA_BIT IS_ENABLED(CONFIG_CPU_MICROMIPS)
  32. #define J_RANGE_SHIFT (2 - J_ISA_BIT)
  33. #define J_RANGE_MASK ((1ul << (26 + J_RANGE_SHIFT)) - 1)
  34. #define J_ALIGN_MASK ((1ul << J_RANGE_SHIFT) - 1)
  35. void arch_jump_label_transform(struct jump_entry *e,
  36. enum jump_label_type type)
  37. {
  38. union mips_instruction *insn_p;
  39. union mips_instruction insn;
  40. insn_p = (union mips_instruction *)msk_isa16_mode(e->code);
  41. /* Jump only works within an aligned region its delay slot is in. */
  42. BUG_ON((e->target & ~J_RANGE_MASK) != ((e->code + 4) & ~J_RANGE_MASK));
  43. /* Target must have the right alignment and ISA must be preserved. */
  44. BUG_ON((e->target & J_ALIGN_MASK) != J_ISA_BIT);
  45. if (type == JUMP_LABEL_ENABLE) {
  46. insn.j_format.opcode = J_ISA_BIT ? mm_j32_op : j_op;
  47. insn.j_format.target = e->target >> J_RANGE_SHIFT;
  48. } else {
  49. insn.word = 0; /* nop */
  50. }
  51. get_online_cpus();
  52. mutex_lock(&text_mutex);
  53. if (IS_ENABLED(CONFIG_CPU_MICROMIPS)) {
  54. insn_p->halfword[0] = insn.word >> 16;
  55. insn_p->halfword[1] = insn.word;
  56. } else
  57. *insn_p = insn;
  58. flush_icache_range((unsigned long)insn_p,
  59. (unsigned long)insn_p + sizeof(*insn_p));
  60. mutex_unlock(&text_mutex);
  61. put_online_cpus();
  62. }
  63. #endif /* HAVE_JUMP_LABEL */