mach-ap136.c 4.0 KB

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  1. /*
  2. * Qualcomm Atheros AP136 reference board support
  3. *
  4. * Copyright (c) 2012 Qualcomm Atheros
  5. * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
  6. *
  7. * Permission to use, copy, modify, and/or distribute this software for any
  8. * purpose with or without fee is hereby granted, provided that the above
  9. * copyright notice and this permission notice appear in all copies.
  10. *
  11. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  12. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  13. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  14. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  15. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  16. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  17. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  18. *
  19. */
  20. #include <linux/pci.h>
  21. #include <linux/ath9k_platform.h>
  22. #include "machtypes.h"
  23. #include "dev-gpio-buttons.h"
  24. #include "dev-leds-gpio.h"
  25. #include "dev-spi.h"
  26. #include "dev-usb.h"
  27. #include "dev-wmac.h"
  28. #include "pci.h"
  29. #define AP136_GPIO_LED_STATUS_RED 14
  30. #define AP136_GPIO_LED_STATUS_GREEN 19
  31. #define AP136_GPIO_LED_USB 4
  32. #define AP136_GPIO_LED_WLAN_2G 13
  33. #define AP136_GPIO_LED_WLAN_5G 12
  34. #define AP136_GPIO_LED_WPS_RED 15
  35. #define AP136_GPIO_LED_WPS_GREEN 20
  36. #define AP136_GPIO_BTN_WPS 16
  37. #define AP136_GPIO_BTN_RFKILL 21
  38. #define AP136_KEYS_POLL_INTERVAL 20 /* msecs */
  39. #define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL)
  40. #define AP136_WMAC_CALDATA_OFFSET 0x1000
  41. #define AP136_PCIE_CALDATA_OFFSET 0x5000
  42. static struct gpio_led ap136_leds_gpio[] __initdata = {
  43. {
  44. .name = "qca:green:status",
  45. .gpio = AP136_GPIO_LED_STATUS_GREEN,
  46. .active_low = 1,
  47. },
  48. {
  49. .name = "qca:red:status",
  50. .gpio = AP136_GPIO_LED_STATUS_RED,
  51. .active_low = 1,
  52. },
  53. {
  54. .name = "qca:green:wps",
  55. .gpio = AP136_GPIO_LED_WPS_GREEN,
  56. .active_low = 1,
  57. },
  58. {
  59. .name = "qca:red:wps",
  60. .gpio = AP136_GPIO_LED_WPS_RED,
  61. .active_low = 1,
  62. },
  63. {
  64. .name = "qca:red:wlan-2g",
  65. .gpio = AP136_GPIO_LED_WLAN_2G,
  66. .active_low = 1,
  67. },
  68. {
  69. .name = "qca:red:usb",
  70. .gpio = AP136_GPIO_LED_USB,
  71. .active_low = 1,
  72. }
  73. };
  74. static struct gpio_keys_button ap136_gpio_keys[] __initdata = {
  75. {
  76. .desc = "WPS button",
  77. .type = EV_KEY,
  78. .code = KEY_WPS_BUTTON,
  79. .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
  80. .gpio = AP136_GPIO_BTN_WPS,
  81. .active_low = 1,
  82. },
  83. {
  84. .desc = "RFKILL button",
  85. .type = EV_KEY,
  86. .code = KEY_RFKILL,
  87. .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
  88. .gpio = AP136_GPIO_BTN_RFKILL,
  89. .active_low = 1,
  90. },
  91. };
  92. static struct spi_board_info ap136_spi_info[] = {
  93. {
  94. .bus_num = 0,
  95. .chip_select = 0,
  96. .max_speed_hz = 25000000,
  97. .modalias = "mx25l6405d",
  98. }
  99. };
  100. static struct ath79_spi_platform_data ap136_spi_data = {
  101. .bus_num = 0,
  102. .num_chipselect = 1,
  103. };
  104. #ifdef CONFIG_PCI
  105. static struct ath9k_platform_data ap136_ath9k_data;
  106. static int ap136_pci_plat_dev_init(struct pci_dev *dev)
  107. {
  108. if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0)
  109. dev->dev.platform_data = &ap136_ath9k_data;
  110. return 0;
  111. }
  112. static void __init ap136_pci_init(u8 *eeprom)
  113. {
  114. memcpy(ap136_ath9k_data.eeprom_data, eeprom,
  115. sizeof(ap136_ath9k_data.eeprom_data));
  116. ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
  117. ath79_register_pci();
  118. }
  119. #else
  120. static inline void ap136_pci_init(u8 *eeprom) {}
  121. #endif /* CONFIG_PCI */
  122. static void __init ap136_setup(void)
  123. {
  124. u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  125. ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
  126. ap136_leds_gpio);
  127. ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL,
  128. ARRAY_SIZE(ap136_gpio_keys),
  129. ap136_gpio_keys);
  130. ath79_register_spi(&ap136_spi_data, ap136_spi_info,
  131. ARRAY_SIZE(ap136_spi_info));
  132. ath79_register_usb();
  133. ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET);
  134. ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET);
  135. }
  136. MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010",
  137. "Atheros AP136-010 reference board",
  138. ap136_setup);