fsl,imx-fb.txt 1.5 KB

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  1. Freescale imx21 Framebuffer
  2. This framebuffer driver supports devices imx1, imx21, imx25, and imx27.
  3. Required properties:
  4. - compatible : "fsl,<chip>-fb", chip should be imx1 or imx21
  5. - reg : Should contain 1 register ranges(address and length)
  6. - interrupts : One interrupt of the fb dev
  7. Required nodes:
  8. - display: Phandle to a display node as described in
  9. Documentation/devicetree/bindings/video/display-timing.txt
  10. Additional, the display node has to define properties:
  11. - bits-per-pixel: Bits per pixel
  12. - fsl,pcr: LCDC PCR value
  13. Optional properties:
  14. - lcd-supply: Regulator for LCD supply voltage.
  15. - fsl,dmacr: DMA Control Register value. This is optional. By default, the
  16. register is not modified as recommended by the datasheet.
  17. - fsl,lpccr: Contrast Control Register value. This property provides the
  18. default value for the contrast control register.
  19. If that property is omitted, the register is zeroed.
  20. - fsl,lscr1: LCDC Sharp Configuration Register value.
  21. Example:
  22. imxfb: fb@10021000 {
  23. compatible = "fsl,imx21-fb";
  24. interrupts = <61>;
  25. reg = <0x10021000 0x1000>;
  26. display = <&display0>;
  27. };
  28. ...
  29. display0: display0 {
  30. model = "Primeview-PD050VL1";
  31. native-mode = <&timing_disp0>;
  32. bits-per-pixel = <16>;
  33. fsl,pcr = <0xf0c88080>; /* non-standard but required */
  34. display-timings {
  35. timing_disp0: 640x480 {
  36. hactive = <640>;
  37. vactive = <480>;
  38. hback-porch = <112>;
  39. hfront-porch = <36>;
  40. hsync-len = <32>;
  41. vback-porch = <33>;
  42. vfront-porch = <33>;
  43. vsync-len = <2>;
  44. clock-frequency = <25000000>;
  45. };
  46. };
  47. };