img,tz1090-pinctrl.txt 8.6 KB

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  1. ImgTec TZ1090 pin controller
  2. Required properties:
  3. - compatible: "img,tz1090-pinctrl"
  4. - reg: Should contain the register physical address and length of the pad
  5. configuration registers (CR_PADS_* and CR_IF_CTL0).
  6. Please refer to pinctrl-bindings.txt in this directory for details of the
  7. common pinctrl bindings used by client devices, including the meaning of the
  8. phrase "pin configuration node".
  9. TZ1090's pin configuration nodes act as a container for an arbitrary number of
  10. subnodes. Each of these subnodes represents some desired configuration for a
  11. pin, a group, or a list of pins or groups. This configuration can include the
  12. mux function to select on those pin(s)/group(s), and various pin configuration
  13. parameters, such as pull-up, drive strength, etc.
  14. The name of each subnode is not important; all subnodes should be enumerated
  15. and processed purely based on their content.
  16. Each subnode only affects those parameters that are explicitly listed. In
  17. other words, a subnode that lists a mux function but no pin configuration
  18. parameters implies no information about any pin configuration parameters.
  19. Similarly, a pin subnode that describes a pullup parameter implies no
  20. information about e.g. the mux function. For this reason, even seemingly boolean
  21. values are actually tristates in this binding: unspecified, off, or on.
  22. Unspecified is represented as an absent property, and off/on are represented as
  23. integer values 0 and 1.
  24. Required subnode-properties:
  25. - tz1090,pins : An array of strings. Each string contains the name of a pin or
  26. group. Valid values for these names are listed below.
  27. Optional subnode-properties:
  28. - tz1090,function: A string containing the name of the function to mux to the
  29. pin or group. Valid values for function names are listed below, including
  30. which pingroups can be muxed to them.
  31. - supported generic pinconfig properties (for further details see
  32. Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt):
  33. - bias-disable
  34. - bias-high-impedance
  35. - bias-bus-hold
  36. - bias-pull-up
  37. - bias-pull-down
  38. - input-schmitt-enable
  39. - input-schmitt-disable
  40. - drive-strength: Integer, control drive strength of pins in mA.
  41. 2: 2mA
  42. 4: 4mA
  43. 8: 8mA
  44. 12: 12mA
  45. Note that many of these properties are only valid for certain specific pins
  46. or groups. See the TZ1090 TRM for complete details regarding which groups
  47. support which functionality. The Linux pinctrl driver may also be a useful
  48. reference.
  49. Valid values for pin and group names are:
  50. gpio pins:
  51. These all support bias-high-impediance, bias-pull-up, bias-pull-down, and
  52. bias-bus-hold (which can also be provided to any of the groups below to set
  53. it for all pins in that group).
  54. They also all support the some form of muxing. Any pins which are contained
  55. in one of the mux groups (see below) can be muxed only to the functions
  56. supported by the mux group. All other pins can be muxed to the "perip"
  57. function which enables them with their intended peripheral.
  58. Different pins in the same mux group cannot be muxed to different functions,
  59. however it is possible to mux only a subset of the pins in a mux group to a
  60. particular function and leave the remaining pins unmuxed. This is useful if
  61. the board connects certain pins in a group to other devices to be controlled
  62. by GPIO, and you don't want the usual peripheral to have any control of the
  63. pin.
  64. ant_sel0, ant_sel1, gain0, gain1, gain2, gain3, gain4, gain5, gain6, gain7,
  65. i2s_bclk_out, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2, i2s_lrclk_out,
  66. i2s_mclk, pa_on, pdm_a, pdm_b, pdm_c, pdm_d, pll_on, rx_hp, rx_on,
  67. scb0_sclk, scb0_sdat, scb1_sclk, scb1_sdat, scb2_sclk, scb2_sdat, sdh_cd,
  68. sdh_clk_in, sdh_wp, sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, sdio_d3,
  69. spi0_cs0, spi0_cs1, spi0_cs2, spi0_din, spi0_dout, spi0_mclk, spi1_cs0,
  70. spi1_cs1, spi1_cs2, spi1_din, spi1_dout, spi1_mclk, tft_blank_ls, tft_blue0,
  71. tft_blue1, tft_blue2, tft_blue3, tft_blue4, tft_blue5, tft_blue6, tft_blue7,
  72. tft_green0, tft_green1, tft_green2, tft_green3, tft_green4, tft_green5,
  73. tft_green6, tft_green7, tft_hsync_nr, tft_panelclk, tft_pwrsave, tft_red0,
  74. tft_red1, tft_red2, tft_red3, tft_red4, tft_red5, tft_red6, tft_red7,
  75. tft_vd12acb, tft_vdden_gd, tft_vsync_ns, tx_on, uart0_cts, uart0_rts,
  76. uart0_rxd, uart0_txd, uart1_rxd, uart1_txd.
  77. bias-high-impediance: supported.
  78. bias-pull-up: supported.
  79. bias-pull-down: supported.
  80. bias-bus-hold: supported.
  81. function: perip or those supported by pin's mux group.
  82. other pins:
  83. These other pins are part of various pin groups below, but can't be
  84. controlled as GPIOs. They do however support bias-high-impediance,
  85. bias-pull-up, bias-pull-down, and bias-bus-hold (which can also be provided
  86. to any of the groups below to set it for all pins in that group).
  87. clk_out0, clk_out1, tck, tdi, tdo, tms, trst.
  88. bias-high-impediance: supported.
  89. bias-pull-up: supported.
  90. bias-pull-down: supported.
  91. bias-bus-hold: supported.
  92. mux groups:
  93. These all support function, and some support drive configs.
  94. afe
  95. pins: tx_on, rx_on, pll_on, pa_on, rx_hp, ant_sel0,
  96. ant_sel1, gain0, gain1, gain2, gain3, gain4,
  97. gain5, gain6, gain7.
  98. function: afe, ts_out_0.
  99. input-schmitt-enable: supported.
  100. input-schmitt-disable: supported.
  101. drive-strength: supported.
  102. pdm_d
  103. pins: pdm_d.
  104. function: pdm_dac, usb_vbus.
  105. sdh
  106. pins: sdh_cd, sdh_wp, sdh_clk_in.
  107. function: sdh, sdio.
  108. sdio
  109. pins: sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2,
  110. sdio_d3.
  111. function: sdio, sdh.
  112. spi1_cs2
  113. pins: spi1_cs2.
  114. function: spi1_cs2, usb_vbus.
  115. tft
  116. pins: tft_red0, tft_red1, tft_red2, tft_red3,
  117. tft_red4, tft_red5, tft_red6, tft_red7,
  118. tft_green0, tft_green1, tft_green2, tft_green3,
  119. tft_green4, tft_green5, tft_green6, tft_green7,
  120. tft_blue0, tft_blue1, tft_blue2, tft_blue3,
  121. tft_blue4, tft_blue5, tft_blue6, tft_blue7,
  122. tft_vdden_gd, tft_panelclk, tft_blank_ls,
  123. tft_vsync_ns, tft_hsync_nr, tft_vd12acb,
  124. tft_pwrsave.
  125. function: tft, ext_dac, not_iqadc_stb, iqdac_stb, ts_out_1,
  126. lcd_trace, phy_ringosc.
  127. input-schmitt-enable: supported.
  128. input-schmitt-disable: supported.
  129. drive-strength: supported.
  130. drive groups:
  131. These all support input-schmitt-enable, input-schmitt-disable,
  132. and drive-strength.
  133. jtag
  134. pins: tck, trst, tdi, tdo, tms.
  135. scb1
  136. pins: scb1_sdat, scb1_sclk.
  137. scb2
  138. pins: scb2_sdat, scb2_sclk.
  139. spi0
  140. pins: spi0_mclk, spi0_cs0, spi0_cs1, spi0_cs2, spi0_dout, spi0_din.
  141. spi1
  142. pins: spi1_mclk, spi1_cs0, spi1_cs1, spi1_cs2, spi1_dout, spi1_din.
  143. uart
  144. pins: uart0_txd, uart0_rxd, uart0_rts, uart0_cts,
  145. uart1_txd, uart1_rxd.
  146. drive_i2s
  147. pins: clk_out1, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2,
  148. i2s_lrclk_out, i2s_bclk_out, i2s_mclk.
  149. drive_pdm
  150. pins: clk_out0, pdm_b, pdm_a.
  151. drive_scb0
  152. pins: scb0_sclk, scb0_sdat, pdm_d, pdm_c.
  153. drive_sdio
  154. pins: sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, sdio_d3,
  155. sdh_wp, sdh_cd, sdh_clk_in.
  156. convenience groups:
  157. These are just convenient groupings of pins and don't support any drive
  158. configs.
  159. uart0
  160. pins: uart0_cts, uart0_rts, uart0_rxd, uart0_txd.
  161. uart1
  162. pins: uart1_rxd, uart1_txd.
  163. scb0
  164. pins: scb0_sclk, scb0_sdat.
  165. i2s
  166. pins: i2s_bclk_out, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2,
  167. i2s_lrclk_out, i2s_mclk.
  168. Example:
  169. pinctrl: pinctrl@02005800 {
  170. #gpio-range-cells = <3>;
  171. compatible = "img,tz1090-pinctrl";
  172. reg = <0x02005800 0xe4>;
  173. };
  174. Example board file extract:
  175. &pinctrl {
  176. uart0_default: uart0 {
  177. uart0_cfg {
  178. tz1090,pins = "uart0_rxd",
  179. "uart0_txd";
  180. tz1090,function = "perip";
  181. };
  182. };
  183. tft_default: tft {
  184. tft_cfg {
  185. tz1090,pins = "tft";
  186. tz1090,function = "tft";
  187. };
  188. };
  189. };
  190. uart@02004b00 {
  191. pinctrl-names = "default";
  192. pinctrl-0 = <&uart0_default>;
  193. };