fsl,imx6q-pcie.txt 1.5 KB

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  1. * Freescale i.MX6 PCIe interface
  2. This PCIe host controller is based on the Synopsis Designware PCIe IP
  3. and thus inherits all the common properties defined in designware-pcie.txt.
  4. Required properties:
  5. - compatible: "fsl,imx6q-pcie"
  6. - reg: base addresse and length of the pcie controller
  7. - interrupts: A list of interrupt outputs of the controller. Must contain an
  8. entry for each entry in the interrupt-names property.
  9. - interrupt-names: Must include the following entries:
  10. - "msi": The interrupt that is asserted when an MSI is received
  11. - clock-names: Must include the following additional entries:
  12. - "pcie_phy"
  13. Example:
  14. pcie@0x01000000 {
  15. compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
  16. reg = <0x01ffc000 0x04000>,
  17. <0x01f00000 0x80000>;
  18. reg-names = "dbi", "config";
  19. #address-cells = <3>;
  20. #size-cells = <2>;
  21. device_type = "pci";
  22. ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000
  23. 0x81000000 0 0 0x01f80000 0 0x00010000
  24. 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>;
  25. num-lanes = <1>;
  26. interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
  27. interrupt-names = "msi";
  28. #interrupt-cells = <1>;
  29. interrupt-map-mask = <0 0 0 0x7>;
  30. interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
  31. <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
  32. <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
  33. <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
  34. clocks = <&clks 144>, <&clks 206>, <&clks 189>;
  35. clock-names = "pcie", "pcie_bus", "pcie_phy";
  36. };