renesas,ravb.txt 1.7 KB

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  1. * Renesas Electronics Ethernet AVB
  2. This file provides information on what the device node for the Ethernet AVB
  3. interface contains.
  4. Required properties:
  5. - compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC.
  6. "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC.
  7. - reg: offset and length of (1) the register block and (2) the stream buffer.
  8. - interrupts: interrupt specifier for the sole interrupt.
  9. - phy-mode: see ethernet.txt file in the same directory.
  10. - phy-handle: see ethernet.txt file in the same directory.
  11. - #address-cells: number of address cells for the MDIO bus, must be equal to 1.
  12. - #size-cells: number of size cells on the MDIO bus, must be equal to 0.
  13. - clocks: clock phandle and specifier pair.
  14. - pinctrl-0: phandle, referring to a default pin configuration node.
  15. Optional properties:
  16. - interrupt-parent: the phandle for the interrupt controller that services
  17. interrupts for this device.
  18. - pinctrl-names: pin configuration state name ("default").
  19. - renesas,no-ether-link: boolean, specify when a board does not provide a proper
  20. AVB_LINK signal.
  21. - renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is
  22. active-low instead of normal active-high.
  23. Example:
  24. ethernet@e6800000 {
  25. compatible = "renesas,etheravb-r8a7790";
  26. reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
  27. interrupt-parent = <&gic>;
  28. interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
  29. clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
  30. phy-mode = "rmii";
  31. phy-handle = <&phy0>;
  32. pinctrl-0 = <&ether_pins>;
  33. pinctrl-names = "default";
  34. renesas,no-ether-link;
  35. #address-cells = <1>;
  36. #size-cells = <0>;
  37. phy0: ethernet-phy@0 {
  38. reg = <0>;
  39. interrupt-parent = <&gpio2>;
  40. interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
  41. };
  42. };