renesas,vsp1.txt 1.3 KB

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  1. * Renesas VSP1 Video Processing Engine
  2. The VSP1 is a video processing engine that supports up-/down-scaling, alpha
  3. blending, color space conversion and various other image processing features.
  4. It can be found in the Renesas R-Car second generation SoCs.
  5. Required properties:
  6. - compatible: Must contain "renesas,vsp1"
  7. - reg: Base address and length of the registers block for the VSP1.
  8. - interrupts: VSP1 interrupt specifier.
  9. - clocks: A phandle + clock-specifier pair for the VSP1 functional clock.
  10. - renesas,#rpf: Number of Read Pixel Formatter (RPF) modules in the VSP1.
  11. - renesas,#uds: Number of Up Down Scaler (UDS) modules in the VSP1.
  12. - renesas,#wpf: Number of Write Pixel Formatter (WPF) modules in the VSP1.
  13. Optional properties:
  14. - renesas,has-lif: Boolean, indicates that the LCD Interface (LIF) module is
  15. available.
  16. - renesas,has-lut: Boolean, indicates that the Look Up Table (LUT) module is
  17. available.
  18. - renesas,has-sru: Boolean, indicates that the Super Resolution Unit (SRU)
  19. module is available.
  20. Example: R8A7790 (R-Car H2) VSP1-S node
  21. vsp1@fe928000 {
  22. compatible = "renesas,vsp1";
  23. reg = <0 0xfe928000 0 0x8000>;
  24. interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
  25. clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
  26. renesas,has-lut;
  27. renesas,has-sru;
  28. renesas,#rpf = <5>;
  29. renesas,#uds = <3>;
  30. renesas,#wpf = <4>;
  31. };