lpddr2.txt 2.5 KB

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  1. * LPDDR2 SDRAM memories compliant to JEDEC JESD209-2
  2. Required properties:
  3. - compatible : Should be one of - "jedec,lpddr2-nvm", "jedec,lpddr2-s2",
  4. "jedec,lpddr2-s4"
  5. "ti,jedec-lpddr2-s2" should be listed if the memory part is LPDDR2-S2 type
  6. "ti,jedec-lpddr2-s4" should be listed if the memory part is LPDDR2-S4 type
  7. "ti,jedec-lpddr2-nvm" should be listed if the memory part is LPDDR2-NVM type
  8. - density : <u32> representing density in Mb (Mega bits)
  9. - io-width : <u32> representing bus width. Possible values are 8, 16, and 32
  10. Optional properties:
  11. The following optional properties represent the minimum value of some AC
  12. timing parameters of the DDR device in terms of number of clock cycles.
  13. These values shall be obtained from the device data-sheet.
  14. - tRRD-min-tck
  15. - tWTR-min-tck
  16. - tXP-min-tck
  17. - tRTP-min-tck
  18. - tCKE-min-tck
  19. - tRPab-min-tck
  20. - tRCD-min-tck
  21. - tWR-min-tck
  22. - tRASmin-min-tck
  23. - tCKESR-min-tck
  24. - tFAW-min-tck
  25. Child nodes:
  26. - The lpddr2 node may have one or more child nodes of type "lpddr2-timings".
  27. "lpddr2-timings" provides AC timing parameters of the device for
  28. a given speed-bin. The user may provide the timings for as many
  29. speed-bins as is required. Please see Documentation/devicetree/
  30. bindings/lpddr2/lpddr2-timings.txt for more information on "lpddr2-timings"
  31. Example:
  32. elpida_ECB240ABACN : lpddr2 {
  33. compatible = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
  34. density = <2048>;
  35. io-width = <32>;
  36. tRPab-min-tck = <3>;
  37. tRCD-min-tck = <3>;
  38. tWR-min-tck = <3>;
  39. tRASmin-min-tck = <3>;
  40. tRRD-min-tck = <2>;
  41. tWTR-min-tck = <2>;
  42. tXP-min-tck = <2>;
  43. tRTP-min-tck = <2>;
  44. tCKE-min-tck = <3>;
  45. tCKESR-min-tck = <3>;
  46. tFAW-min-tck = <8>;
  47. timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
  48. compatible = "jedec,lpddr2-timings";
  49. min-freq = <10000000>;
  50. max-freq = <400000000>;
  51. tRPab = <21000>;
  52. tRCD = <18000>;
  53. tWR = <15000>;
  54. tRAS-min = <42000>;
  55. tRRD = <10000>;
  56. tWTR = <7500>;
  57. tXP = <7500>;
  58. tRTP = <7500>;
  59. tCKESR = <15000>;
  60. tDQSCK-max = <5500>;
  61. tFAW = <50000>;
  62. tZQCS = <90000>;
  63. tZQCL = <360000>;
  64. tZQinit = <1000000>;
  65. tRAS-max-ns = <70000>;
  66. };
  67. timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 {
  68. compatible = "jedec,lpddr2-timings";
  69. min-freq = <10000000>;
  70. max-freq = <200000000>;
  71. tRPab = <21000>;
  72. tRCD = <18000>;
  73. tWR = <15000>;
  74. tRAS-min = <42000>;
  75. tRRD = <10000>;
  76. tWTR = <10000>;
  77. tXP = <7500>;
  78. tRTP = <7500>;
  79. tCKESR = <15000>;
  80. tDQSCK-max = <5500>;
  81. tFAW = <50000>;
  82. tZQCS = <90000>;
  83. tZQCL = <360000>;
  84. tZQinit = <1000000>;
  85. tRAS-max-ns = <70000>;
  86. };
  87. }