adf4350.txt 3.1 KB

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  1. Analog Devices ADF4350/ADF4351 device driver
  2. Required properties:
  3. - compatible: Should be one of
  4. * "adi,adf4350": When using the ADF4350 device
  5. * "adi,adf4351": When using the ADF4351 device
  6. - reg: SPI chip select numbert for the device
  7. - spi-max-frequency: Max SPI frequency to use (< 20000000)
  8. - clocks: From common clock binding. Clock is phandle to clock for
  9. ADF435x Reference Clock (CLKIN).
  10. Optional properties:
  11. - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
  12. pll lock state is tested upon read.
  13. - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
  14. - adi,power-up-frequency: If set in Hz the PLL tunes to
  15. the desired frequency on probe.
  16. - adi,reference-div-factor: If set the driver skips dynamic calculation
  17. and uses this default value instead.
  18. - adi,reference-doubler-enable: Enables reference doubler.
  19. - adi,reference-div2-enable: Enables reference divider.
  20. - adi,phase-detector-polarity-positive-enable: Enables positive phase
  21. detector polarity. Default = negative.
  22. - adi,lock-detect-precision-6ns-enable: Enables 6ns lock detect precision.
  23. Default = 10ns.
  24. - adi,lock-detect-function-integer-n-enable: Enables lock detect
  25. for integer-N mode. Default = factional-N mode.
  26. - adi,charge-pump-current: Charge pump current in mA.
  27. Default = 2500mA.
  28. - adi,muxout-select: On chip multiplexer output selection.
  29. Valid values for the multiplexer output are:
  30. 0: Three-State Output (default)
  31. 1: DVDD
  32. 2: DGND
  33. 3: R-Counter output
  34. 4: N-Divider output
  35. 5: Analog lock detect
  36. 6: Digital lock detect
  37. - adi,low-spur-mode-enable: Enables low spur mode.
  38. Default = Low noise mode.
  39. - adi,cycle-slip-reduction-enable: Enables cycle slip reduction.
  40. - adi,charge-cancellation-enable: Enabled charge pump
  41. charge cancellation for integer-N modes.
  42. - adi,anti-backlash-3ns-enable: Enables 3ns antibacklash pulse width
  43. for integer-N modes.
  44. - adi,band-select-clock-mode-high-enable: Enables faster band
  45. selection logic.
  46. - adi,12bit-clk-divider: Clock divider value used when
  47. adi,12bit-clkdiv-mode != 0
  48. - adi,clk-divider-mode:
  49. Valid values for the clkdiv mode are:
  50. 0: Clock divider off (default)
  51. 1: Fast lock enable
  52. 2: Phase resync enable
  53. - adi,aux-output-enable: Enables auxiliary RF output.
  54. - adi,aux-output-fundamental-enable: Selects fundamental VCO output on
  55. the auxiliary RF output. Default = Output of RF dividers.
  56. - adi,mute-till-lock-enable: Enables Mute-Till-Lock-Detect function.
  57. - adi,output-power: Output power selection.
  58. Valid values for the power mode are:
  59. 0: -4dBm (default)
  60. 1: -1dBm
  61. 2: +2dBm
  62. 3: +5dBm
  63. - adi,aux-output-power: Auxiliary output power selection.
  64. Valid values for the power mode are:
  65. 0: -4dBm (default)
  66. 1: -1dBm
  67. 2: +2dBm
  68. 3: +5dBm
  69. Example:
  70. lo_pll0_rx_adf4351: adf4351-rx-lpc@4 {
  71. compatible = "adi,adf4351";
  72. reg = <4>;
  73. spi-max-frequency = <10000000>;
  74. clocks = <&clk0_ad9523 9>;
  75. clock-names = "clkin";
  76. adi,channel-spacing = <10000>;
  77. adi,power-up-frequency = <2400000000>;
  78. adi,phase-detector-polarity-positive-enable;
  79. adi,charge-pump-current = <2500>;
  80. adi,output-power = <3>;
  81. adi,mute-till-lock-enable;
  82. };