i2c-imx.txt 1.3 KB

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  1. * Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
  2. Required properties:
  3. - compatible :
  4. - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
  5. - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
  6. - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
  7. - reg : Should contain I2C/HS-I2C registers location and length
  8. - interrupts : Should contain I2C/HS-I2C interrupt
  9. - clocks : Should contain the I2C/HS-I2C clock specifier
  10. Optional properties:
  11. - clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
  12. The absence of the propoerty indicates the default frequency 100 kHz.
  13. - dmas: A list of two dma specifiers, one for each entry in dma-names.
  14. - dma-names: should contain "tx" and "rx".
  15. Examples:
  16. i2c@83fc4000 { /* I2C2 on i.MX51 */
  17. compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
  18. reg = <0x83fc4000 0x4000>;
  19. interrupts = <63>;
  20. };
  21. i2c@70038000 { /* HS-I2C on i.MX51 */
  22. compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
  23. reg = <0x70038000 0x4000>;
  24. interrupts = <64>;
  25. clock-frequency = <400000>;
  26. };
  27. i2c0: i2c@40066000 { /* i2c0 on vf610 */
  28. compatible = "fsl,vf610-i2c";
  29. reg = <0x40066000 0x1000>;
  30. interrupts =<0 71 0x04>;
  31. dmas = <&edma0 0 50>,
  32. <&edma0 0 51>;
  33. dma-names = "rx","tx";
  34. };