brcm,brcmstb-gpio.txt 2.0 KB

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  1. Broadcom STB "UPG GIO" GPIO controller
  2. The controller's registers are organized as sets of eight 32-bit
  3. registers with each set controlling a bank of up to 32 pins. A single
  4. interrupt is shared for all of the banks handled by the controller.
  5. Required properties:
  6. - compatible:
  7. Must be "brcm,brcmstb-gpio"
  8. - reg:
  9. Define the base and range of the I/O address space containing
  10. the brcmstb GPIO controller registers
  11. - #gpio-cells:
  12. Should be <2>. The first cell is the pin number (within the controller's
  13. pin space), and the second is used for the following:
  14. bit[0]: polarity (0 for active-high, 1 for active-low)
  15. - gpio-controller:
  16. Specifies that the node is a GPIO controller.
  17. - brcm,gpio-bank-widths:
  18. Number of GPIO lines for each bank. Number of elements must
  19. correspond to number of banks suggested by the 'reg' property.
  20. Optional properties:
  21. - interrupts:
  22. The interrupt shared by all GPIO lines for this controller.
  23. - interrupt-parent:
  24. phandle of the parent interrupt controller
  25. - #interrupt-cells:
  26. Should be <2>. The first cell is the GPIO number, the second should specify
  27. flags. The following subset of flags is supported:
  28. - bits[3:0] trigger type and level flags
  29. 1 = low-to-high edge triggered
  30. 2 = high-to-low edge triggered
  31. 4 = active high level-sensitive
  32. 8 = active low level-sensitive
  33. Valid combinations are 1, 2, 3, 4, 8.
  34. See also Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
  35. - interrupt-controller:
  36. Marks the device node as an interrupt controller
  37. - interrupt-names:
  38. The name of the IRQ resource used by this controller
  39. Example:
  40. upg_gio: gpio@f040a700 {
  41. #gpio-cells = <0x2>;
  42. #interrupt-cells = <0x2>;
  43. compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
  44. gpio-controller;
  45. interrupt-controller;
  46. reg = <0xf040a700 0x80>;
  47. interrupt-parent = <0xf>;
  48. interrupts = <0x6>;
  49. interrupt-names = "upg_gio";
  50. brcm,gpio-bank-widths = <0x20 0x20 0x20 0x18>;
  51. };