patch_sigmatel.c 136 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <linux/module.h>
  32. #include <sound/core.h>
  33. #include <sound/jack.h>
  34. #include "hda_codec.h"
  35. #include "hda_local.h"
  36. #include "hda_auto_parser.h"
  37. #include "hda_beep.h"
  38. #include "hda_jack.h"
  39. #include "hda_generic.h"
  40. enum {
  41. STAC_REF,
  42. STAC_9200_OQO,
  43. STAC_9200_DELL_D21,
  44. STAC_9200_DELL_D22,
  45. STAC_9200_DELL_D23,
  46. STAC_9200_DELL_M21,
  47. STAC_9200_DELL_M22,
  48. STAC_9200_DELL_M23,
  49. STAC_9200_DELL_M24,
  50. STAC_9200_DELL_M25,
  51. STAC_9200_DELL_M26,
  52. STAC_9200_DELL_M27,
  53. STAC_9200_M4,
  54. STAC_9200_M4_2,
  55. STAC_9200_PANASONIC,
  56. STAC_9200_EAPD_INIT,
  57. STAC_9200_MODELS
  58. };
  59. enum {
  60. STAC_9205_REF,
  61. STAC_9205_DELL_M42,
  62. STAC_9205_DELL_M43,
  63. STAC_9205_DELL_M44,
  64. STAC_9205_EAPD,
  65. STAC_9205_MODELS
  66. };
  67. enum {
  68. STAC_92HD73XX_NO_JD, /* no jack-detection */
  69. STAC_92HD73XX_REF,
  70. STAC_92HD73XX_INTEL,
  71. STAC_DELL_M6_AMIC,
  72. STAC_DELL_M6_DMIC,
  73. STAC_DELL_M6_BOTH,
  74. STAC_DELL_EQ,
  75. STAC_ALIENWARE_M17X,
  76. STAC_92HD89XX_HP_FRONT_JACK,
  77. STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
  78. STAC_92HD73XX_ASUS_MOBO,
  79. STAC_92HD73XX_MODELS
  80. };
  81. enum {
  82. STAC_92HD83XXX_REF,
  83. STAC_92HD83XXX_PWR_REF,
  84. STAC_DELL_S14,
  85. STAC_DELL_VOSTRO_3500,
  86. STAC_92HD83XXX_HP_cNB11_INTQUAD,
  87. STAC_HP_DV7_4000,
  88. STAC_HP_ZEPHYR,
  89. STAC_92HD83XXX_HP_LED,
  90. STAC_92HD83XXX_HP_INV_LED,
  91. STAC_92HD83XXX_HP_MIC_LED,
  92. STAC_HP_LED_GPIO10,
  93. STAC_92HD83XXX_HEADSET_JACK,
  94. STAC_92HD83XXX_HP,
  95. STAC_HP_ENVY_BASS,
  96. STAC_HP_BNB13_EQ,
  97. STAC_HP_ENVY_TS_BASS,
  98. STAC_HP_ENVY_TS_DAC_BIND,
  99. STAC_92HD83XXX_GPIO10_EAPD,
  100. STAC_92HD83XXX_MODELS
  101. };
  102. enum {
  103. STAC_92HD71BXX_REF,
  104. STAC_DELL_M4_1,
  105. STAC_DELL_M4_2,
  106. STAC_DELL_M4_3,
  107. STAC_HP_M4,
  108. STAC_HP_DV4,
  109. STAC_HP_DV5,
  110. STAC_HP_HDX,
  111. STAC_92HD71BXX_HP,
  112. STAC_92HD71BXX_NO_DMIC,
  113. STAC_92HD71BXX_NO_SMUX,
  114. STAC_92HD71BXX_MODELS
  115. };
  116. enum {
  117. STAC_92HD95_HP_LED,
  118. STAC_92HD95_HP_BASS,
  119. STAC_92HD95_MODELS
  120. };
  121. enum {
  122. STAC_925x_REF,
  123. STAC_M1,
  124. STAC_M1_2,
  125. STAC_M2,
  126. STAC_M2_2,
  127. STAC_M3,
  128. STAC_M5,
  129. STAC_M6,
  130. STAC_925x_MODELS
  131. };
  132. enum {
  133. STAC_D945_REF,
  134. STAC_D945GTP3,
  135. STAC_D945GTP5,
  136. STAC_INTEL_MAC_V1,
  137. STAC_INTEL_MAC_V2,
  138. STAC_INTEL_MAC_V3,
  139. STAC_INTEL_MAC_V4,
  140. STAC_INTEL_MAC_V5,
  141. STAC_INTEL_MAC_AUTO,
  142. STAC_ECS_202,
  143. STAC_922X_DELL_D81,
  144. STAC_922X_DELL_D82,
  145. STAC_922X_DELL_M81,
  146. STAC_922X_DELL_M82,
  147. STAC_922X_INTEL_MAC_GPIO,
  148. STAC_922X_MODELS
  149. };
  150. enum {
  151. STAC_D965_REF_NO_JD, /* no jack-detection */
  152. STAC_D965_REF,
  153. STAC_D965_3ST,
  154. STAC_D965_5ST,
  155. STAC_D965_5ST_NO_FP,
  156. STAC_D965_VERBS,
  157. STAC_DELL_3ST,
  158. STAC_DELL_BIOS,
  159. STAC_DELL_BIOS_AMIC,
  160. STAC_DELL_BIOS_SPDIF,
  161. STAC_927X_DELL_DMIC,
  162. STAC_927X_VOLKNOB,
  163. STAC_927X_MODELS
  164. };
  165. enum {
  166. STAC_9872_VAIO,
  167. STAC_9872_MODELS
  168. };
  169. struct sigmatel_spec {
  170. struct hda_gen_spec gen;
  171. unsigned int eapd_switch: 1;
  172. unsigned int linear_tone_beep:1;
  173. unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
  174. unsigned int volknob_init:1; /* special volume-knob initialization */
  175. unsigned int powerdown_adcs:1;
  176. unsigned int have_spdif_mux:1;
  177. /* gpio lines */
  178. unsigned int eapd_mask;
  179. unsigned int gpio_mask;
  180. unsigned int gpio_dir;
  181. unsigned int gpio_data;
  182. unsigned int gpio_mute;
  183. unsigned int gpio_led;
  184. unsigned int gpio_led_polarity;
  185. unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
  186. unsigned int vref_led;
  187. int default_polarity;
  188. unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
  189. unsigned int mic_enabled; /* current mic mute state (bitmask) */
  190. /* stream */
  191. unsigned int stream_delay;
  192. /* analog loopback */
  193. const struct snd_kcontrol_new *aloopback_ctl;
  194. unsigned int aloopback;
  195. unsigned char aloopback_mask;
  196. unsigned char aloopback_shift;
  197. /* power management */
  198. unsigned int power_map_bits;
  199. unsigned int num_pwrs;
  200. const hda_nid_t *pwr_nids;
  201. unsigned int active_adcs;
  202. /* beep widgets */
  203. hda_nid_t anabeep_nid;
  204. /* SPDIF-out mux */
  205. const char * const *spdif_labels;
  206. struct hda_input_mux spdif_mux;
  207. unsigned int cur_smux[2];
  208. };
  209. #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
  210. #define AC_VERB_IDT_GET_POWER_MAP 0xfec
  211. static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
  212. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  213. 0x0f, 0x10, 0x11
  214. };
  215. static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
  216. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  217. 0x0f, 0x10
  218. };
  219. static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  220. 0x0a, 0x0d, 0x0f
  221. };
  222. /*
  223. * PCM hooks
  224. */
  225. static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
  226. struct hda_codec *codec,
  227. struct snd_pcm_substream *substream,
  228. int action)
  229. {
  230. struct sigmatel_spec *spec = codec->spec;
  231. if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
  232. msleep(spec->stream_delay);
  233. }
  234. static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
  235. struct hda_codec *codec,
  236. struct snd_pcm_substream *substream,
  237. int action)
  238. {
  239. struct sigmatel_spec *spec = codec->spec;
  240. int i, idx = 0;
  241. if (!spec->powerdown_adcs)
  242. return;
  243. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  244. if (spec->gen.all_adcs[i] == hinfo->nid) {
  245. idx = i;
  246. break;
  247. }
  248. }
  249. switch (action) {
  250. case HDA_GEN_PCM_ACT_OPEN:
  251. msleep(40);
  252. snd_hda_codec_write(codec, hinfo->nid, 0,
  253. AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  254. spec->active_adcs |= (1 << idx);
  255. break;
  256. case HDA_GEN_PCM_ACT_CLOSE:
  257. snd_hda_codec_write(codec, hinfo->nid, 0,
  258. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  259. spec->active_adcs &= ~(1 << idx);
  260. break;
  261. }
  262. }
  263. /*
  264. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  265. * funky external mute control using GPIO pins.
  266. */
  267. static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
  268. unsigned int dir_mask, unsigned int data)
  269. {
  270. unsigned int gpiostate, gpiomask, gpiodir;
  271. hda_nid_t fg = codec->core.afg;
  272. codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
  273. gpiostate = snd_hda_codec_read(codec, fg, 0,
  274. AC_VERB_GET_GPIO_DATA, 0);
  275. gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
  276. gpiomask = snd_hda_codec_read(codec, fg, 0,
  277. AC_VERB_GET_GPIO_MASK, 0);
  278. gpiomask |= mask;
  279. gpiodir = snd_hda_codec_read(codec, fg, 0,
  280. AC_VERB_GET_GPIO_DIRECTION, 0);
  281. gpiodir |= dir_mask;
  282. /* Configure GPIOx as CMOS */
  283. snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
  284. snd_hda_codec_write(codec, fg, 0,
  285. AC_VERB_SET_GPIO_MASK, gpiomask);
  286. snd_hda_codec_read(codec, fg, 0,
  287. AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
  288. msleep(1);
  289. snd_hda_codec_read(codec, fg, 0,
  290. AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
  291. }
  292. /* hook for controlling mic-mute LED GPIO */
  293. static void stac_capture_led_hook(struct hda_codec *codec,
  294. struct snd_kcontrol *kcontrol,
  295. struct snd_ctl_elem_value *ucontrol)
  296. {
  297. struct sigmatel_spec *spec = codec->spec;
  298. unsigned int mask;
  299. bool cur_mute, prev_mute;
  300. if (!kcontrol || !ucontrol)
  301. return;
  302. mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  303. prev_mute = !spec->mic_enabled;
  304. if (ucontrol->value.integer.value[0] ||
  305. ucontrol->value.integer.value[1])
  306. spec->mic_enabled |= mask;
  307. else
  308. spec->mic_enabled &= ~mask;
  309. cur_mute = !spec->mic_enabled;
  310. if (cur_mute != prev_mute) {
  311. if (cur_mute)
  312. spec->gpio_data |= spec->mic_mute_led_gpio;
  313. else
  314. spec->gpio_data &= ~spec->mic_mute_led_gpio;
  315. stac_gpio_set(codec, spec->gpio_mask,
  316. spec->gpio_dir, spec->gpio_data);
  317. }
  318. }
  319. static int stac_vrefout_set(struct hda_codec *codec,
  320. hda_nid_t nid, unsigned int new_vref)
  321. {
  322. int error, pinctl;
  323. codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
  324. pinctl = snd_hda_codec_read(codec, nid, 0,
  325. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  326. if (pinctl < 0)
  327. return pinctl;
  328. pinctl &= 0xff;
  329. pinctl &= ~AC_PINCTL_VREFEN;
  330. pinctl |= (new_vref & AC_PINCTL_VREFEN);
  331. error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
  332. if (error < 0)
  333. return error;
  334. return 1;
  335. }
  336. /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
  337. /* this hook is set in stac_setup_gpio() */
  338. static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
  339. hda_nid_t nid,
  340. unsigned int power_state)
  341. {
  342. if (nid == codec->core.afg && power_state == AC_PWRST_D3)
  343. return AC_PWRST_D1;
  344. return snd_hda_gen_path_power_filter(codec, nid, power_state);
  345. }
  346. /* update mute-LED accoring to the master switch */
  347. static void stac_update_led_status(struct hda_codec *codec, int enabled)
  348. {
  349. struct sigmatel_spec *spec = codec->spec;
  350. int muted = !enabled;
  351. if (!spec->gpio_led)
  352. return;
  353. /* LED state is inverted on these systems */
  354. if (spec->gpio_led_polarity)
  355. muted = !muted;
  356. if (!spec->vref_mute_led_nid) {
  357. if (muted)
  358. spec->gpio_data |= spec->gpio_led;
  359. else
  360. spec->gpio_data &= ~spec->gpio_led;
  361. stac_gpio_set(codec, spec->gpio_mask,
  362. spec->gpio_dir, spec->gpio_data);
  363. } else {
  364. spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
  365. stac_vrefout_set(codec, spec->vref_mute_led_nid,
  366. spec->vref_led);
  367. }
  368. }
  369. /* vmaster hook to update mute LED */
  370. static void stac_vmaster_hook(void *private_data, int val)
  371. {
  372. stac_update_led_status(private_data, val);
  373. }
  374. /* automute hook to handle GPIO mute and EAPD updates */
  375. static void stac_update_outputs(struct hda_codec *codec)
  376. {
  377. struct sigmatel_spec *spec = codec->spec;
  378. if (spec->gpio_mute)
  379. spec->gen.master_mute =
  380. !(snd_hda_codec_read(codec, codec->core.afg, 0,
  381. AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
  382. snd_hda_gen_update_outputs(codec);
  383. if (spec->eapd_mask && spec->eapd_switch) {
  384. unsigned int val = spec->gpio_data;
  385. if (spec->gen.speaker_muted)
  386. val &= ~spec->eapd_mask;
  387. else
  388. val |= spec->eapd_mask;
  389. if (spec->gpio_data != val) {
  390. spec->gpio_data = val;
  391. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
  392. val);
  393. }
  394. }
  395. }
  396. static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
  397. bool enable, bool do_write)
  398. {
  399. struct sigmatel_spec *spec = codec->spec;
  400. unsigned int idx, val;
  401. for (idx = 0; idx < spec->num_pwrs; idx++) {
  402. if (spec->pwr_nids[idx] == nid)
  403. break;
  404. }
  405. if (idx >= spec->num_pwrs)
  406. return;
  407. idx = 1 << idx;
  408. val = spec->power_map_bits;
  409. if (enable)
  410. val &= ~idx;
  411. else
  412. val |= idx;
  413. /* power down unused output ports */
  414. if (val != spec->power_map_bits) {
  415. spec->power_map_bits = val;
  416. if (do_write)
  417. snd_hda_codec_write(codec, codec->core.afg, 0,
  418. AC_VERB_IDT_SET_POWER_MAP, val);
  419. }
  420. }
  421. /* update power bit per jack plug/unplug */
  422. static void jack_update_power(struct hda_codec *codec,
  423. struct hda_jack_callback *jack)
  424. {
  425. struct sigmatel_spec *spec = codec->spec;
  426. int i;
  427. if (!spec->num_pwrs)
  428. return;
  429. if (jack && jack->tbl->nid) {
  430. stac_toggle_power_map(codec, jack->tbl->nid,
  431. snd_hda_jack_detect(codec, jack->tbl->nid),
  432. true);
  433. return;
  434. }
  435. /* update all jacks */
  436. for (i = 0; i < spec->num_pwrs; i++) {
  437. hda_nid_t nid = spec->pwr_nids[i];
  438. if (!snd_hda_jack_tbl_get(codec, nid))
  439. continue;
  440. stac_toggle_power_map(codec, nid,
  441. snd_hda_jack_detect(codec, nid),
  442. false);
  443. }
  444. snd_hda_codec_write(codec, codec->core.afg, 0,
  445. AC_VERB_IDT_SET_POWER_MAP,
  446. spec->power_map_bits);
  447. }
  448. static void stac_vref_event(struct hda_codec *codec,
  449. struct hda_jack_callback *event)
  450. {
  451. unsigned int data;
  452. data = snd_hda_codec_read(codec, codec->core.afg, 0,
  453. AC_VERB_GET_GPIO_DATA, 0);
  454. /* toggle VREF state based on GPIOx status */
  455. snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
  456. !!(data & (1 << event->private_data)));
  457. }
  458. /* initialize the power map and enable the power event to jacks that
  459. * haven't been assigned to automute
  460. */
  461. static void stac_init_power_map(struct hda_codec *codec)
  462. {
  463. struct sigmatel_spec *spec = codec->spec;
  464. int i;
  465. for (i = 0; i < spec->num_pwrs; i++) {
  466. hda_nid_t nid = spec->pwr_nids[i];
  467. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
  468. def_conf = get_defcfg_connect(def_conf);
  469. if (def_conf == AC_JACK_PORT_COMPLEX &&
  470. spec->vref_mute_led_nid != nid &&
  471. is_jack_detectable(codec, nid)) {
  472. snd_hda_jack_detect_enable_callback(codec, nid,
  473. jack_update_power);
  474. } else {
  475. if (def_conf == AC_JACK_PORT_NONE)
  476. stac_toggle_power_map(codec, nid, false, false);
  477. else
  478. stac_toggle_power_map(codec, nid, true, false);
  479. }
  480. }
  481. }
  482. /*
  483. */
  484. static inline bool get_int_hint(struct hda_codec *codec, const char *key,
  485. int *valp)
  486. {
  487. return !snd_hda_get_int_hint(codec, key, valp);
  488. }
  489. /* override some hints from the hwdep entry */
  490. static void stac_store_hints(struct hda_codec *codec)
  491. {
  492. struct sigmatel_spec *spec = codec->spec;
  493. int val;
  494. if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
  495. spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
  496. spec->gpio_mask;
  497. }
  498. if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
  499. spec->gpio_dir &= spec->gpio_mask;
  500. if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
  501. spec->gpio_data &= spec->gpio_mask;
  502. if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
  503. spec->eapd_mask &= spec->gpio_mask;
  504. if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
  505. spec->gpio_mute &= spec->gpio_mask;
  506. val = snd_hda_get_bool_hint(codec, "eapd_switch");
  507. if (val >= 0)
  508. spec->eapd_switch = val;
  509. }
  510. /*
  511. * loopback controls
  512. */
  513. #define stac_aloopback_info snd_ctl_boolean_mono_info
  514. static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
  515. struct snd_ctl_elem_value *ucontrol)
  516. {
  517. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  518. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  519. struct sigmatel_spec *spec = codec->spec;
  520. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  521. (spec->aloopback_mask << idx));
  522. return 0;
  523. }
  524. static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
  525. struct snd_ctl_elem_value *ucontrol)
  526. {
  527. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  528. struct sigmatel_spec *spec = codec->spec;
  529. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  530. unsigned int dac_mode;
  531. unsigned int val, idx_val;
  532. idx_val = spec->aloopback_mask << idx;
  533. if (ucontrol->value.integer.value[0])
  534. val = spec->aloopback | idx_val;
  535. else
  536. val = spec->aloopback & ~idx_val;
  537. if (spec->aloopback == val)
  538. return 0;
  539. spec->aloopback = val;
  540. /* Only return the bits defined by the shift value of the
  541. * first two bytes of the mask
  542. */
  543. dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
  544. kcontrol->private_value & 0xFFFF, 0x0);
  545. dac_mode >>= spec->aloopback_shift;
  546. if (spec->aloopback & idx_val) {
  547. snd_hda_power_up(codec);
  548. dac_mode |= idx_val;
  549. } else {
  550. snd_hda_power_down(codec);
  551. dac_mode &= ~idx_val;
  552. }
  553. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  554. kcontrol->private_value >> 16, dac_mode);
  555. return 1;
  556. }
  557. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  558. { \
  559. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  560. .name = "Analog Loopback", \
  561. .count = cnt, \
  562. .info = stac_aloopback_info, \
  563. .get = stac_aloopback_get, \
  564. .put = stac_aloopback_put, \
  565. .private_value = verb_read | (verb_write << 16), \
  566. }
  567. /*
  568. * Mute LED handling on HP laptops
  569. */
  570. /* check whether it's a HP laptop with a docking port */
  571. static bool hp_bnb2011_with_dock(struct hda_codec *codec)
  572. {
  573. if (codec->core.vendor_id != 0x111d7605 &&
  574. codec->core.vendor_id != 0x111d76d1)
  575. return false;
  576. switch (codec->core.subsystem_id) {
  577. case 0x103c1618:
  578. case 0x103c1619:
  579. case 0x103c161a:
  580. case 0x103c161b:
  581. case 0x103c161c:
  582. case 0x103c161d:
  583. case 0x103c161e:
  584. case 0x103c161f:
  585. case 0x103c162a:
  586. case 0x103c162b:
  587. case 0x103c1630:
  588. case 0x103c1631:
  589. case 0x103c1633:
  590. case 0x103c1634:
  591. case 0x103c1635:
  592. case 0x103c3587:
  593. case 0x103c3588:
  594. case 0x103c3589:
  595. case 0x103c358a:
  596. case 0x103c3667:
  597. case 0x103c3668:
  598. case 0x103c3669:
  599. return true;
  600. }
  601. return false;
  602. }
  603. static bool hp_blike_system(u32 subsystem_id)
  604. {
  605. switch (subsystem_id) {
  606. case 0x103c1520:
  607. case 0x103c1521:
  608. case 0x103c1523:
  609. case 0x103c1524:
  610. case 0x103c1525:
  611. case 0x103c1722:
  612. case 0x103c1723:
  613. case 0x103c1724:
  614. case 0x103c1725:
  615. case 0x103c1726:
  616. case 0x103c1727:
  617. case 0x103c1728:
  618. case 0x103c1729:
  619. case 0x103c172a:
  620. case 0x103c172b:
  621. case 0x103c307e:
  622. case 0x103c307f:
  623. case 0x103c3080:
  624. case 0x103c3081:
  625. case 0x103c7007:
  626. case 0x103c7008:
  627. return true;
  628. }
  629. return false;
  630. }
  631. static void set_hp_led_gpio(struct hda_codec *codec)
  632. {
  633. struct sigmatel_spec *spec = codec->spec;
  634. unsigned int gpio;
  635. if (spec->gpio_led)
  636. return;
  637. gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
  638. gpio &= AC_GPIO_IO_COUNT;
  639. if (gpio > 3)
  640. spec->gpio_led = 0x08; /* GPIO 3 */
  641. else
  642. spec->gpio_led = 0x01; /* GPIO 0 */
  643. }
  644. /*
  645. * This method searches for the mute LED GPIO configuration
  646. * provided as OEM string in SMBIOS. The format of that string
  647. * is HP_Mute_LED_P_G or HP_Mute_LED_P
  648. * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
  649. * that corresponds to the NOT muted state of the master volume
  650. * and G is the index of the GPIO to use as the mute LED control (0..9)
  651. * If _G portion is missing it is assigned based on the codec ID
  652. *
  653. * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
  654. * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
  655. *
  656. *
  657. * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
  658. * SMBIOS - at least the ones I have seen do not have them - which include
  659. * my own system (HP Pavilion dv6-1110ax) and my cousin's
  660. * HP Pavilion dv9500t CTO.
  661. * Need more information on whether it is true across the entire series.
  662. * -- kunal
  663. */
  664. static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
  665. {
  666. struct sigmatel_spec *spec = codec->spec;
  667. const struct dmi_device *dev = NULL;
  668. if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
  669. get_int_hint(codec, "gpio_led_polarity",
  670. &spec->gpio_led_polarity);
  671. return 1;
  672. }
  673. while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
  674. if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
  675. &spec->gpio_led_polarity,
  676. &spec->gpio_led) == 2) {
  677. unsigned int max_gpio;
  678. max_gpio = snd_hda_param_read(codec, codec->core.afg,
  679. AC_PAR_GPIO_CAP);
  680. max_gpio &= AC_GPIO_IO_COUNT;
  681. if (spec->gpio_led < max_gpio)
  682. spec->gpio_led = 1 << spec->gpio_led;
  683. else
  684. spec->vref_mute_led_nid = spec->gpio_led;
  685. return 1;
  686. }
  687. if (sscanf(dev->name, "HP_Mute_LED_%u",
  688. &spec->gpio_led_polarity) == 1) {
  689. set_hp_led_gpio(codec);
  690. return 1;
  691. }
  692. /* BIOS bug: unfilled OEM string */
  693. if (strstr(dev->name, "HP_Mute_LED_P_G")) {
  694. set_hp_led_gpio(codec);
  695. if (default_polarity >= 0)
  696. spec->gpio_led_polarity = default_polarity;
  697. else
  698. spec->gpio_led_polarity = 1;
  699. return 1;
  700. }
  701. }
  702. /*
  703. * Fallback case - if we don't find the DMI strings,
  704. * we statically set the GPIO - if not a B-series system
  705. * and default polarity is provided
  706. */
  707. if (!hp_blike_system(codec->core.subsystem_id) &&
  708. (default_polarity == 0 || default_polarity == 1)) {
  709. set_hp_led_gpio(codec);
  710. spec->gpio_led_polarity = default_polarity;
  711. return 1;
  712. }
  713. return 0;
  714. }
  715. /* check whether a built-in speaker is included in parsed pins */
  716. static bool has_builtin_speaker(struct hda_codec *codec)
  717. {
  718. struct sigmatel_spec *spec = codec->spec;
  719. hda_nid_t *nid_pin;
  720. int nids, i;
  721. if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
  722. nid_pin = spec->gen.autocfg.line_out_pins;
  723. nids = spec->gen.autocfg.line_outs;
  724. } else {
  725. nid_pin = spec->gen.autocfg.speaker_pins;
  726. nids = spec->gen.autocfg.speaker_outs;
  727. }
  728. for (i = 0; i < nids; i++) {
  729. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
  730. if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
  731. return true;
  732. }
  733. return false;
  734. }
  735. /*
  736. * PC beep controls
  737. */
  738. /* create PC beep volume controls */
  739. static int stac_auto_create_beep_ctls(struct hda_codec *codec,
  740. hda_nid_t nid)
  741. {
  742. struct sigmatel_spec *spec = codec->spec;
  743. u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  744. struct snd_kcontrol_new *knew;
  745. static struct snd_kcontrol_new abeep_mute_ctl =
  746. HDA_CODEC_MUTE(NULL, 0, 0, 0);
  747. static struct snd_kcontrol_new dbeep_mute_ctl =
  748. HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
  749. static struct snd_kcontrol_new beep_vol_ctl =
  750. HDA_CODEC_VOLUME(NULL, 0, 0, 0);
  751. /* check for mute support for the the amp */
  752. if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
  753. const struct snd_kcontrol_new *temp;
  754. if (spec->anabeep_nid == nid)
  755. temp = &abeep_mute_ctl;
  756. else
  757. temp = &dbeep_mute_ctl;
  758. knew = snd_hda_gen_add_kctl(&spec->gen,
  759. "Beep Playback Switch", temp);
  760. if (!knew)
  761. return -ENOMEM;
  762. knew->private_value =
  763. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  764. }
  765. /* check to see if there is volume support for the amp */
  766. if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
  767. knew = snd_hda_gen_add_kctl(&spec->gen,
  768. "Beep Playback Volume",
  769. &beep_vol_ctl);
  770. if (!knew)
  771. return -ENOMEM;
  772. knew->private_value =
  773. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  774. }
  775. return 0;
  776. }
  777. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  778. #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
  779. static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
  780. struct snd_ctl_elem_value *ucontrol)
  781. {
  782. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  783. ucontrol->value.integer.value[0] = codec->beep->enabled;
  784. return 0;
  785. }
  786. static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
  787. struct snd_ctl_elem_value *ucontrol)
  788. {
  789. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  790. return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
  791. }
  792. static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
  793. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  794. .name = "Beep Playback Switch",
  795. .info = stac_dig_beep_switch_info,
  796. .get = stac_dig_beep_switch_get,
  797. .put = stac_dig_beep_switch_put,
  798. };
  799. static int stac_beep_switch_ctl(struct hda_codec *codec)
  800. {
  801. struct sigmatel_spec *spec = codec->spec;
  802. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
  803. return -ENOMEM;
  804. return 0;
  805. }
  806. #endif
  807. /*
  808. * SPDIF-out mux controls
  809. */
  810. static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
  811. struct snd_ctl_elem_info *uinfo)
  812. {
  813. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  814. struct sigmatel_spec *spec = codec->spec;
  815. return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
  816. }
  817. static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
  818. struct snd_ctl_elem_value *ucontrol)
  819. {
  820. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  821. struct sigmatel_spec *spec = codec->spec;
  822. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  823. ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
  824. return 0;
  825. }
  826. static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
  827. struct snd_ctl_elem_value *ucontrol)
  828. {
  829. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  830. struct sigmatel_spec *spec = codec->spec;
  831. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  832. return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
  833. spec->gen.autocfg.dig_out_pins[smux_idx],
  834. &spec->cur_smux[smux_idx]);
  835. }
  836. static struct snd_kcontrol_new stac_smux_mixer = {
  837. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  838. .name = "IEC958 Playback Source",
  839. /* count set later */
  840. .info = stac_smux_enum_info,
  841. .get = stac_smux_enum_get,
  842. .put = stac_smux_enum_put,
  843. };
  844. static const char * const stac_spdif_labels[] = {
  845. "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
  846. };
  847. static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
  848. {
  849. struct sigmatel_spec *spec = codec->spec;
  850. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  851. const char * const *labels = spec->spdif_labels;
  852. struct snd_kcontrol_new *kctl;
  853. int i, num_cons;
  854. if (cfg->dig_outs < 1)
  855. return 0;
  856. num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
  857. if (num_cons <= 1)
  858. return 0;
  859. if (!labels)
  860. labels = stac_spdif_labels;
  861. for (i = 0; i < num_cons; i++) {
  862. if (snd_BUG_ON(!labels[i]))
  863. return -EINVAL;
  864. snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
  865. }
  866. kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
  867. if (!kctl)
  868. return -ENOMEM;
  869. kctl->count = cfg->dig_outs;
  870. return 0;
  871. }
  872. /*
  873. */
  874. static const struct hda_verb stac9200_core_init[] = {
  875. /* set dac0mux for dac converter */
  876. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  877. {}
  878. };
  879. static const struct hda_verb stac9200_eapd_init[] = {
  880. /* set dac0mux for dac converter */
  881. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  882. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  883. {}
  884. };
  885. static const struct hda_verb dell_eq_core_init[] = {
  886. /* set master volume to max value without distortion
  887. * and direct control */
  888. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  889. {}
  890. };
  891. static const struct hda_verb stac92hd73xx_core_init[] = {
  892. /* set master volume and direct control */
  893. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  894. {}
  895. };
  896. static const struct hda_verb stac92hd83xxx_core_init[] = {
  897. /* power state controls amps */
  898. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  899. {}
  900. };
  901. static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
  902. { 0x22, 0x785, 0x43 },
  903. { 0x22, 0x782, 0xe0 },
  904. { 0x22, 0x795, 0x00 },
  905. {}
  906. };
  907. static const struct hda_verb stac92hd71bxx_core_init[] = {
  908. /* set master volume and direct control */
  909. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  910. {}
  911. };
  912. static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
  913. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  914. 0x0f, 0x0a, 0x0d, 0
  915. };
  916. static const struct hda_verb stac925x_core_init[] = {
  917. /* set dac0mux for dac converter */
  918. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  919. /* mute the master volume */
  920. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  921. {}
  922. };
  923. static const struct hda_verb stac922x_core_init[] = {
  924. /* set master volume and direct control */
  925. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  926. {}
  927. };
  928. static const struct hda_verb d965_core_init[] = {
  929. /* unmute node 0x1b */
  930. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  931. /* select node 0x03 as DAC */
  932. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  933. {}
  934. };
  935. static const struct hda_verb dell_3st_core_init[] = {
  936. /* don't set delta bit */
  937. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  938. /* unmute node 0x1b */
  939. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  940. /* select node 0x03 as DAC */
  941. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  942. {}
  943. };
  944. static const struct hda_verb stac927x_core_init[] = {
  945. /* set master volume and direct control */
  946. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  947. /* enable analog pc beep path */
  948. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  949. {}
  950. };
  951. static const struct hda_verb stac927x_volknob_core_init[] = {
  952. /* don't set delta bit */
  953. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  954. /* enable analog pc beep path */
  955. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  956. {}
  957. };
  958. static const struct hda_verb stac9205_core_init[] = {
  959. /* set master volume and direct control */
  960. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  961. /* enable analog pc beep path */
  962. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  963. {}
  964. };
  965. static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
  966. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
  967. static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
  968. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
  969. static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
  970. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
  971. static const struct snd_kcontrol_new stac92hd71bxx_loopback =
  972. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
  973. static const struct snd_kcontrol_new stac9205_loopback =
  974. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
  975. static const struct snd_kcontrol_new stac927x_loopback =
  976. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
  977. static const struct hda_pintbl ref9200_pin_configs[] = {
  978. { 0x08, 0x01c47010 },
  979. { 0x09, 0x01447010 },
  980. { 0x0d, 0x0221401f },
  981. { 0x0e, 0x01114010 },
  982. { 0x0f, 0x02a19020 },
  983. { 0x10, 0x01a19021 },
  984. { 0x11, 0x90100140 },
  985. { 0x12, 0x01813122 },
  986. {}
  987. };
  988. static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
  989. { 0x08, 0x400000fe },
  990. { 0x09, 0x404500f4 },
  991. { 0x0d, 0x400100f0 },
  992. { 0x0e, 0x90110010 },
  993. { 0x0f, 0x400100f1 },
  994. { 0x10, 0x02a1902e },
  995. { 0x11, 0x500000f2 },
  996. { 0x12, 0x500000f3 },
  997. {}
  998. };
  999. static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
  1000. { 0x08, 0x400000fe },
  1001. { 0x09, 0x404500f4 },
  1002. { 0x0d, 0x400100f0 },
  1003. { 0x0e, 0x90110010 },
  1004. { 0x0f, 0x400100f1 },
  1005. { 0x10, 0x02a1902e },
  1006. { 0x11, 0x500000f2 },
  1007. { 0x12, 0x500000f3 },
  1008. {}
  1009. };
  1010. /*
  1011. STAC 9200 pin configs for
  1012. 102801A8
  1013. 102801DE
  1014. 102801E8
  1015. */
  1016. static const struct hda_pintbl dell9200_d21_pin_configs[] = {
  1017. { 0x08, 0x400001f0 },
  1018. { 0x09, 0x400001f1 },
  1019. { 0x0d, 0x02214030 },
  1020. { 0x0e, 0x01014010 },
  1021. { 0x0f, 0x02a19020 },
  1022. { 0x10, 0x01a19021 },
  1023. { 0x11, 0x90100140 },
  1024. { 0x12, 0x01813122 },
  1025. {}
  1026. };
  1027. /*
  1028. STAC 9200 pin configs for
  1029. 102801C0
  1030. 102801C1
  1031. */
  1032. static const struct hda_pintbl dell9200_d22_pin_configs[] = {
  1033. { 0x08, 0x400001f0 },
  1034. { 0x09, 0x400001f1 },
  1035. { 0x0d, 0x0221401f },
  1036. { 0x0e, 0x01014010 },
  1037. { 0x0f, 0x01813020 },
  1038. { 0x10, 0x02a19021 },
  1039. { 0x11, 0x90100140 },
  1040. { 0x12, 0x400001f2 },
  1041. {}
  1042. };
  1043. /*
  1044. STAC 9200 pin configs for
  1045. 102801C4 (Dell Dimension E310)
  1046. 102801C5
  1047. 102801C7
  1048. 102801D9
  1049. 102801DA
  1050. 102801E3
  1051. */
  1052. static const struct hda_pintbl dell9200_d23_pin_configs[] = {
  1053. { 0x08, 0x400001f0 },
  1054. { 0x09, 0x400001f1 },
  1055. { 0x0d, 0x0221401f },
  1056. { 0x0e, 0x01014010 },
  1057. { 0x0f, 0x01813020 },
  1058. { 0x10, 0x01a19021 },
  1059. { 0x11, 0x90100140 },
  1060. { 0x12, 0x400001f2 },
  1061. {}
  1062. };
  1063. /*
  1064. STAC 9200-32 pin configs for
  1065. 102801B5 (Dell Inspiron 630m)
  1066. 102801D8 (Dell Inspiron 640m)
  1067. */
  1068. static const struct hda_pintbl dell9200_m21_pin_configs[] = {
  1069. { 0x08, 0x40c003fa },
  1070. { 0x09, 0x03441340 },
  1071. { 0x0d, 0x0321121f },
  1072. { 0x0e, 0x90170310 },
  1073. { 0x0f, 0x408003fb },
  1074. { 0x10, 0x03a11020 },
  1075. { 0x11, 0x401003fc },
  1076. { 0x12, 0x403003fd },
  1077. {}
  1078. };
  1079. /*
  1080. STAC 9200-32 pin configs for
  1081. 102801C2 (Dell Latitude D620)
  1082. 102801C8
  1083. 102801CC (Dell Latitude D820)
  1084. 102801D4
  1085. 102801D6
  1086. */
  1087. static const struct hda_pintbl dell9200_m22_pin_configs[] = {
  1088. { 0x08, 0x40c003fa },
  1089. { 0x09, 0x0144131f },
  1090. { 0x0d, 0x0321121f },
  1091. { 0x0e, 0x90170310 },
  1092. { 0x0f, 0x90a70321 },
  1093. { 0x10, 0x03a11020 },
  1094. { 0x11, 0x401003fb },
  1095. { 0x12, 0x40f000fc },
  1096. {}
  1097. };
  1098. /*
  1099. STAC 9200-32 pin configs for
  1100. 102801CE (Dell XPS M1710)
  1101. 102801CF (Dell Precision M90)
  1102. */
  1103. static const struct hda_pintbl dell9200_m23_pin_configs[] = {
  1104. { 0x08, 0x40c003fa },
  1105. { 0x09, 0x01441340 },
  1106. { 0x0d, 0x0421421f },
  1107. { 0x0e, 0x90170310 },
  1108. { 0x0f, 0x408003fb },
  1109. { 0x10, 0x04a1102e },
  1110. { 0x11, 0x90170311 },
  1111. { 0x12, 0x403003fc },
  1112. {}
  1113. };
  1114. /*
  1115. STAC 9200-32 pin configs for
  1116. 102801C9
  1117. 102801CA
  1118. 102801CB (Dell Latitude 120L)
  1119. 102801D3
  1120. */
  1121. static const struct hda_pintbl dell9200_m24_pin_configs[] = {
  1122. { 0x08, 0x40c003fa },
  1123. { 0x09, 0x404003fb },
  1124. { 0x0d, 0x0321121f },
  1125. { 0x0e, 0x90170310 },
  1126. { 0x0f, 0x408003fc },
  1127. { 0x10, 0x03a11020 },
  1128. { 0x11, 0x401003fd },
  1129. { 0x12, 0x403003fe },
  1130. {}
  1131. };
  1132. /*
  1133. STAC 9200-32 pin configs for
  1134. 102801BD (Dell Inspiron E1505n)
  1135. 102801EE
  1136. 102801EF
  1137. */
  1138. static const struct hda_pintbl dell9200_m25_pin_configs[] = {
  1139. { 0x08, 0x40c003fa },
  1140. { 0x09, 0x01441340 },
  1141. { 0x0d, 0x0421121f },
  1142. { 0x0e, 0x90170310 },
  1143. { 0x0f, 0x408003fb },
  1144. { 0x10, 0x04a11020 },
  1145. { 0x11, 0x401003fc },
  1146. { 0x12, 0x403003fd },
  1147. {}
  1148. };
  1149. /*
  1150. STAC 9200-32 pin configs for
  1151. 102801F5 (Dell Inspiron 1501)
  1152. 102801F6
  1153. */
  1154. static const struct hda_pintbl dell9200_m26_pin_configs[] = {
  1155. { 0x08, 0x40c003fa },
  1156. { 0x09, 0x404003fb },
  1157. { 0x0d, 0x0421121f },
  1158. { 0x0e, 0x90170310 },
  1159. { 0x0f, 0x408003fc },
  1160. { 0x10, 0x04a11020 },
  1161. { 0x11, 0x401003fd },
  1162. { 0x12, 0x403003fe },
  1163. {}
  1164. };
  1165. /*
  1166. STAC 9200-32
  1167. 102801CD (Dell Inspiron E1705/9400)
  1168. */
  1169. static const struct hda_pintbl dell9200_m27_pin_configs[] = {
  1170. { 0x08, 0x40c003fa },
  1171. { 0x09, 0x01441340 },
  1172. { 0x0d, 0x0421121f },
  1173. { 0x0e, 0x90170310 },
  1174. { 0x0f, 0x90170310 },
  1175. { 0x10, 0x04a11020 },
  1176. { 0x11, 0x90170310 },
  1177. { 0x12, 0x40f003fc },
  1178. {}
  1179. };
  1180. static const struct hda_pintbl oqo9200_pin_configs[] = {
  1181. { 0x08, 0x40c000f0 },
  1182. { 0x09, 0x404000f1 },
  1183. { 0x0d, 0x0221121f },
  1184. { 0x0e, 0x02211210 },
  1185. { 0x0f, 0x90170111 },
  1186. { 0x10, 0x90a70120 },
  1187. { 0x11, 0x400000f2 },
  1188. { 0x12, 0x400000f3 },
  1189. {}
  1190. };
  1191. static void stac9200_fixup_panasonic(struct hda_codec *codec,
  1192. const struct hda_fixup *fix, int action)
  1193. {
  1194. struct sigmatel_spec *spec = codec->spec;
  1195. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1196. spec->gpio_mask = spec->gpio_dir = 0x09;
  1197. spec->gpio_data = 0x00;
  1198. /* CF-74 has no headphone detection, and the driver should *NOT*
  1199. * do detection and HP/speaker toggle because the hardware does it.
  1200. */
  1201. spec->gen.suppress_auto_mute = 1;
  1202. }
  1203. }
  1204. static const struct hda_fixup stac9200_fixups[] = {
  1205. [STAC_REF] = {
  1206. .type = HDA_FIXUP_PINS,
  1207. .v.pins = ref9200_pin_configs,
  1208. },
  1209. [STAC_9200_OQO] = {
  1210. .type = HDA_FIXUP_PINS,
  1211. .v.pins = oqo9200_pin_configs,
  1212. .chained = true,
  1213. .chain_id = STAC_9200_EAPD_INIT,
  1214. },
  1215. [STAC_9200_DELL_D21] = {
  1216. .type = HDA_FIXUP_PINS,
  1217. .v.pins = dell9200_d21_pin_configs,
  1218. },
  1219. [STAC_9200_DELL_D22] = {
  1220. .type = HDA_FIXUP_PINS,
  1221. .v.pins = dell9200_d22_pin_configs,
  1222. },
  1223. [STAC_9200_DELL_D23] = {
  1224. .type = HDA_FIXUP_PINS,
  1225. .v.pins = dell9200_d23_pin_configs,
  1226. },
  1227. [STAC_9200_DELL_M21] = {
  1228. .type = HDA_FIXUP_PINS,
  1229. .v.pins = dell9200_m21_pin_configs,
  1230. },
  1231. [STAC_9200_DELL_M22] = {
  1232. .type = HDA_FIXUP_PINS,
  1233. .v.pins = dell9200_m22_pin_configs,
  1234. },
  1235. [STAC_9200_DELL_M23] = {
  1236. .type = HDA_FIXUP_PINS,
  1237. .v.pins = dell9200_m23_pin_configs,
  1238. },
  1239. [STAC_9200_DELL_M24] = {
  1240. .type = HDA_FIXUP_PINS,
  1241. .v.pins = dell9200_m24_pin_configs,
  1242. },
  1243. [STAC_9200_DELL_M25] = {
  1244. .type = HDA_FIXUP_PINS,
  1245. .v.pins = dell9200_m25_pin_configs,
  1246. },
  1247. [STAC_9200_DELL_M26] = {
  1248. .type = HDA_FIXUP_PINS,
  1249. .v.pins = dell9200_m26_pin_configs,
  1250. },
  1251. [STAC_9200_DELL_M27] = {
  1252. .type = HDA_FIXUP_PINS,
  1253. .v.pins = dell9200_m27_pin_configs,
  1254. },
  1255. [STAC_9200_M4] = {
  1256. .type = HDA_FIXUP_PINS,
  1257. .v.pins = gateway9200_m4_pin_configs,
  1258. .chained = true,
  1259. .chain_id = STAC_9200_EAPD_INIT,
  1260. },
  1261. [STAC_9200_M4_2] = {
  1262. .type = HDA_FIXUP_PINS,
  1263. .v.pins = gateway9200_m4_2_pin_configs,
  1264. .chained = true,
  1265. .chain_id = STAC_9200_EAPD_INIT,
  1266. },
  1267. [STAC_9200_PANASONIC] = {
  1268. .type = HDA_FIXUP_FUNC,
  1269. .v.func = stac9200_fixup_panasonic,
  1270. },
  1271. [STAC_9200_EAPD_INIT] = {
  1272. .type = HDA_FIXUP_VERBS,
  1273. .v.verbs = (const struct hda_verb[]) {
  1274. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  1275. {}
  1276. },
  1277. },
  1278. };
  1279. static const struct hda_model_fixup stac9200_models[] = {
  1280. { .id = STAC_REF, .name = "ref" },
  1281. { .id = STAC_9200_OQO, .name = "oqo" },
  1282. { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
  1283. { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
  1284. { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
  1285. { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
  1286. { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
  1287. { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
  1288. { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
  1289. { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
  1290. { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
  1291. { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
  1292. { .id = STAC_9200_M4, .name = "gateway-m4" },
  1293. { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
  1294. { .id = STAC_9200_PANASONIC, .name = "panasonic" },
  1295. {}
  1296. };
  1297. static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
  1298. /* SigmaTel reference board */
  1299. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1300. "DFI LanParty", STAC_REF),
  1301. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1302. "DFI LanParty", STAC_REF),
  1303. /* Dell laptops have BIOS problem */
  1304. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1305. "unknown Dell", STAC_9200_DELL_D21),
  1306. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1307. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1308. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1309. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1310. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1311. "unknown Dell", STAC_9200_DELL_D22),
  1312. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1313. "unknown Dell", STAC_9200_DELL_D22),
  1314. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1315. "Dell Latitude D620", STAC_9200_DELL_M22),
  1316. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1317. "unknown Dell", STAC_9200_DELL_D23),
  1318. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1319. "unknown Dell", STAC_9200_DELL_D23),
  1320. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1321. "unknown Dell", STAC_9200_DELL_M22),
  1322. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1323. "unknown Dell", STAC_9200_DELL_M24),
  1324. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1325. "unknown Dell", STAC_9200_DELL_M24),
  1326. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1327. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1328. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1329. "Dell Latitude D820", STAC_9200_DELL_M22),
  1330. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1331. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1332. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1333. "Dell XPS M1710", STAC_9200_DELL_M23),
  1334. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1335. "Dell Precision M90", STAC_9200_DELL_M23),
  1336. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1337. "unknown Dell", STAC_9200_DELL_M22),
  1338. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1339. "unknown Dell", STAC_9200_DELL_M22),
  1340. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1341. "unknown Dell", STAC_9200_DELL_M22),
  1342. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1343. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1344. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1345. "unknown Dell", STAC_9200_DELL_D23),
  1346. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1347. "unknown Dell", STAC_9200_DELL_D23),
  1348. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1349. "unknown Dell", STAC_9200_DELL_D21),
  1350. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1351. "unknown Dell", STAC_9200_DELL_D23),
  1352. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1353. "unknown Dell", STAC_9200_DELL_D21),
  1354. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1355. "unknown Dell", STAC_9200_DELL_M25),
  1356. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1357. "unknown Dell", STAC_9200_DELL_M25),
  1358. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1359. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1360. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1361. "unknown Dell", STAC_9200_DELL_M26),
  1362. /* Panasonic */
  1363. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1364. /* Gateway machines needs EAPD to be set on resume */
  1365. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1366. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1367. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1368. /* OQO Mobile */
  1369. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1370. {} /* terminator */
  1371. };
  1372. static const struct hda_pintbl ref925x_pin_configs[] = {
  1373. { 0x07, 0x40c003f0 },
  1374. { 0x08, 0x424503f2 },
  1375. { 0x0a, 0x01813022 },
  1376. { 0x0b, 0x02a19021 },
  1377. { 0x0c, 0x90a70320 },
  1378. { 0x0d, 0x02214210 },
  1379. { 0x10, 0x01019020 },
  1380. { 0x11, 0x9033032e },
  1381. {}
  1382. };
  1383. static const struct hda_pintbl stac925xM1_pin_configs[] = {
  1384. { 0x07, 0x40c003f4 },
  1385. { 0x08, 0x424503f2 },
  1386. { 0x0a, 0x400000f3 },
  1387. { 0x0b, 0x02a19020 },
  1388. { 0x0c, 0x40a000f0 },
  1389. { 0x0d, 0x90100210 },
  1390. { 0x10, 0x400003f1 },
  1391. { 0x11, 0x9033032e },
  1392. {}
  1393. };
  1394. static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
  1395. { 0x07, 0x40c003f4 },
  1396. { 0x08, 0x424503f2 },
  1397. { 0x0a, 0x400000f3 },
  1398. { 0x0b, 0x02a19020 },
  1399. { 0x0c, 0x40a000f0 },
  1400. { 0x0d, 0x90100210 },
  1401. { 0x10, 0x400003f1 },
  1402. { 0x11, 0x9033032e },
  1403. {}
  1404. };
  1405. static const struct hda_pintbl stac925xM2_pin_configs[] = {
  1406. { 0x07, 0x40c003f4 },
  1407. { 0x08, 0x424503f2 },
  1408. { 0x0a, 0x400000f3 },
  1409. { 0x0b, 0x02a19020 },
  1410. { 0x0c, 0x40a000f0 },
  1411. { 0x0d, 0x90100210 },
  1412. { 0x10, 0x400003f1 },
  1413. { 0x11, 0x9033032e },
  1414. {}
  1415. };
  1416. static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
  1417. { 0x07, 0x40c003f4 },
  1418. { 0x08, 0x424503f2 },
  1419. { 0x0a, 0x400000f3 },
  1420. { 0x0b, 0x02a19020 },
  1421. { 0x0c, 0x40a000f0 },
  1422. { 0x0d, 0x90100210 },
  1423. { 0x10, 0x400003f1 },
  1424. { 0x11, 0x9033032e },
  1425. {}
  1426. };
  1427. static const struct hda_pintbl stac925xM3_pin_configs[] = {
  1428. { 0x07, 0x40c003f4 },
  1429. { 0x08, 0x424503f2 },
  1430. { 0x0a, 0x400000f3 },
  1431. { 0x0b, 0x02a19020 },
  1432. { 0x0c, 0x40a000f0 },
  1433. { 0x0d, 0x90100210 },
  1434. { 0x10, 0x400003f1 },
  1435. { 0x11, 0x503303f3 },
  1436. {}
  1437. };
  1438. static const struct hda_pintbl stac925xM5_pin_configs[] = {
  1439. { 0x07, 0x40c003f4 },
  1440. { 0x08, 0x424503f2 },
  1441. { 0x0a, 0x400000f3 },
  1442. { 0x0b, 0x02a19020 },
  1443. { 0x0c, 0x40a000f0 },
  1444. { 0x0d, 0x90100210 },
  1445. { 0x10, 0x400003f1 },
  1446. { 0x11, 0x9033032e },
  1447. {}
  1448. };
  1449. static const struct hda_pintbl stac925xM6_pin_configs[] = {
  1450. { 0x07, 0x40c003f4 },
  1451. { 0x08, 0x424503f2 },
  1452. { 0x0a, 0x400000f3 },
  1453. { 0x0b, 0x02a19020 },
  1454. { 0x0c, 0x40a000f0 },
  1455. { 0x0d, 0x90100210 },
  1456. { 0x10, 0x400003f1 },
  1457. { 0x11, 0x90330320 },
  1458. {}
  1459. };
  1460. static const struct hda_fixup stac925x_fixups[] = {
  1461. [STAC_REF] = {
  1462. .type = HDA_FIXUP_PINS,
  1463. .v.pins = ref925x_pin_configs,
  1464. },
  1465. [STAC_M1] = {
  1466. .type = HDA_FIXUP_PINS,
  1467. .v.pins = stac925xM1_pin_configs,
  1468. },
  1469. [STAC_M1_2] = {
  1470. .type = HDA_FIXUP_PINS,
  1471. .v.pins = stac925xM1_2_pin_configs,
  1472. },
  1473. [STAC_M2] = {
  1474. .type = HDA_FIXUP_PINS,
  1475. .v.pins = stac925xM2_pin_configs,
  1476. },
  1477. [STAC_M2_2] = {
  1478. .type = HDA_FIXUP_PINS,
  1479. .v.pins = stac925xM2_2_pin_configs,
  1480. },
  1481. [STAC_M3] = {
  1482. .type = HDA_FIXUP_PINS,
  1483. .v.pins = stac925xM3_pin_configs,
  1484. },
  1485. [STAC_M5] = {
  1486. .type = HDA_FIXUP_PINS,
  1487. .v.pins = stac925xM5_pin_configs,
  1488. },
  1489. [STAC_M6] = {
  1490. .type = HDA_FIXUP_PINS,
  1491. .v.pins = stac925xM6_pin_configs,
  1492. },
  1493. };
  1494. static const struct hda_model_fixup stac925x_models[] = {
  1495. { .id = STAC_REF, .name = "ref" },
  1496. { .id = STAC_M1, .name = "m1" },
  1497. { .id = STAC_M1_2, .name = "m1-2" },
  1498. { .id = STAC_M2, .name = "m2" },
  1499. { .id = STAC_M2_2, .name = "m2-2" },
  1500. { .id = STAC_M3, .name = "m3" },
  1501. { .id = STAC_M5, .name = "m5" },
  1502. { .id = STAC_M6, .name = "m6" },
  1503. {}
  1504. };
  1505. static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
  1506. /* SigmaTel reference board */
  1507. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1508. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1509. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1510. /* Default table for unknown ID */
  1511. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1512. /* gateway machines are checked via codec ssid */
  1513. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1514. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1515. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1516. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1517. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1518. /* Not sure about the brand name for those */
  1519. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1520. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1521. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1522. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1523. {} /* terminator */
  1524. };
  1525. static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
  1526. { 0x0a, 0x02214030 },
  1527. { 0x0b, 0x02a19040 },
  1528. { 0x0c, 0x01a19020 },
  1529. { 0x0d, 0x02214030 },
  1530. { 0x0e, 0x0181302e },
  1531. { 0x0f, 0x01014010 },
  1532. { 0x10, 0x01014020 },
  1533. { 0x11, 0x01014030 },
  1534. { 0x12, 0x02319040 },
  1535. { 0x13, 0x90a000f0 },
  1536. { 0x14, 0x90a000f0 },
  1537. { 0x22, 0x01452050 },
  1538. { 0x23, 0x01452050 },
  1539. {}
  1540. };
  1541. static const struct hda_pintbl dell_m6_pin_configs[] = {
  1542. { 0x0a, 0x0321101f },
  1543. { 0x0b, 0x4f00000f },
  1544. { 0x0c, 0x4f0000f0 },
  1545. { 0x0d, 0x90170110 },
  1546. { 0x0e, 0x03a11020 },
  1547. { 0x0f, 0x0321101f },
  1548. { 0x10, 0x4f0000f0 },
  1549. { 0x11, 0x4f0000f0 },
  1550. { 0x12, 0x4f0000f0 },
  1551. { 0x13, 0x90a60160 },
  1552. { 0x14, 0x4f0000f0 },
  1553. { 0x22, 0x4f0000f0 },
  1554. { 0x23, 0x4f0000f0 },
  1555. {}
  1556. };
  1557. static const struct hda_pintbl alienware_m17x_pin_configs[] = {
  1558. { 0x0a, 0x0321101f },
  1559. { 0x0b, 0x0321101f },
  1560. { 0x0c, 0x03a11020 },
  1561. { 0x0d, 0x03014020 },
  1562. { 0x0e, 0x90170110 },
  1563. { 0x0f, 0x4f0000f0 },
  1564. { 0x10, 0x4f0000f0 },
  1565. { 0x11, 0x4f0000f0 },
  1566. { 0x12, 0x4f0000f0 },
  1567. { 0x13, 0x90a60160 },
  1568. { 0x14, 0x4f0000f0 },
  1569. { 0x22, 0x4f0000f0 },
  1570. { 0x23, 0x904601b0 },
  1571. {}
  1572. };
  1573. static const struct hda_pintbl intel_dg45id_pin_configs[] = {
  1574. { 0x0a, 0x02214230 },
  1575. { 0x0b, 0x02A19240 },
  1576. { 0x0c, 0x01013214 },
  1577. { 0x0d, 0x01014210 },
  1578. { 0x0e, 0x01A19250 },
  1579. { 0x0f, 0x01011212 },
  1580. { 0x10, 0x01016211 },
  1581. {}
  1582. };
  1583. static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
  1584. { 0x0a, 0x02214030 },
  1585. { 0x0b, 0x02A19010 },
  1586. {}
  1587. };
  1588. static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
  1589. { 0x0e, 0x400000f0 },
  1590. {}
  1591. };
  1592. static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
  1593. const struct hda_fixup *fix, int action)
  1594. {
  1595. struct sigmatel_spec *spec = codec->spec;
  1596. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1597. return;
  1598. snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
  1599. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  1600. }
  1601. static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
  1602. {
  1603. struct sigmatel_spec *spec = codec->spec;
  1604. snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
  1605. spec->eapd_switch = 0;
  1606. }
  1607. static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
  1608. const struct hda_fixup *fix, int action)
  1609. {
  1610. struct sigmatel_spec *spec = codec->spec;
  1611. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1612. return;
  1613. stac92hd73xx_fixup_dell(codec);
  1614. snd_hda_add_verbs(codec, dell_eq_core_init);
  1615. spec->volknob_init = 1;
  1616. }
  1617. /* Analog Mics */
  1618. static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
  1619. const struct hda_fixup *fix, int action)
  1620. {
  1621. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1622. return;
  1623. stac92hd73xx_fixup_dell(codec);
  1624. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1625. }
  1626. /* Digital Mics */
  1627. static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
  1628. const struct hda_fixup *fix, int action)
  1629. {
  1630. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1631. return;
  1632. stac92hd73xx_fixup_dell(codec);
  1633. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1634. }
  1635. /* Both */
  1636. static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
  1637. const struct hda_fixup *fix, int action)
  1638. {
  1639. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1640. return;
  1641. stac92hd73xx_fixup_dell(codec);
  1642. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1643. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1644. }
  1645. static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
  1646. const struct hda_fixup *fix, int action)
  1647. {
  1648. struct sigmatel_spec *spec = codec->spec;
  1649. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1650. return;
  1651. snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
  1652. spec->eapd_switch = 0;
  1653. }
  1654. static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
  1655. const struct hda_fixup *fix, int action)
  1656. {
  1657. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1658. codec->no_jack_detect = 1;
  1659. }
  1660. static const struct hda_fixup stac92hd73xx_fixups[] = {
  1661. [STAC_92HD73XX_REF] = {
  1662. .type = HDA_FIXUP_FUNC,
  1663. .v.func = stac92hd73xx_fixup_ref,
  1664. },
  1665. [STAC_DELL_M6_AMIC] = {
  1666. .type = HDA_FIXUP_FUNC,
  1667. .v.func = stac92hd73xx_fixup_dell_m6_amic,
  1668. },
  1669. [STAC_DELL_M6_DMIC] = {
  1670. .type = HDA_FIXUP_FUNC,
  1671. .v.func = stac92hd73xx_fixup_dell_m6_dmic,
  1672. },
  1673. [STAC_DELL_M6_BOTH] = {
  1674. .type = HDA_FIXUP_FUNC,
  1675. .v.func = stac92hd73xx_fixup_dell_m6_both,
  1676. },
  1677. [STAC_DELL_EQ] = {
  1678. .type = HDA_FIXUP_FUNC,
  1679. .v.func = stac92hd73xx_fixup_dell_eq,
  1680. },
  1681. [STAC_ALIENWARE_M17X] = {
  1682. .type = HDA_FIXUP_FUNC,
  1683. .v.func = stac92hd73xx_fixup_alienware_m17x,
  1684. },
  1685. [STAC_92HD73XX_INTEL] = {
  1686. .type = HDA_FIXUP_PINS,
  1687. .v.pins = intel_dg45id_pin_configs,
  1688. },
  1689. [STAC_92HD73XX_NO_JD] = {
  1690. .type = HDA_FIXUP_FUNC,
  1691. .v.func = stac92hd73xx_fixup_no_jd,
  1692. },
  1693. [STAC_92HD89XX_HP_FRONT_JACK] = {
  1694. .type = HDA_FIXUP_PINS,
  1695. .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
  1696. },
  1697. [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
  1698. .type = HDA_FIXUP_PINS,
  1699. .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
  1700. },
  1701. [STAC_92HD73XX_ASUS_MOBO] = {
  1702. .type = HDA_FIXUP_PINS,
  1703. .v.pins = (const struct hda_pintbl[]) {
  1704. /* enable 5.1 and SPDIF out */
  1705. { 0x0c, 0x01014411 },
  1706. { 0x0d, 0x01014410 },
  1707. { 0x0e, 0x01014412 },
  1708. { 0x22, 0x014b1180 },
  1709. { }
  1710. }
  1711. },
  1712. };
  1713. static const struct hda_model_fixup stac92hd73xx_models[] = {
  1714. { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
  1715. { .id = STAC_92HD73XX_REF, .name = "ref" },
  1716. { .id = STAC_92HD73XX_INTEL, .name = "intel" },
  1717. { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
  1718. { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
  1719. { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
  1720. { .id = STAC_DELL_EQ, .name = "dell-eq" },
  1721. { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
  1722. { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
  1723. {}
  1724. };
  1725. static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
  1726. /* SigmaTel reference board */
  1727. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1728. "DFI LanParty", STAC_92HD73XX_REF),
  1729. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1730. "DFI LanParty", STAC_92HD73XX_REF),
  1731. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1732. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1733. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1734. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1735. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1736. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1737. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1738. "unknown Dell", STAC_DELL_M6_DMIC),
  1739. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1740. "unknown Dell", STAC_DELL_M6_BOTH),
  1741. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1742. "unknown Dell", STAC_DELL_M6_BOTH),
  1743. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1744. "unknown Dell", STAC_DELL_M6_AMIC),
  1745. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1746. "unknown Dell", STAC_DELL_M6_AMIC),
  1747. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1748. "unknown Dell", STAC_DELL_M6_DMIC),
  1749. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1750. "unknown Dell", STAC_DELL_M6_DMIC),
  1751. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1752. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1753. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1754. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1755. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1756. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1757. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1758. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1759. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1760. "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
  1761. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1762. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1763. /* codec SSID matching */
  1764. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1765. "Alienware M17x", STAC_ALIENWARE_M17X),
  1766. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
  1767. "Alienware M17x", STAC_ALIENWARE_M17X),
  1768. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
  1769. "Alienware M17x R3", STAC_DELL_EQ),
  1770. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
  1771. "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
  1772. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
  1773. "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
  1774. SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
  1775. STAC_92HD73XX_ASUS_MOBO),
  1776. {} /* terminator */
  1777. };
  1778. static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
  1779. { 0x0a, 0x02214030 },
  1780. { 0x0b, 0x02211010 },
  1781. { 0x0c, 0x02a19020 },
  1782. { 0x0d, 0x02170130 },
  1783. { 0x0e, 0x01014050 },
  1784. { 0x0f, 0x01819040 },
  1785. { 0x10, 0x01014020 },
  1786. { 0x11, 0x90a3014e },
  1787. { 0x1f, 0x01451160 },
  1788. { 0x20, 0x98560170 },
  1789. {}
  1790. };
  1791. static const struct hda_pintbl dell_s14_pin_configs[] = {
  1792. { 0x0a, 0x0221403f },
  1793. { 0x0b, 0x0221101f },
  1794. { 0x0c, 0x02a19020 },
  1795. { 0x0d, 0x90170110 },
  1796. { 0x0e, 0x40f000f0 },
  1797. { 0x0f, 0x40f000f0 },
  1798. { 0x10, 0x40f000f0 },
  1799. { 0x11, 0x90a60160 },
  1800. { 0x1f, 0x40f000f0 },
  1801. { 0x20, 0x40f000f0 },
  1802. {}
  1803. };
  1804. static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
  1805. { 0x0a, 0x02a11020 },
  1806. { 0x0b, 0x0221101f },
  1807. { 0x0c, 0x400000f0 },
  1808. { 0x0d, 0x90170110 },
  1809. { 0x0e, 0x400000f1 },
  1810. { 0x0f, 0x400000f2 },
  1811. { 0x10, 0x400000f3 },
  1812. { 0x11, 0x90a60160 },
  1813. { 0x1f, 0x400000f4 },
  1814. { 0x20, 0x400000f5 },
  1815. {}
  1816. };
  1817. static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
  1818. { 0x0a, 0x03a12050 },
  1819. { 0x0b, 0x0321201f },
  1820. { 0x0c, 0x40f000f0 },
  1821. { 0x0d, 0x90170110 },
  1822. { 0x0e, 0x40f000f0 },
  1823. { 0x0f, 0x40f000f0 },
  1824. { 0x10, 0x90170110 },
  1825. { 0x11, 0xd5a30140 },
  1826. { 0x1f, 0x40f000f0 },
  1827. { 0x20, 0x40f000f0 },
  1828. {}
  1829. };
  1830. static const struct hda_pintbl hp_zephyr_pin_configs[] = {
  1831. { 0x0a, 0x01813050 },
  1832. { 0x0b, 0x0421201f },
  1833. { 0x0c, 0x04a1205e },
  1834. { 0x0d, 0x96130310 },
  1835. { 0x0e, 0x96130310 },
  1836. { 0x0f, 0x0101401f },
  1837. { 0x10, 0x1111611f },
  1838. { 0x11, 0xd5a30130 },
  1839. {}
  1840. };
  1841. static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
  1842. { 0x0a, 0x40f000f0 },
  1843. { 0x0b, 0x0221101f },
  1844. { 0x0c, 0x02a11020 },
  1845. { 0x0d, 0x92170110 },
  1846. { 0x0e, 0x40f000f0 },
  1847. { 0x0f, 0x92170110 },
  1848. { 0x10, 0x40f000f0 },
  1849. { 0x11, 0xd5a30130 },
  1850. { 0x1f, 0x40f000f0 },
  1851. { 0x20, 0x40f000f0 },
  1852. {}
  1853. };
  1854. static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
  1855. const struct hda_fixup *fix, int action)
  1856. {
  1857. struct sigmatel_spec *spec = codec->spec;
  1858. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1859. return;
  1860. if (hp_bnb2011_with_dock(codec)) {
  1861. snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
  1862. snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
  1863. }
  1864. if (find_mute_led_cfg(codec, spec->default_polarity))
  1865. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  1866. spec->gpio_led,
  1867. spec->gpio_led_polarity);
  1868. /* allow auto-switching of dock line-in */
  1869. spec->gen.line_in_auto_switch = true;
  1870. }
  1871. static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
  1872. const struct hda_fixup *fix, int action)
  1873. {
  1874. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1875. return;
  1876. snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
  1877. snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
  1878. }
  1879. static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
  1880. const struct hda_fixup *fix, int action)
  1881. {
  1882. struct sigmatel_spec *spec = codec->spec;
  1883. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1884. spec->default_polarity = 0;
  1885. }
  1886. static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
  1887. const struct hda_fixup *fix, int action)
  1888. {
  1889. struct sigmatel_spec *spec = codec->spec;
  1890. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1891. spec->default_polarity = 1;
  1892. }
  1893. static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
  1894. const struct hda_fixup *fix, int action)
  1895. {
  1896. struct sigmatel_spec *spec = codec->spec;
  1897. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1898. spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
  1899. #ifdef CONFIG_PM
  1900. /* resetting controller clears GPIO, so we need to keep on */
  1901. codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
  1902. #endif
  1903. }
  1904. }
  1905. static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
  1906. const struct hda_fixup *fix, int action)
  1907. {
  1908. struct sigmatel_spec *spec = codec->spec;
  1909. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1910. spec->gpio_led = 0x10; /* GPIO4 */
  1911. spec->default_polarity = 0;
  1912. }
  1913. }
  1914. static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
  1915. const struct hda_fixup *fix, int action)
  1916. {
  1917. struct sigmatel_spec *spec = codec->spec;
  1918. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1919. spec->headset_jack = 1;
  1920. }
  1921. static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
  1922. const struct hda_fixup *fix,
  1923. int action)
  1924. {
  1925. struct sigmatel_spec *spec = codec->spec;
  1926. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1927. return;
  1928. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
  1929. spec->gpio_data = 0x10;
  1930. spec->eapd_switch = 0;
  1931. }
  1932. static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
  1933. const struct hda_fixup *fix,
  1934. int action)
  1935. {
  1936. struct sigmatel_spec *spec = codec->spec;
  1937. static hda_nid_t preferred_pairs[] = {
  1938. 0xd, 0x13,
  1939. 0
  1940. };
  1941. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1942. return;
  1943. spec->gen.preferred_dacs = preferred_pairs;
  1944. }
  1945. static const struct hda_verb hp_bnb13_eq_verbs[] = {
  1946. /* 44.1KHz base */
  1947. { 0x22, 0x7A6, 0x3E },
  1948. { 0x22, 0x7A7, 0x68 },
  1949. { 0x22, 0x7A8, 0x17 },
  1950. { 0x22, 0x7A9, 0x3E },
  1951. { 0x22, 0x7AA, 0x68 },
  1952. { 0x22, 0x7AB, 0x17 },
  1953. { 0x22, 0x7AC, 0x00 },
  1954. { 0x22, 0x7AD, 0x80 },
  1955. { 0x22, 0x7A6, 0x83 },
  1956. { 0x22, 0x7A7, 0x2F },
  1957. { 0x22, 0x7A8, 0xD1 },
  1958. { 0x22, 0x7A9, 0x83 },
  1959. { 0x22, 0x7AA, 0x2F },
  1960. { 0x22, 0x7AB, 0xD1 },
  1961. { 0x22, 0x7AC, 0x01 },
  1962. { 0x22, 0x7AD, 0x80 },
  1963. { 0x22, 0x7A6, 0x3E },
  1964. { 0x22, 0x7A7, 0x68 },
  1965. { 0x22, 0x7A8, 0x17 },
  1966. { 0x22, 0x7A9, 0x3E },
  1967. { 0x22, 0x7AA, 0x68 },
  1968. { 0x22, 0x7AB, 0x17 },
  1969. { 0x22, 0x7AC, 0x02 },
  1970. { 0x22, 0x7AD, 0x80 },
  1971. { 0x22, 0x7A6, 0x7C },
  1972. { 0x22, 0x7A7, 0xC6 },
  1973. { 0x22, 0x7A8, 0x0C },
  1974. { 0x22, 0x7A9, 0x7C },
  1975. { 0x22, 0x7AA, 0xC6 },
  1976. { 0x22, 0x7AB, 0x0C },
  1977. { 0x22, 0x7AC, 0x03 },
  1978. { 0x22, 0x7AD, 0x80 },
  1979. { 0x22, 0x7A6, 0xC3 },
  1980. { 0x22, 0x7A7, 0x25 },
  1981. { 0x22, 0x7A8, 0xAF },
  1982. { 0x22, 0x7A9, 0xC3 },
  1983. { 0x22, 0x7AA, 0x25 },
  1984. { 0x22, 0x7AB, 0xAF },
  1985. { 0x22, 0x7AC, 0x04 },
  1986. { 0x22, 0x7AD, 0x80 },
  1987. { 0x22, 0x7A6, 0x3E },
  1988. { 0x22, 0x7A7, 0x85 },
  1989. { 0x22, 0x7A8, 0x73 },
  1990. { 0x22, 0x7A9, 0x3E },
  1991. { 0x22, 0x7AA, 0x85 },
  1992. { 0x22, 0x7AB, 0x73 },
  1993. { 0x22, 0x7AC, 0x05 },
  1994. { 0x22, 0x7AD, 0x80 },
  1995. { 0x22, 0x7A6, 0x85 },
  1996. { 0x22, 0x7A7, 0x39 },
  1997. { 0x22, 0x7A8, 0xC7 },
  1998. { 0x22, 0x7A9, 0x85 },
  1999. { 0x22, 0x7AA, 0x39 },
  2000. { 0x22, 0x7AB, 0xC7 },
  2001. { 0x22, 0x7AC, 0x06 },
  2002. { 0x22, 0x7AD, 0x80 },
  2003. { 0x22, 0x7A6, 0x3C },
  2004. { 0x22, 0x7A7, 0x90 },
  2005. { 0x22, 0x7A8, 0xB0 },
  2006. { 0x22, 0x7A9, 0x3C },
  2007. { 0x22, 0x7AA, 0x90 },
  2008. { 0x22, 0x7AB, 0xB0 },
  2009. { 0x22, 0x7AC, 0x07 },
  2010. { 0x22, 0x7AD, 0x80 },
  2011. { 0x22, 0x7A6, 0x7A },
  2012. { 0x22, 0x7A7, 0xC6 },
  2013. { 0x22, 0x7A8, 0x39 },
  2014. { 0x22, 0x7A9, 0x7A },
  2015. { 0x22, 0x7AA, 0xC6 },
  2016. { 0x22, 0x7AB, 0x39 },
  2017. { 0x22, 0x7AC, 0x08 },
  2018. { 0x22, 0x7AD, 0x80 },
  2019. { 0x22, 0x7A6, 0xC4 },
  2020. { 0x22, 0x7A7, 0xE9 },
  2021. { 0x22, 0x7A8, 0xDC },
  2022. { 0x22, 0x7A9, 0xC4 },
  2023. { 0x22, 0x7AA, 0xE9 },
  2024. { 0x22, 0x7AB, 0xDC },
  2025. { 0x22, 0x7AC, 0x09 },
  2026. { 0x22, 0x7AD, 0x80 },
  2027. { 0x22, 0x7A6, 0x3D },
  2028. { 0x22, 0x7A7, 0xE1 },
  2029. { 0x22, 0x7A8, 0x0D },
  2030. { 0x22, 0x7A9, 0x3D },
  2031. { 0x22, 0x7AA, 0xE1 },
  2032. { 0x22, 0x7AB, 0x0D },
  2033. { 0x22, 0x7AC, 0x0A },
  2034. { 0x22, 0x7AD, 0x80 },
  2035. { 0x22, 0x7A6, 0x89 },
  2036. { 0x22, 0x7A7, 0xB6 },
  2037. { 0x22, 0x7A8, 0xEB },
  2038. { 0x22, 0x7A9, 0x89 },
  2039. { 0x22, 0x7AA, 0xB6 },
  2040. { 0x22, 0x7AB, 0xEB },
  2041. { 0x22, 0x7AC, 0x0B },
  2042. { 0x22, 0x7AD, 0x80 },
  2043. { 0x22, 0x7A6, 0x39 },
  2044. { 0x22, 0x7A7, 0x9D },
  2045. { 0x22, 0x7A8, 0xFE },
  2046. { 0x22, 0x7A9, 0x39 },
  2047. { 0x22, 0x7AA, 0x9D },
  2048. { 0x22, 0x7AB, 0xFE },
  2049. { 0x22, 0x7AC, 0x0C },
  2050. { 0x22, 0x7AD, 0x80 },
  2051. { 0x22, 0x7A6, 0x76 },
  2052. { 0x22, 0x7A7, 0x49 },
  2053. { 0x22, 0x7A8, 0x15 },
  2054. { 0x22, 0x7A9, 0x76 },
  2055. { 0x22, 0x7AA, 0x49 },
  2056. { 0x22, 0x7AB, 0x15 },
  2057. { 0x22, 0x7AC, 0x0D },
  2058. { 0x22, 0x7AD, 0x80 },
  2059. { 0x22, 0x7A6, 0xC8 },
  2060. { 0x22, 0x7A7, 0x80 },
  2061. { 0x22, 0x7A8, 0xF5 },
  2062. { 0x22, 0x7A9, 0xC8 },
  2063. { 0x22, 0x7AA, 0x80 },
  2064. { 0x22, 0x7AB, 0xF5 },
  2065. { 0x22, 0x7AC, 0x0E },
  2066. { 0x22, 0x7AD, 0x80 },
  2067. { 0x22, 0x7A6, 0x40 },
  2068. { 0x22, 0x7A7, 0x00 },
  2069. { 0x22, 0x7A8, 0x00 },
  2070. { 0x22, 0x7A9, 0x40 },
  2071. { 0x22, 0x7AA, 0x00 },
  2072. { 0x22, 0x7AB, 0x00 },
  2073. { 0x22, 0x7AC, 0x0F },
  2074. { 0x22, 0x7AD, 0x80 },
  2075. { 0x22, 0x7A6, 0x90 },
  2076. { 0x22, 0x7A7, 0x68 },
  2077. { 0x22, 0x7A8, 0xF1 },
  2078. { 0x22, 0x7A9, 0x90 },
  2079. { 0x22, 0x7AA, 0x68 },
  2080. { 0x22, 0x7AB, 0xF1 },
  2081. { 0x22, 0x7AC, 0x10 },
  2082. { 0x22, 0x7AD, 0x80 },
  2083. { 0x22, 0x7A6, 0x34 },
  2084. { 0x22, 0x7A7, 0x47 },
  2085. { 0x22, 0x7A8, 0x6C },
  2086. { 0x22, 0x7A9, 0x34 },
  2087. { 0x22, 0x7AA, 0x47 },
  2088. { 0x22, 0x7AB, 0x6C },
  2089. { 0x22, 0x7AC, 0x11 },
  2090. { 0x22, 0x7AD, 0x80 },
  2091. { 0x22, 0x7A6, 0x6F },
  2092. { 0x22, 0x7A7, 0x97 },
  2093. { 0x22, 0x7A8, 0x0F },
  2094. { 0x22, 0x7A9, 0x6F },
  2095. { 0x22, 0x7AA, 0x97 },
  2096. { 0x22, 0x7AB, 0x0F },
  2097. { 0x22, 0x7AC, 0x12 },
  2098. { 0x22, 0x7AD, 0x80 },
  2099. { 0x22, 0x7A6, 0xCB },
  2100. { 0x22, 0x7A7, 0xB8 },
  2101. { 0x22, 0x7A8, 0x94 },
  2102. { 0x22, 0x7A9, 0xCB },
  2103. { 0x22, 0x7AA, 0xB8 },
  2104. { 0x22, 0x7AB, 0x94 },
  2105. { 0x22, 0x7AC, 0x13 },
  2106. { 0x22, 0x7AD, 0x80 },
  2107. { 0x22, 0x7A6, 0x40 },
  2108. { 0x22, 0x7A7, 0x00 },
  2109. { 0x22, 0x7A8, 0x00 },
  2110. { 0x22, 0x7A9, 0x40 },
  2111. { 0x22, 0x7AA, 0x00 },
  2112. { 0x22, 0x7AB, 0x00 },
  2113. { 0x22, 0x7AC, 0x14 },
  2114. { 0x22, 0x7AD, 0x80 },
  2115. { 0x22, 0x7A6, 0x95 },
  2116. { 0x22, 0x7A7, 0x76 },
  2117. { 0x22, 0x7A8, 0x5B },
  2118. { 0x22, 0x7A9, 0x95 },
  2119. { 0x22, 0x7AA, 0x76 },
  2120. { 0x22, 0x7AB, 0x5B },
  2121. { 0x22, 0x7AC, 0x15 },
  2122. { 0x22, 0x7AD, 0x80 },
  2123. { 0x22, 0x7A6, 0x31 },
  2124. { 0x22, 0x7A7, 0xAC },
  2125. { 0x22, 0x7A8, 0x31 },
  2126. { 0x22, 0x7A9, 0x31 },
  2127. { 0x22, 0x7AA, 0xAC },
  2128. { 0x22, 0x7AB, 0x31 },
  2129. { 0x22, 0x7AC, 0x16 },
  2130. { 0x22, 0x7AD, 0x80 },
  2131. { 0x22, 0x7A6, 0x6A },
  2132. { 0x22, 0x7A7, 0x89 },
  2133. { 0x22, 0x7A8, 0xA5 },
  2134. { 0x22, 0x7A9, 0x6A },
  2135. { 0x22, 0x7AA, 0x89 },
  2136. { 0x22, 0x7AB, 0xA5 },
  2137. { 0x22, 0x7AC, 0x17 },
  2138. { 0x22, 0x7AD, 0x80 },
  2139. { 0x22, 0x7A6, 0xCE },
  2140. { 0x22, 0x7A7, 0x53 },
  2141. { 0x22, 0x7A8, 0xCF },
  2142. { 0x22, 0x7A9, 0xCE },
  2143. { 0x22, 0x7AA, 0x53 },
  2144. { 0x22, 0x7AB, 0xCF },
  2145. { 0x22, 0x7AC, 0x18 },
  2146. { 0x22, 0x7AD, 0x80 },
  2147. { 0x22, 0x7A6, 0x40 },
  2148. { 0x22, 0x7A7, 0x00 },
  2149. { 0x22, 0x7A8, 0x00 },
  2150. { 0x22, 0x7A9, 0x40 },
  2151. { 0x22, 0x7AA, 0x00 },
  2152. { 0x22, 0x7AB, 0x00 },
  2153. { 0x22, 0x7AC, 0x19 },
  2154. { 0x22, 0x7AD, 0x80 },
  2155. /* 48KHz base */
  2156. { 0x22, 0x7A6, 0x3E },
  2157. { 0x22, 0x7A7, 0x88 },
  2158. { 0x22, 0x7A8, 0xDC },
  2159. { 0x22, 0x7A9, 0x3E },
  2160. { 0x22, 0x7AA, 0x88 },
  2161. { 0x22, 0x7AB, 0xDC },
  2162. { 0x22, 0x7AC, 0x1A },
  2163. { 0x22, 0x7AD, 0x80 },
  2164. { 0x22, 0x7A6, 0x82 },
  2165. { 0x22, 0x7A7, 0xEE },
  2166. { 0x22, 0x7A8, 0x46 },
  2167. { 0x22, 0x7A9, 0x82 },
  2168. { 0x22, 0x7AA, 0xEE },
  2169. { 0x22, 0x7AB, 0x46 },
  2170. { 0x22, 0x7AC, 0x1B },
  2171. { 0x22, 0x7AD, 0x80 },
  2172. { 0x22, 0x7A6, 0x3E },
  2173. { 0x22, 0x7A7, 0x88 },
  2174. { 0x22, 0x7A8, 0xDC },
  2175. { 0x22, 0x7A9, 0x3E },
  2176. { 0x22, 0x7AA, 0x88 },
  2177. { 0x22, 0x7AB, 0xDC },
  2178. { 0x22, 0x7AC, 0x1C },
  2179. { 0x22, 0x7AD, 0x80 },
  2180. { 0x22, 0x7A6, 0x7D },
  2181. { 0x22, 0x7A7, 0x09 },
  2182. { 0x22, 0x7A8, 0x28 },
  2183. { 0x22, 0x7A9, 0x7D },
  2184. { 0x22, 0x7AA, 0x09 },
  2185. { 0x22, 0x7AB, 0x28 },
  2186. { 0x22, 0x7AC, 0x1D },
  2187. { 0x22, 0x7AD, 0x80 },
  2188. { 0x22, 0x7A6, 0xC2 },
  2189. { 0x22, 0x7A7, 0xE5 },
  2190. { 0x22, 0x7A8, 0xB4 },
  2191. { 0x22, 0x7A9, 0xC2 },
  2192. { 0x22, 0x7AA, 0xE5 },
  2193. { 0x22, 0x7AB, 0xB4 },
  2194. { 0x22, 0x7AC, 0x1E },
  2195. { 0x22, 0x7AD, 0x80 },
  2196. { 0x22, 0x7A6, 0x3E },
  2197. { 0x22, 0x7A7, 0xA3 },
  2198. { 0x22, 0x7A8, 0x1F },
  2199. { 0x22, 0x7A9, 0x3E },
  2200. { 0x22, 0x7AA, 0xA3 },
  2201. { 0x22, 0x7AB, 0x1F },
  2202. { 0x22, 0x7AC, 0x1F },
  2203. { 0x22, 0x7AD, 0x80 },
  2204. { 0x22, 0x7A6, 0x84 },
  2205. { 0x22, 0x7A7, 0xCA },
  2206. { 0x22, 0x7A8, 0xF1 },
  2207. { 0x22, 0x7A9, 0x84 },
  2208. { 0x22, 0x7AA, 0xCA },
  2209. { 0x22, 0x7AB, 0xF1 },
  2210. { 0x22, 0x7AC, 0x20 },
  2211. { 0x22, 0x7AD, 0x80 },
  2212. { 0x22, 0x7A6, 0x3C },
  2213. { 0x22, 0x7A7, 0xD5 },
  2214. { 0x22, 0x7A8, 0x9C },
  2215. { 0x22, 0x7A9, 0x3C },
  2216. { 0x22, 0x7AA, 0xD5 },
  2217. { 0x22, 0x7AB, 0x9C },
  2218. { 0x22, 0x7AC, 0x21 },
  2219. { 0x22, 0x7AD, 0x80 },
  2220. { 0x22, 0x7A6, 0x7B },
  2221. { 0x22, 0x7A7, 0x35 },
  2222. { 0x22, 0x7A8, 0x0F },
  2223. { 0x22, 0x7A9, 0x7B },
  2224. { 0x22, 0x7AA, 0x35 },
  2225. { 0x22, 0x7AB, 0x0F },
  2226. { 0x22, 0x7AC, 0x22 },
  2227. { 0x22, 0x7AD, 0x80 },
  2228. { 0x22, 0x7A6, 0xC4 },
  2229. { 0x22, 0x7A7, 0x87 },
  2230. { 0x22, 0x7A8, 0x45 },
  2231. { 0x22, 0x7A9, 0xC4 },
  2232. { 0x22, 0x7AA, 0x87 },
  2233. { 0x22, 0x7AB, 0x45 },
  2234. { 0x22, 0x7AC, 0x23 },
  2235. { 0x22, 0x7AD, 0x80 },
  2236. { 0x22, 0x7A6, 0x3E },
  2237. { 0x22, 0x7A7, 0x0A },
  2238. { 0x22, 0x7A8, 0x78 },
  2239. { 0x22, 0x7A9, 0x3E },
  2240. { 0x22, 0x7AA, 0x0A },
  2241. { 0x22, 0x7AB, 0x78 },
  2242. { 0x22, 0x7AC, 0x24 },
  2243. { 0x22, 0x7AD, 0x80 },
  2244. { 0x22, 0x7A6, 0x88 },
  2245. { 0x22, 0x7A7, 0xE2 },
  2246. { 0x22, 0x7A8, 0x05 },
  2247. { 0x22, 0x7A9, 0x88 },
  2248. { 0x22, 0x7AA, 0xE2 },
  2249. { 0x22, 0x7AB, 0x05 },
  2250. { 0x22, 0x7AC, 0x25 },
  2251. { 0x22, 0x7AD, 0x80 },
  2252. { 0x22, 0x7A6, 0x3A },
  2253. { 0x22, 0x7A7, 0x1A },
  2254. { 0x22, 0x7A8, 0xA3 },
  2255. { 0x22, 0x7A9, 0x3A },
  2256. { 0x22, 0x7AA, 0x1A },
  2257. { 0x22, 0x7AB, 0xA3 },
  2258. { 0x22, 0x7AC, 0x26 },
  2259. { 0x22, 0x7AD, 0x80 },
  2260. { 0x22, 0x7A6, 0x77 },
  2261. { 0x22, 0x7A7, 0x1D },
  2262. { 0x22, 0x7A8, 0xFB },
  2263. { 0x22, 0x7A9, 0x77 },
  2264. { 0x22, 0x7AA, 0x1D },
  2265. { 0x22, 0x7AB, 0xFB },
  2266. { 0x22, 0x7AC, 0x27 },
  2267. { 0x22, 0x7AD, 0x80 },
  2268. { 0x22, 0x7A6, 0xC7 },
  2269. { 0x22, 0x7A7, 0xDA },
  2270. { 0x22, 0x7A8, 0xE5 },
  2271. { 0x22, 0x7A9, 0xC7 },
  2272. { 0x22, 0x7AA, 0xDA },
  2273. { 0x22, 0x7AB, 0xE5 },
  2274. { 0x22, 0x7AC, 0x28 },
  2275. { 0x22, 0x7AD, 0x80 },
  2276. { 0x22, 0x7A6, 0x40 },
  2277. { 0x22, 0x7A7, 0x00 },
  2278. { 0x22, 0x7A8, 0x00 },
  2279. { 0x22, 0x7A9, 0x40 },
  2280. { 0x22, 0x7AA, 0x00 },
  2281. { 0x22, 0x7AB, 0x00 },
  2282. { 0x22, 0x7AC, 0x29 },
  2283. { 0x22, 0x7AD, 0x80 },
  2284. { 0x22, 0x7A6, 0x8E },
  2285. { 0x22, 0x7A7, 0xD7 },
  2286. { 0x22, 0x7A8, 0x22 },
  2287. { 0x22, 0x7A9, 0x8E },
  2288. { 0x22, 0x7AA, 0xD7 },
  2289. { 0x22, 0x7AB, 0x22 },
  2290. { 0x22, 0x7AC, 0x2A },
  2291. { 0x22, 0x7AD, 0x80 },
  2292. { 0x22, 0x7A6, 0x35 },
  2293. { 0x22, 0x7A7, 0x26 },
  2294. { 0x22, 0x7A8, 0xC6 },
  2295. { 0x22, 0x7A9, 0x35 },
  2296. { 0x22, 0x7AA, 0x26 },
  2297. { 0x22, 0x7AB, 0xC6 },
  2298. { 0x22, 0x7AC, 0x2B },
  2299. { 0x22, 0x7AD, 0x80 },
  2300. { 0x22, 0x7A6, 0x71 },
  2301. { 0x22, 0x7A7, 0x28 },
  2302. { 0x22, 0x7A8, 0xDE },
  2303. { 0x22, 0x7A9, 0x71 },
  2304. { 0x22, 0x7AA, 0x28 },
  2305. { 0x22, 0x7AB, 0xDE },
  2306. { 0x22, 0x7AC, 0x2C },
  2307. { 0x22, 0x7AD, 0x80 },
  2308. { 0x22, 0x7A6, 0xCA },
  2309. { 0x22, 0x7A7, 0xD9 },
  2310. { 0x22, 0x7A8, 0x3A },
  2311. { 0x22, 0x7A9, 0xCA },
  2312. { 0x22, 0x7AA, 0xD9 },
  2313. { 0x22, 0x7AB, 0x3A },
  2314. { 0x22, 0x7AC, 0x2D },
  2315. { 0x22, 0x7AD, 0x80 },
  2316. { 0x22, 0x7A6, 0x40 },
  2317. { 0x22, 0x7A7, 0x00 },
  2318. { 0x22, 0x7A8, 0x00 },
  2319. { 0x22, 0x7A9, 0x40 },
  2320. { 0x22, 0x7AA, 0x00 },
  2321. { 0x22, 0x7AB, 0x00 },
  2322. { 0x22, 0x7AC, 0x2E },
  2323. { 0x22, 0x7AD, 0x80 },
  2324. { 0x22, 0x7A6, 0x93 },
  2325. { 0x22, 0x7A7, 0x5E },
  2326. { 0x22, 0x7A8, 0xD8 },
  2327. { 0x22, 0x7A9, 0x93 },
  2328. { 0x22, 0x7AA, 0x5E },
  2329. { 0x22, 0x7AB, 0xD8 },
  2330. { 0x22, 0x7AC, 0x2F },
  2331. { 0x22, 0x7AD, 0x80 },
  2332. { 0x22, 0x7A6, 0x32 },
  2333. { 0x22, 0x7A7, 0xB7 },
  2334. { 0x22, 0x7A8, 0xB1 },
  2335. { 0x22, 0x7A9, 0x32 },
  2336. { 0x22, 0x7AA, 0xB7 },
  2337. { 0x22, 0x7AB, 0xB1 },
  2338. { 0x22, 0x7AC, 0x30 },
  2339. { 0x22, 0x7AD, 0x80 },
  2340. { 0x22, 0x7A6, 0x6C },
  2341. { 0x22, 0x7A7, 0xA1 },
  2342. { 0x22, 0x7A8, 0x28 },
  2343. { 0x22, 0x7A9, 0x6C },
  2344. { 0x22, 0x7AA, 0xA1 },
  2345. { 0x22, 0x7AB, 0x28 },
  2346. { 0x22, 0x7AC, 0x31 },
  2347. { 0x22, 0x7AD, 0x80 },
  2348. { 0x22, 0x7A6, 0xCD },
  2349. { 0x22, 0x7A7, 0x48 },
  2350. { 0x22, 0x7A8, 0x4F },
  2351. { 0x22, 0x7A9, 0xCD },
  2352. { 0x22, 0x7AA, 0x48 },
  2353. { 0x22, 0x7AB, 0x4F },
  2354. { 0x22, 0x7AC, 0x32 },
  2355. { 0x22, 0x7AD, 0x80 },
  2356. { 0x22, 0x7A6, 0x40 },
  2357. { 0x22, 0x7A7, 0x00 },
  2358. { 0x22, 0x7A8, 0x00 },
  2359. { 0x22, 0x7A9, 0x40 },
  2360. { 0x22, 0x7AA, 0x00 },
  2361. { 0x22, 0x7AB, 0x00 },
  2362. { 0x22, 0x7AC, 0x33 },
  2363. { 0x22, 0x7AD, 0x80 },
  2364. /* common */
  2365. { 0x22, 0x782, 0xC1 },
  2366. { 0x22, 0x771, 0x2C },
  2367. { 0x22, 0x772, 0x2C },
  2368. { 0x22, 0x788, 0x04 },
  2369. { 0x01, 0x7B0, 0x08 },
  2370. {}
  2371. };
  2372. static const struct hda_fixup stac92hd83xxx_fixups[] = {
  2373. [STAC_92HD83XXX_REF] = {
  2374. .type = HDA_FIXUP_PINS,
  2375. .v.pins = ref92hd83xxx_pin_configs,
  2376. },
  2377. [STAC_92HD83XXX_PWR_REF] = {
  2378. .type = HDA_FIXUP_PINS,
  2379. .v.pins = ref92hd83xxx_pin_configs,
  2380. },
  2381. [STAC_DELL_S14] = {
  2382. .type = HDA_FIXUP_PINS,
  2383. .v.pins = dell_s14_pin_configs,
  2384. },
  2385. [STAC_DELL_VOSTRO_3500] = {
  2386. .type = HDA_FIXUP_PINS,
  2387. .v.pins = dell_vostro_3500_pin_configs,
  2388. },
  2389. [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
  2390. .type = HDA_FIXUP_PINS,
  2391. .v.pins = hp_cNB11_intquad_pin_configs,
  2392. .chained = true,
  2393. .chain_id = STAC_92HD83XXX_HP,
  2394. },
  2395. [STAC_92HD83XXX_HP] = {
  2396. .type = HDA_FIXUP_FUNC,
  2397. .v.func = stac92hd83xxx_fixup_hp,
  2398. },
  2399. [STAC_HP_DV7_4000] = {
  2400. .type = HDA_FIXUP_PINS,
  2401. .v.pins = hp_dv7_4000_pin_configs,
  2402. .chained = true,
  2403. .chain_id = STAC_92HD83XXX_HP,
  2404. },
  2405. [STAC_HP_ZEPHYR] = {
  2406. .type = HDA_FIXUP_FUNC,
  2407. .v.func = stac92hd83xxx_fixup_hp_zephyr,
  2408. .chained = true,
  2409. .chain_id = STAC_92HD83XXX_HP,
  2410. },
  2411. [STAC_92HD83XXX_HP_LED] = {
  2412. .type = HDA_FIXUP_FUNC,
  2413. .v.func = stac92hd83xxx_fixup_hp_led,
  2414. .chained = true,
  2415. .chain_id = STAC_92HD83XXX_HP,
  2416. },
  2417. [STAC_92HD83XXX_HP_INV_LED] = {
  2418. .type = HDA_FIXUP_FUNC,
  2419. .v.func = stac92hd83xxx_fixup_hp_inv_led,
  2420. .chained = true,
  2421. .chain_id = STAC_92HD83XXX_HP,
  2422. },
  2423. [STAC_92HD83XXX_HP_MIC_LED] = {
  2424. .type = HDA_FIXUP_FUNC,
  2425. .v.func = stac92hd83xxx_fixup_hp_mic_led,
  2426. .chained = true,
  2427. .chain_id = STAC_92HD83XXX_HP,
  2428. },
  2429. [STAC_HP_LED_GPIO10] = {
  2430. .type = HDA_FIXUP_FUNC,
  2431. .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
  2432. .chained = true,
  2433. .chain_id = STAC_92HD83XXX_HP,
  2434. },
  2435. [STAC_92HD83XXX_HEADSET_JACK] = {
  2436. .type = HDA_FIXUP_FUNC,
  2437. .v.func = stac92hd83xxx_fixup_headset_jack,
  2438. },
  2439. [STAC_HP_ENVY_BASS] = {
  2440. .type = HDA_FIXUP_PINS,
  2441. .v.pins = (const struct hda_pintbl[]) {
  2442. { 0x0f, 0x90170111 },
  2443. {}
  2444. },
  2445. },
  2446. [STAC_HP_BNB13_EQ] = {
  2447. .type = HDA_FIXUP_VERBS,
  2448. .v.verbs = hp_bnb13_eq_verbs,
  2449. .chained = true,
  2450. .chain_id = STAC_92HD83XXX_HP_MIC_LED,
  2451. },
  2452. [STAC_HP_ENVY_TS_BASS] = {
  2453. .type = HDA_FIXUP_PINS,
  2454. .v.pins = (const struct hda_pintbl[]) {
  2455. { 0x10, 0x92170111 },
  2456. {}
  2457. },
  2458. },
  2459. [STAC_HP_ENVY_TS_DAC_BIND] = {
  2460. .type = HDA_FIXUP_FUNC,
  2461. .v.func = hp_envy_ts_fixup_dac_bind,
  2462. .chained = true,
  2463. .chain_id = STAC_HP_ENVY_TS_BASS,
  2464. },
  2465. [STAC_92HD83XXX_GPIO10_EAPD] = {
  2466. .type = HDA_FIXUP_FUNC,
  2467. .v.func = stac92hd83xxx_fixup_gpio10_eapd,
  2468. },
  2469. };
  2470. static const struct hda_model_fixup stac92hd83xxx_models[] = {
  2471. { .id = STAC_92HD83XXX_REF, .name = "ref" },
  2472. { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
  2473. { .id = STAC_DELL_S14, .name = "dell-s14" },
  2474. { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
  2475. { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
  2476. { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
  2477. { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
  2478. { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
  2479. { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
  2480. { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
  2481. { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
  2482. { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
  2483. { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
  2484. { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
  2485. {}
  2486. };
  2487. static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
  2488. /* SigmaTel reference board */
  2489. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2490. "DFI LanParty", STAC_92HD83XXX_REF),
  2491. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2492. "DFI LanParty", STAC_92HD83XXX_REF),
  2493. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  2494. "unknown Dell", STAC_DELL_S14),
  2495. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
  2496. "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
  2497. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
  2498. "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
  2499. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
  2500. "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
  2501. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
  2502. "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
  2503. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
  2504. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2505. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
  2506. "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
  2507. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
  2508. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2509. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
  2510. "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
  2511. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
  2512. "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
  2513. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
  2514. "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
  2515. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
  2516. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2517. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
  2518. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2519. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
  2520. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2521. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
  2522. "HP Pavilion dv7", STAC_HP_DV7_4000),
  2523. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
  2524. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2525. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
  2526. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2527. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
  2528. "HP Envy Spectre", STAC_HP_ENVY_BASS),
  2529. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
  2530. "HP Folio 13", STAC_HP_LED_GPIO10),
  2531. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
  2532. "HP Folio", STAC_HP_BNB13_EQ),
  2533. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
  2534. "HP bNB13", STAC_HP_BNB13_EQ),
  2535. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
  2536. "HP bNB13", STAC_HP_BNB13_EQ),
  2537. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
  2538. "HP bNB13", STAC_HP_BNB13_EQ),
  2539. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
  2540. "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
  2541. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
  2542. "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
  2543. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
  2544. "HP bNB13", STAC_HP_BNB13_EQ),
  2545. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
  2546. "HP bNB13", STAC_HP_BNB13_EQ),
  2547. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
  2548. "HP bNB13", STAC_HP_BNB13_EQ),
  2549. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
  2550. "HP bNB13", STAC_HP_BNB13_EQ),
  2551. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
  2552. "HP bNB13", STAC_HP_BNB13_EQ),
  2553. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
  2554. "HP bNB13", STAC_HP_BNB13_EQ),
  2555. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
  2556. "HP bNB13", STAC_HP_BNB13_EQ),
  2557. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
  2558. "HP bNB13", STAC_HP_BNB13_EQ),
  2559. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
  2560. "HP bNB13", STAC_HP_BNB13_EQ),
  2561. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
  2562. "HP bNB13", STAC_HP_BNB13_EQ),
  2563. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
  2564. "HP bNB13", STAC_HP_BNB13_EQ),
  2565. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
  2566. "HP bNB13", STAC_HP_BNB13_EQ),
  2567. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
  2568. "HP bNB13", STAC_HP_BNB13_EQ),
  2569. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
  2570. "HP bNB13", STAC_HP_BNB13_EQ),
  2571. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
  2572. "HP bNB13", STAC_HP_BNB13_EQ),
  2573. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
  2574. "HP bNB13", STAC_HP_BNB13_EQ),
  2575. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
  2576. "HP bNB13", STAC_HP_BNB13_EQ),
  2577. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
  2578. "HP bNB13", STAC_HP_BNB13_EQ),
  2579. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
  2580. "HP bNB13", STAC_HP_BNB13_EQ),
  2581. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
  2582. "HP bNB13", STAC_HP_BNB13_EQ),
  2583. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
  2584. "HP bNB13", STAC_HP_BNB13_EQ),
  2585. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
  2586. "HP bNB13", STAC_HP_BNB13_EQ),
  2587. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
  2588. "HP bNB13", STAC_HP_BNB13_EQ),
  2589. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
  2590. "HP bNB13", STAC_HP_BNB13_EQ),
  2591. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
  2592. "HP bNB13", STAC_HP_BNB13_EQ),
  2593. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
  2594. "HP bNB13", STAC_HP_BNB13_EQ),
  2595. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
  2596. "HP bNB13", STAC_HP_BNB13_EQ),
  2597. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
  2598. "HP bNB13", STAC_HP_BNB13_EQ),
  2599. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
  2600. "HP bNB13", STAC_HP_BNB13_EQ),
  2601. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
  2602. "HP bNB13", STAC_HP_BNB13_EQ),
  2603. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
  2604. "HP bNB13", STAC_HP_BNB13_EQ),
  2605. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
  2606. "HP bNB13", STAC_HP_BNB13_EQ),
  2607. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
  2608. "HP bNB13", STAC_HP_BNB13_EQ),
  2609. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
  2610. "HP bNB13", STAC_HP_BNB13_EQ),
  2611. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
  2612. "HP bNB13", STAC_HP_BNB13_EQ),
  2613. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
  2614. "HP bNB13", STAC_HP_BNB13_EQ),
  2615. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
  2616. "HP bNB13", STAC_HP_BNB13_EQ),
  2617. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
  2618. "HP bNB13", STAC_HP_BNB13_EQ),
  2619. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
  2620. "HP bNB13", STAC_HP_BNB13_EQ),
  2621. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
  2622. "HP bNB13", STAC_HP_BNB13_EQ),
  2623. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
  2624. "HP bNB13", STAC_HP_BNB13_EQ),
  2625. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
  2626. "HP bNB13", STAC_HP_BNB13_EQ),
  2627. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
  2628. "HP bNB13", STAC_HP_BNB13_EQ),
  2629. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
  2630. "HP bNB13", STAC_HP_BNB13_EQ),
  2631. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
  2632. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2633. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
  2634. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2635. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
  2636. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2637. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
  2638. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2639. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
  2640. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2641. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
  2642. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2643. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
  2644. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2645. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
  2646. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2647. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
  2648. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2649. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
  2650. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2651. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
  2652. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2653. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
  2654. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2655. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
  2656. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2657. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
  2658. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2659. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
  2660. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2661. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
  2662. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2663. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
  2664. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2665. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
  2666. "HP", STAC_HP_ZEPHYR),
  2667. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
  2668. "HP Mini", STAC_92HD83XXX_HP_LED),
  2669. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
  2670. "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
  2671. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
  2672. "HP Mini", STAC_92HD83XXX_HP_LED),
  2673. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
  2674. SND_PCI_QUIRK(PCI_VENDOR_ID_TOSHIBA, 0xfa91,
  2675. "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
  2676. {} /* terminator */
  2677. };
  2678. /* HP dv7 bass switch - GPIO5 */
  2679. #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
  2680. static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
  2681. struct snd_ctl_elem_value *ucontrol)
  2682. {
  2683. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2684. struct sigmatel_spec *spec = codec->spec;
  2685. ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
  2686. return 0;
  2687. }
  2688. static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
  2689. struct snd_ctl_elem_value *ucontrol)
  2690. {
  2691. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2692. struct sigmatel_spec *spec = codec->spec;
  2693. unsigned int gpio_data;
  2694. gpio_data = (spec->gpio_data & ~0x20) |
  2695. (ucontrol->value.integer.value[0] ? 0x20 : 0);
  2696. if (gpio_data == spec->gpio_data)
  2697. return 0;
  2698. spec->gpio_data = gpio_data;
  2699. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  2700. return 1;
  2701. }
  2702. static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
  2703. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2704. .info = stac_hp_bass_gpio_info,
  2705. .get = stac_hp_bass_gpio_get,
  2706. .put = stac_hp_bass_gpio_put,
  2707. };
  2708. static int stac_add_hp_bass_switch(struct hda_codec *codec)
  2709. {
  2710. struct sigmatel_spec *spec = codec->spec;
  2711. if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
  2712. &stac_hp_bass_sw_ctrl))
  2713. return -ENOMEM;
  2714. spec->gpio_mask |= 0x20;
  2715. spec->gpio_dir |= 0x20;
  2716. spec->gpio_data |= 0x20;
  2717. return 0;
  2718. }
  2719. static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
  2720. { 0x0a, 0x02214030 },
  2721. { 0x0b, 0x02a19040 },
  2722. { 0x0c, 0x01a19020 },
  2723. { 0x0d, 0x01014010 },
  2724. { 0x0e, 0x0181302e },
  2725. { 0x0f, 0x01014010 },
  2726. { 0x14, 0x01019020 },
  2727. { 0x18, 0x90a000f0 },
  2728. { 0x19, 0x90a000f0 },
  2729. { 0x1e, 0x01452050 },
  2730. { 0x1f, 0x01452050 },
  2731. {}
  2732. };
  2733. static const struct hda_pintbl dell_m4_1_pin_configs[] = {
  2734. { 0x0a, 0x0421101f },
  2735. { 0x0b, 0x04a11221 },
  2736. { 0x0c, 0x40f000f0 },
  2737. { 0x0d, 0x90170110 },
  2738. { 0x0e, 0x23a1902e },
  2739. { 0x0f, 0x23014250 },
  2740. { 0x14, 0x40f000f0 },
  2741. { 0x18, 0x90a000f0 },
  2742. { 0x19, 0x40f000f0 },
  2743. { 0x1e, 0x4f0000f0 },
  2744. { 0x1f, 0x4f0000f0 },
  2745. {}
  2746. };
  2747. static const struct hda_pintbl dell_m4_2_pin_configs[] = {
  2748. { 0x0a, 0x0421101f },
  2749. { 0x0b, 0x04a11221 },
  2750. { 0x0c, 0x90a70330 },
  2751. { 0x0d, 0x90170110 },
  2752. { 0x0e, 0x23a1902e },
  2753. { 0x0f, 0x23014250 },
  2754. { 0x14, 0x40f000f0 },
  2755. { 0x18, 0x40f000f0 },
  2756. { 0x19, 0x40f000f0 },
  2757. { 0x1e, 0x044413b0 },
  2758. { 0x1f, 0x044413b0 },
  2759. {}
  2760. };
  2761. static const struct hda_pintbl dell_m4_3_pin_configs[] = {
  2762. { 0x0a, 0x0421101f },
  2763. { 0x0b, 0x04a11221 },
  2764. { 0x0c, 0x90a70330 },
  2765. { 0x0d, 0x90170110 },
  2766. { 0x0e, 0x40f000f0 },
  2767. { 0x0f, 0x40f000f0 },
  2768. { 0x14, 0x40f000f0 },
  2769. { 0x18, 0x90a000f0 },
  2770. { 0x19, 0x40f000f0 },
  2771. { 0x1e, 0x044413b0 },
  2772. { 0x1f, 0x044413b0 },
  2773. {}
  2774. };
  2775. static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
  2776. const struct hda_fixup *fix, int action)
  2777. {
  2778. struct sigmatel_spec *spec = codec->spec;
  2779. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2780. return;
  2781. snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
  2782. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  2783. }
  2784. static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
  2785. const struct hda_fixup *fix, int action)
  2786. {
  2787. struct sigmatel_spec *spec = codec->spec;
  2788. struct hda_jack_callback *jack;
  2789. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2790. return;
  2791. /* Enable VREF power saving on GPIO1 detect */
  2792. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  2793. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
  2794. jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
  2795. stac_vref_event);
  2796. if (!IS_ERR(jack))
  2797. jack->private_data = 0x02;
  2798. spec->gpio_mask |= 0x02;
  2799. /* enable internal microphone */
  2800. snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
  2801. }
  2802. static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
  2803. const struct hda_fixup *fix, int action)
  2804. {
  2805. struct sigmatel_spec *spec = codec->spec;
  2806. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2807. return;
  2808. spec->gpio_led = 0x01;
  2809. }
  2810. static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
  2811. const struct hda_fixup *fix, int action)
  2812. {
  2813. unsigned int cap;
  2814. switch (action) {
  2815. case HDA_FIXUP_ACT_PRE_PROBE:
  2816. snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
  2817. break;
  2818. case HDA_FIXUP_ACT_PROBE:
  2819. /* enable bass on HP dv7 */
  2820. cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
  2821. cap &= AC_GPIO_IO_COUNT;
  2822. if (cap >= 6)
  2823. stac_add_hp_bass_switch(codec);
  2824. break;
  2825. }
  2826. }
  2827. static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
  2828. const struct hda_fixup *fix, int action)
  2829. {
  2830. struct sigmatel_spec *spec = codec->spec;
  2831. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2832. return;
  2833. spec->gpio_led = 0x08;
  2834. }
  2835. static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
  2836. const struct hda_fixup *fix, int action)
  2837. {
  2838. struct sigmatel_spec *spec = codec->spec;
  2839. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2840. return;
  2841. if (hp_blike_system(codec->core.subsystem_id)) {
  2842. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
  2843. if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
  2844. get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
  2845. get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
  2846. /* It was changed in the BIOS to just satisfy MS DTM.
  2847. * Lets turn it back into slaved HP
  2848. */
  2849. pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
  2850. | (AC_JACK_HP_OUT <<
  2851. AC_DEFCFG_DEVICE_SHIFT);
  2852. pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
  2853. | AC_DEFCFG_SEQUENCE)))
  2854. | 0x1f;
  2855. snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
  2856. }
  2857. }
  2858. if (find_mute_led_cfg(codec, 1))
  2859. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  2860. spec->gpio_led,
  2861. spec->gpio_led_polarity);
  2862. }
  2863. static const struct hda_fixup stac92hd71bxx_fixups[] = {
  2864. [STAC_92HD71BXX_REF] = {
  2865. .type = HDA_FIXUP_FUNC,
  2866. .v.func = stac92hd71bxx_fixup_ref,
  2867. },
  2868. [STAC_DELL_M4_1] = {
  2869. .type = HDA_FIXUP_PINS,
  2870. .v.pins = dell_m4_1_pin_configs,
  2871. },
  2872. [STAC_DELL_M4_2] = {
  2873. .type = HDA_FIXUP_PINS,
  2874. .v.pins = dell_m4_2_pin_configs,
  2875. },
  2876. [STAC_DELL_M4_3] = {
  2877. .type = HDA_FIXUP_PINS,
  2878. .v.pins = dell_m4_3_pin_configs,
  2879. },
  2880. [STAC_HP_M4] = {
  2881. .type = HDA_FIXUP_FUNC,
  2882. .v.func = stac92hd71bxx_fixup_hp_m4,
  2883. .chained = true,
  2884. .chain_id = STAC_92HD71BXX_HP,
  2885. },
  2886. [STAC_HP_DV4] = {
  2887. .type = HDA_FIXUP_FUNC,
  2888. .v.func = stac92hd71bxx_fixup_hp_dv4,
  2889. .chained = true,
  2890. .chain_id = STAC_HP_DV5,
  2891. },
  2892. [STAC_HP_DV5] = {
  2893. .type = HDA_FIXUP_FUNC,
  2894. .v.func = stac92hd71bxx_fixup_hp_dv5,
  2895. .chained = true,
  2896. .chain_id = STAC_92HD71BXX_HP,
  2897. },
  2898. [STAC_HP_HDX] = {
  2899. .type = HDA_FIXUP_FUNC,
  2900. .v.func = stac92hd71bxx_fixup_hp_hdx,
  2901. .chained = true,
  2902. .chain_id = STAC_92HD71BXX_HP,
  2903. },
  2904. [STAC_92HD71BXX_HP] = {
  2905. .type = HDA_FIXUP_FUNC,
  2906. .v.func = stac92hd71bxx_fixup_hp,
  2907. },
  2908. };
  2909. static const struct hda_model_fixup stac92hd71bxx_models[] = {
  2910. { .id = STAC_92HD71BXX_REF, .name = "ref" },
  2911. { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
  2912. { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
  2913. { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
  2914. { .id = STAC_HP_M4, .name = "hp-m4" },
  2915. { .id = STAC_HP_DV4, .name = "hp-dv4" },
  2916. { .id = STAC_HP_DV5, .name = "hp-dv5" },
  2917. { .id = STAC_HP_HDX, .name = "hp-hdx" },
  2918. { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
  2919. {}
  2920. };
  2921. static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
  2922. /* SigmaTel reference board */
  2923. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2924. "DFI LanParty", STAC_92HD71BXX_REF),
  2925. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2926. "DFI LanParty", STAC_92HD71BXX_REF),
  2927. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  2928. "HP", STAC_HP_DV5),
  2929. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  2930. "HP", STAC_HP_DV5),
  2931. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  2932. "HP dv4-7", STAC_HP_DV4),
  2933. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  2934. "HP dv4-7", STAC_HP_DV5),
  2935. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  2936. "HP HDX", STAC_HP_HDX), /* HDX18 */
  2937. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  2938. "HP mini 1000", STAC_HP_M4),
  2939. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  2940. "HP HDX", STAC_HP_HDX), /* HDX16 */
  2941. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  2942. "HP dv6", STAC_HP_DV5),
  2943. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  2944. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  2945. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
  2946. "HP DV6", STAC_HP_DV5),
  2947. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  2948. "HP", STAC_HP_DV5),
  2949. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
  2950. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  2951. "unknown Dell", STAC_DELL_M4_1),
  2952. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  2953. "unknown Dell", STAC_DELL_M4_1),
  2954. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  2955. "unknown Dell", STAC_DELL_M4_1),
  2956. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  2957. "unknown Dell", STAC_DELL_M4_1),
  2958. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  2959. "unknown Dell", STAC_DELL_M4_1),
  2960. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  2961. "unknown Dell", STAC_DELL_M4_1),
  2962. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  2963. "unknown Dell", STAC_DELL_M4_1),
  2964. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  2965. "unknown Dell", STAC_DELL_M4_2),
  2966. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  2967. "unknown Dell", STAC_DELL_M4_2),
  2968. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  2969. "unknown Dell", STAC_DELL_M4_2),
  2970. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  2971. "unknown Dell", STAC_DELL_M4_2),
  2972. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  2973. "unknown Dell", STAC_DELL_M4_3),
  2974. {} /* terminator */
  2975. };
  2976. static const struct hda_pintbl ref922x_pin_configs[] = {
  2977. { 0x0a, 0x01014010 },
  2978. { 0x0b, 0x01016011 },
  2979. { 0x0c, 0x01012012 },
  2980. { 0x0d, 0x0221401f },
  2981. { 0x0e, 0x01813122 },
  2982. { 0x0f, 0x01011014 },
  2983. { 0x10, 0x01441030 },
  2984. { 0x11, 0x01c41030 },
  2985. { 0x15, 0x40000100 },
  2986. { 0x1b, 0x40000100 },
  2987. {}
  2988. };
  2989. /*
  2990. STAC 922X pin configs for
  2991. 102801A7
  2992. 102801AB
  2993. 102801A9
  2994. 102801D1
  2995. 102801D2
  2996. */
  2997. static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
  2998. { 0x0a, 0x02214030 },
  2999. { 0x0b, 0x01a19021 },
  3000. { 0x0c, 0x01111012 },
  3001. { 0x0d, 0x01114010 },
  3002. { 0x0e, 0x02a19020 },
  3003. { 0x0f, 0x01117011 },
  3004. { 0x10, 0x400001f0 },
  3005. { 0x11, 0x400001f1 },
  3006. { 0x15, 0x01813122 },
  3007. { 0x1b, 0x400001f2 },
  3008. {}
  3009. };
  3010. /*
  3011. STAC 922X pin configs for
  3012. 102801AC
  3013. 102801D0
  3014. */
  3015. static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
  3016. { 0x0a, 0x02214030 },
  3017. { 0x0b, 0x01a19021 },
  3018. { 0x0c, 0x01111012 },
  3019. { 0x0d, 0x01114010 },
  3020. { 0x0e, 0x02a19020 },
  3021. { 0x0f, 0x01117011 },
  3022. { 0x10, 0x01451140 },
  3023. { 0x11, 0x400001f0 },
  3024. { 0x15, 0x01813122 },
  3025. { 0x1b, 0x400001f1 },
  3026. {}
  3027. };
  3028. /*
  3029. STAC 922X pin configs for
  3030. 102801BF
  3031. */
  3032. static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
  3033. { 0x0a, 0x0321101f },
  3034. { 0x0b, 0x01112024 },
  3035. { 0x0c, 0x01111222 },
  3036. { 0x0d, 0x91174220 },
  3037. { 0x0e, 0x03a11050 },
  3038. { 0x0f, 0x01116221 },
  3039. { 0x10, 0x90a70330 },
  3040. { 0x11, 0x01452340 },
  3041. { 0x15, 0x40C003f1 },
  3042. { 0x1b, 0x405003f0 },
  3043. {}
  3044. };
  3045. /*
  3046. STAC 9221 A1 pin configs for
  3047. 102801D7 (Dell XPS M1210)
  3048. */
  3049. static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
  3050. { 0x0a, 0x02211211 },
  3051. { 0x0b, 0x408103ff },
  3052. { 0x0c, 0x02a1123e },
  3053. { 0x0d, 0x90100310 },
  3054. { 0x0e, 0x408003f1 },
  3055. { 0x0f, 0x0221121f },
  3056. { 0x10, 0x03451340 },
  3057. { 0x11, 0x40c003f2 },
  3058. { 0x15, 0x508003f3 },
  3059. { 0x1b, 0x405003f4 },
  3060. {}
  3061. };
  3062. static const struct hda_pintbl d945gtp3_pin_configs[] = {
  3063. { 0x0a, 0x0221401f },
  3064. { 0x0b, 0x01a19022 },
  3065. { 0x0c, 0x01813021 },
  3066. { 0x0d, 0x01014010 },
  3067. { 0x0e, 0x40000100 },
  3068. { 0x0f, 0x40000100 },
  3069. { 0x10, 0x40000100 },
  3070. { 0x11, 0x40000100 },
  3071. { 0x15, 0x02a19120 },
  3072. { 0x1b, 0x40000100 },
  3073. {}
  3074. };
  3075. static const struct hda_pintbl d945gtp5_pin_configs[] = {
  3076. { 0x0a, 0x0221401f },
  3077. { 0x0b, 0x01011012 },
  3078. { 0x0c, 0x01813024 },
  3079. { 0x0d, 0x01014010 },
  3080. { 0x0e, 0x01a19021 },
  3081. { 0x0f, 0x01016011 },
  3082. { 0x10, 0x01452130 },
  3083. { 0x11, 0x40000100 },
  3084. { 0x15, 0x02a19320 },
  3085. { 0x1b, 0x40000100 },
  3086. {}
  3087. };
  3088. static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
  3089. { 0x0a, 0x0121e21f },
  3090. { 0x0b, 0x400000ff },
  3091. { 0x0c, 0x9017e110 },
  3092. { 0x0d, 0x400000fd },
  3093. { 0x0e, 0x400000fe },
  3094. { 0x0f, 0x0181e020 },
  3095. { 0x10, 0x1145e030 },
  3096. { 0x11, 0x11c5e240 },
  3097. { 0x15, 0x400000fc },
  3098. { 0x1b, 0x400000fb },
  3099. {}
  3100. };
  3101. static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
  3102. { 0x0a, 0x0121e21f },
  3103. { 0x0b, 0x90a7012e },
  3104. { 0x0c, 0x9017e110 },
  3105. { 0x0d, 0x400000fd },
  3106. { 0x0e, 0x400000fe },
  3107. { 0x0f, 0x0181e020 },
  3108. { 0x10, 0x1145e230 },
  3109. { 0x11, 0x500000fa },
  3110. { 0x15, 0x400000fc },
  3111. { 0x1b, 0x400000fb },
  3112. {}
  3113. };
  3114. static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
  3115. { 0x0a, 0x0121e21f },
  3116. { 0x0b, 0x90a7012e },
  3117. { 0x0c, 0x9017e110 },
  3118. { 0x0d, 0x400000fd },
  3119. { 0x0e, 0x400000fe },
  3120. { 0x0f, 0x0181e020 },
  3121. { 0x10, 0x1145e230 },
  3122. { 0x11, 0x11c5e240 },
  3123. { 0x15, 0x400000fc },
  3124. { 0x1b, 0x400000fb },
  3125. {}
  3126. };
  3127. static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
  3128. { 0x0a, 0x0321e21f },
  3129. { 0x0b, 0x03a1e02e },
  3130. { 0x0c, 0x9017e110 },
  3131. { 0x0d, 0x9017e11f },
  3132. { 0x0e, 0x400000fe },
  3133. { 0x0f, 0x0381e020 },
  3134. { 0x10, 0x1345e230 },
  3135. { 0x11, 0x13c5e240 },
  3136. { 0x15, 0x400000fc },
  3137. { 0x1b, 0x400000fb },
  3138. {}
  3139. };
  3140. static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
  3141. { 0x0a, 0x0321e21f },
  3142. { 0x0b, 0x03a1e02e },
  3143. { 0x0c, 0x9017e110 },
  3144. { 0x0d, 0x9017e11f },
  3145. { 0x0e, 0x400000fe },
  3146. { 0x0f, 0x0381e020 },
  3147. { 0x10, 0x1345e230 },
  3148. { 0x11, 0x13c5e240 },
  3149. { 0x15, 0x400000fc },
  3150. { 0x1b, 0x400000fb },
  3151. {}
  3152. };
  3153. static const struct hda_pintbl ecs202_pin_configs[] = {
  3154. { 0x0a, 0x0221401f },
  3155. { 0x0b, 0x02a19020 },
  3156. { 0x0c, 0x01a19020 },
  3157. { 0x0d, 0x01114010 },
  3158. { 0x0e, 0x408000f0 },
  3159. { 0x0f, 0x01813022 },
  3160. { 0x10, 0x074510a0 },
  3161. { 0x11, 0x40c400f1 },
  3162. { 0x15, 0x9037012e },
  3163. { 0x1b, 0x40e000f2 },
  3164. {}
  3165. };
  3166. /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
  3167. static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
  3168. SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
  3169. SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
  3170. SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
  3171. SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
  3172. SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
  3173. SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
  3174. SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
  3175. SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
  3176. SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
  3177. SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
  3178. SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
  3179. SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
  3180. SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
  3181. {}
  3182. };
  3183. static const struct hda_fixup stac922x_fixups[];
  3184. /* remap the fixup from codec SSID and apply it */
  3185. static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
  3186. const struct hda_fixup *fix,
  3187. int action)
  3188. {
  3189. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3190. return;
  3191. codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
  3192. snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
  3193. stac922x_fixups);
  3194. if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
  3195. snd_hda_apply_fixup(codec, action);
  3196. }
  3197. static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
  3198. const struct hda_fixup *fix,
  3199. int action)
  3200. {
  3201. struct sigmatel_spec *spec = codec->spec;
  3202. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3203. spec->gpio_mask = spec->gpio_dir = 0x03;
  3204. spec->gpio_data = 0x03;
  3205. }
  3206. }
  3207. static const struct hda_fixup stac922x_fixups[] = {
  3208. [STAC_D945_REF] = {
  3209. .type = HDA_FIXUP_PINS,
  3210. .v.pins = ref922x_pin_configs,
  3211. },
  3212. [STAC_D945GTP3] = {
  3213. .type = HDA_FIXUP_PINS,
  3214. .v.pins = d945gtp3_pin_configs,
  3215. },
  3216. [STAC_D945GTP5] = {
  3217. .type = HDA_FIXUP_PINS,
  3218. .v.pins = d945gtp5_pin_configs,
  3219. },
  3220. [STAC_INTEL_MAC_AUTO] = {
  3221. .type = HDA_FIXUP_FUNC,
  3222. .v.func = stac922x_fixup_intel_mac_auto,
  3223. },
  3224. [STAC_INTEL_MAC_V1] = {
  3225. .type = HDA_FIXUP_PINS,
  3226. .v.pins = intel_mac_v1_pin_configs,
  3227. .chained = true,
  3228. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3229. },
  3230. [STAC_INTEL_MAC_V2] = {
  3231. .type = HDA_FIXUP_PINS,
  3232. .v.pins = intel_mac_v2_pin_configs,
  3233. .chained = true,
  3234. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3235. },
  3236. [STAC_INTEL_MAC_V3] = {
  3237. .type = HDA_FIXUP_PINS,
  3238. .v.pins = intel_mac_v3_pin_configs,
  3239. .chained = true,
  3240. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3241. },
  3242. [STAC_INTEL_MAC_V4] = {
  3243. .type = HDA_FIXUP_PINS,
  3244. .v.pins = intel_mac_v4_pin_configs,
  3245. .chained = true,
  3246. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3247. },
  3248. [STAC_INTEL_MAC_V5] = {
  3249. .type = HDA_FIXUP_PINS,
  3250. .v.pins = intel_mac_v5_pin_configs,
  3251. .chained = true,
  3252. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3253. },
  3254. [STAC_922X_INTEL_MAC_GPIO] = {
  3255. .type = HDA_FIXUP_FUNC,
  3256. .v.func = stac922x_fixup_intel_mac_gpio,
  3257. },
  3258. [STAC_ECS_202] = {
  3259. .type = HDA_FIXUP_PINS,
  3260. .v.pins = ecs202_pin_configs,
  3261. },
  3262. [STAC_922X_DELL_D81] = {
  3263. .type = HDA_FIXUP_PINS,
  3264. .v.pins = dell_922x_d81_pin_configs,
  3265. },
  3266. [STAC_922X_DELL_D82] = {
  3267. .type = HDA_FIXUP_PINS,
  3268. .v.pins = dell_922x_d82_pin_configs,
  3269. },
  3270. [STAC_922X_DELL_M81] = {
  3271. .type = HDA_FIXUP_PINS,
  3272. .v.pins = dell_922x_m81_pin_configs,
  3273. },
  3274. [STAC_922X_DELL_M82] = {
  3275. .type = HDA_FIXUP_PINS,
  3276. .v.pins = dell_922x_m82_pin_configs,
  3277. },
  3278. };
  3279. static const struct hda_model_fixup stac922x_models[] = {
  3280. { .id = STAC_D945_REF, .name = "ref" },
  3281. { .id = STAC_D945GTP5, .name = "5stack" },
  3282. { .id = STAC_D945GTP3, .name = "3stack" },
  3283. { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
  3284. { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
  3285. { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
  3286. { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
  3287. { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
  3288. { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
  3289. { .id = STAC_ECS_202, .name = "ecs202" },
  3290. { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
  3291. { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
  3292. { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
  3293. { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
  3294. /* for backward compatibility */
  3295. { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
  3296. { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
  3297. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
  3298. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
  3299. { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
  3300. { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
  3301. {}
  3302. };
  3303. static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
  3304. /* SigmaTel reference board */
  3305. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3306. "DFI LanParty", STAC_D945_REF),
  3307. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3308. "DFI LanParty", STAC_D945_REF),
  3309. /* Intel 945G based systems */
  3310. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  3311. "Intel D945G", STAC_D945GTP3),
  3312. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  3313. "Intel D945G", STAC_D945GTP3),
  3314. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  3315. "Intel D945G", STAC_D945GTP3),
  3316. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  3317. "Intel D945G", STAC_D945GTP3),
  3318. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  3319. "Intel D945G", STAC_D945GTP3),
  3320. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  3321. "Intel D945G", STAC_D945GTP3),
  3322. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  3323. "Intel D945G", STAC_D945GTP3),
  3324. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  3325. "Intel D945G", STAC_D945GTP3),
  3326. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  3327. "Intel D945G", STAC_D945GTP3),
  3328. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  3329. "Intel D945G", STAC_D945GTP3),
  3330. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  3331. "Intel D945G", STAC_D945GTP3),
  3332. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  3333. "Intel D945G", STAC_D945GTP3),
  3334. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  3335. "Intel D945G", STAC_D945GTP3),
  3336. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  3337. "Intel D945G", STAC_D945GTP3),
  3338. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  3339. "Intel D945G", STAC_D945GTP3),
  3340. /* Intel D945G 5-stack systems */
  3341. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  3342. "Intel D945G", STAC_D945GTP5),
  3343. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  3344. "Intel D945G", STAC_D945GTP5),
  3345. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  3346. "Intel D945G", STAC_D945GTP5),
  3347. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  3348. "Intel D945G", STAC_D945GTP5),
  3349. /* Intel 945P based systems */
  3350. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  3351. "Intel D945P", STAC_D945GTP3),
  3352. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  3353. "Intel D945P", STAC_D945GTP3),
  3354. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  3355. "Intel D945P", STAC_D945GTP3),
  3356. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  3357. "Intel D945P", STAC_D945GTP3),
  3358. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  3359. "Intel D945P", STAC_D945GTP3),
  3360. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  3361. "Intel D945P", STAC_D945GTP5),
  3362. /* other intel */
  3363. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
  3364. "Intel D945", STAC_D945_REF),
  3365. /* other systems */
  3366. /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
  3367. SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
  3368. /* Dell systems */
  3369. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  3370. "unknown Dell", STAC_922X_DELL_D81),
  3371. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  3372. "unknown Dell", STAC_922X_DELL_D81),
  3373. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  3374. "unknown Dell", STAC_922X_DELL_D81),
  3375. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  3376. "unknown Dell", STAC_922X_DELL_D82),
  3377. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  3378. "unknown Dell", STAC_922X_DELL_M81),
  3379. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  3380. "unknown Dell", STAC_922X_DELL_D82),
  3381. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  3382. "unknown Dell", STAC_922X_DELL_D81),
  3383. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  3384. "unknown Dell", STAC_922X_DELL_D81),
  3385. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  3386. "Dell XPS M1210", STAC_922X_DELL_M82),
  3387. /* ECS/PC Chips boards */
  3388. SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
  3389. "ECS/PC chips", STAC_ECS_202),
  3390. {} /* terminator */
  3391. };
  3392. static const struct hda_pintbl ref927x_pin_configs[] = {
  3393. { 0x0a, 0x02214020 },
  3394. { 0x0b, 0x02a19080 },
  3395. { 0x0c, 0x0181304e },
  3396. { 0x0d, 0x01014010 },
  3397. { 0x0e, 0x01a19040 },
  3398. { 0x0f, 0x01011012 },
  3399. { 0x10, 0x01016011 },
  3400. { 0x11, 0x0101201f },
  3401. { 0x12, 0x183301f0 },
  3402. { 0x13, 0x18a001f0 },
  3403. { 0x14, 0x18a001f0 },
  3404. { 0x21, 0x01442070 },
  3405. { 0x22, 0x01c42190 },
  3406. { 0x23, 0x40000100 },
  3407. {}
  3408. };
  3409. static const struct hda_pintbl d965_3st_pin_configs[] = {
  3410. { 0x0a, 0x0221401f },
  3411. { 0x0b, 0x02a19120 },
  3412. { 0x0c, 0x40000100 },
  3413. { 0x0d, 0x01014011 },
  3414. { 0x0e, 0x01a19021 },
  3415. { 0x0f, 0x01813024 },
  3416. { 0x10, 0x40000100 },
  3417. { 0x11, 0x40000100 },
  3418. { 0x12, 0x40000100 },
  3419. { 0x13, 0x40000100 },
  3420. { 0x14, 0x40000100 },
  3421. { 0x21, 0x40000100 },
  3422. { 0x22, 0x40000100 },
  3423. { 0x23, 0x40000100 },
  3424. {}
  3425. };
  3426. static const struct hda_pintbl d965_5st_pin_configs[] = {
  3427. { 0x0a, 0x02214020 },
  3428. { 0x0b, 0x02a19080 },
  3429. { 0x0c, 0x0181304e },
  3430. { 0x0d, 0x01014010 },
  3431. { 0x0e, 0x01a19040 },
  3432. { 0x0f, 0x01011012 },
  3433. { 0x10, 0x01016011 },
  3434. { 0x11, 0x40000100 },
  3435. { 0x12, 0x40000100 },
  3436. { 0x13, 0x40000100 },
  3437. { 0x14, 0x40000100 },
  3438. { 0x21, 0x01442070 },
  3439. { 0x22, 0x40000100 },
  3440. { 0x23, 0x40000100 },
  3441. {}
  3442. };
  3443. static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
  3444. { 0x0a, 0x40000100 },
  3445. { 0x0b, 0x40000100 },
  3446. { 0x0c, 0x0181304e },
  3447. { 0x0d, 0x01014010 },
  3448. { 0x0e, 0x01a19040 },
  3449. { 0x0f, 0x01011012 },
  3450. { 0x10, 0x01016011 },
  3451. { 0x11, 0x40000100 },
  3452. { 0x12, 0x40000100 },
  3453. { 0x13, 0x40000100 },
  3454. { 0x14, 0x40000100 },
  3455. { 0x21, 0x01442070 },
  3456. { 0x22, 0x40000100 },
  3457. { 0x23, 0x40000100 },
  3458. {}
  3459. };
  3460. static const struct hda_pintbl dell_3st_pin_configs[] = {
  3461. { 0x0a, 0x02211230 },
  3462. { 0x0b, 0x02a11220 },
  3463. { 0x0c, 0x01a19040 },
  3464. { 0x0d, 0x01114210 },
  3465. { 0x0e, 0x01111212 },
  3466. { 0x0f, 0x01116211 },
  3467. { 0x10, 0x01813050 },
  3468. { 0x11, 0x01112214 },
  3469. { 0x12, 0x403003fa },
  3470. { 0x13, 0x90a60040 },
  3471. { 0x14, 0x90a60040 },
  3472. { 0x21, 0x404003fb },
  3473. { 0x22, 0x40c003fc },
  3474. { 0x23, 0x40000100 },
  3475. {}
  3476. };
  3477. static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
  3478. const struct hda_fixup *fix, int action)
  3479. {
  3480. /* no jack detecion for ref-no-jd model */
  3481. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3482. codec->no_jack_detect = 1;
  3483. }
  3484. static void stac927x_fixup_ref(struct hda_codec *codec,
  3485. const struct hda_fixup *fix, int action)
  3486. {
  3487. struct sigmatel_spec *spec = codec->spec;
  3488. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3489. snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
  3490. spec->eapd_mask = spec->gpio_mask = 0;
  3491. spec->gpio_dir = spec->gpio_data = 0;
  3492. }
  3493. }
  3494. static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
  3495. const struct hda_fixup *fix, int action)
  3496. {
  3497. struct sigmatel_spec *spec = codec->spec;
  3498. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3499. return;
  3500. if (codec->core.subsystem_id != 0x1028022f) {
  3501. /* GPIO2 High = Enable EAPD */
  3502. spec->eapd_mask = spec->gpio_mask = 0x04;
  3503. spec->gpio_dir = spec->gpio_data = 0x04;
  3504. }
  3505. snd_hda_add_verbs(codec, dell_3st_core_init);
  3506. spec->volknob_init = 1;
  3507. }
  3508. static void stac927x_fixup_volknob(struct hda_codec *codec,
  3509. const struct hda_fixup *fix, int action)
  3510. {
  3511. struct sigmatel_spec *spec = codec->spec;
  3512. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3513. snd_hda_add_verbs(codec, stac927x_volknob_core_init);
  3514. spec->volknob_init = 1;
  3515. }
  3516. }
  3517. static const struct hda_fixup stac927x_fixups[] = {
  3518. [STAC_D965_REF_NO_JD] = {
  3519. .type = HDA_FIXUP_FUNC,
  3520. .v.func = stac927x_fixup_ref_no_jd,
  3521. .chained = true,
  3522. .chain_id = STAC_D965_REF,
  3523. },
  3524. [STAC_D965_REF] = {
  3525. .type = HDA_FIXUP_FUNC,
  3526. .v.func = stac927x_fixup_ref,
  3527. },
  3528. [STAC_D965_3ST] = {
  3529. .type = HDA_FIXUP_PINS,
  3530. .v.pins = d965_3st_pin_configs,
  3531. .chained = true,
  3532. .chain_id = STAC_D965_VERBS,
  3533. },
  3534. [STAC_D965_5ST] = {
  3535. .type = HDA_FIXUP_PINS,
  3536. .v.pins = d965_5st_pin_configs,
  3537. .chained = true,
  3538. .chain_id = STAC_D965_VERBS,
  3539. },
  3540. [STAC_D965_VERBS] = {
  3541. .type = HDA_FIXUP_VERBS,
  3542. .v.verbs = d965_core_init,
  3543. },
  3544. [STAC_D965_5ST_NO_FP] = {
  3545. .type = HDA_FIXUP_PINS,
  3546. .v.pins = d965_5st_no_fp_pin_configs,
  3547. },
  3548. [STAC_DELL_3ST] = {
  3549. .type = HDA_FIXUP_PINS,
  3550. .v.pins = dell_3st_pin_configs,
  3551. .chained = true,
  3552. .chain_id = STAC_927X_DELL_DMIC,
  3553. },
  3554. [STAC_DELL_BIOS] = {
  3555. .type = HDA_FIXUP_PINS,
  3556. .v.pins = (const struct hda_pintbl[]) {
  3557. /* correct the front output jack as a hp out */
  3558. { 0x0f, 0x0221101f },
  3559. /* correct the front input jack as a mic */
  3560. { 0x0e, 0x02a79130 },
  3561. {}
  3562. },
  3563. .chained = true,
  3564. .chain_id = STAC_927X_DELL_DMIC,
  3565. },
  3566. [STAC_DELL_BIOS_AMIC] = {
  3567. .type = HDA_FIXUP_PINS,
  3568. .v.pins = (const struct hda_pintbl[]) {
  3569. /* configure the analog microphone on some laptops */
  3570. { 0x0c, 0x90a79130 },
  3571. {}
  3572. },
  3573. .chained = true,
  3574. .chain_id = STAC_DELL_BIOS,
  3575. },
  3576. [STAC_DELL_BIOS_SPDIF] = {
  3577. .type = HDA_FIXUP_PINS,
  3578. .v.pins = (const struct hda_pintbl[]) {
  3579. /* correct the device field to SPDIF out */
  3580. { 0x21, 0x01442070 },
  3581. {}
  3582. },
  3583. .chained = true,
  3584. .chain_id = STAC_DELL_BIOS,
  3585. },
  3586. [STAC_927X_DELL_DMIC] = {
  3587. .type = HDA_FIXUP_FUNC,
  3588. .v.func = stac927x_fixup_dell_dmic,
  3589. },
  3590. [STAC_927X_VOLKNOB] = {
  3591. .type = HDA_FIXUP_FUNC,
  3592. .v.func = stac927x_fixup_volknob,
  3593. },
  3594. };
  3595. static const struct hda_model_fixup stac927x_models[] = {
  3596. { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
  3597. { .id = STAC_D965_REF, .name = "ref" },
  3598. { .id = STAC_D965_3ST, .name = "3stack" },
  3599. { .id = STAC_D965_5ST, .name = "5stack" },
  3600. { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
  3601. { .id = STAC_DELL_3ST, .name = "dell-3stack" },
  3602. { .id = STAC_DELL_BIOS, .name = "dell-bios" },
  3603. { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
  3604. { .id = STAC_927X_VOLKNOB, .name = "volknob" },
  3605. {}
  3606. };
  3607. static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
  3608. /* SigmaTel reference board */
  3609. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3610. "DFI LanParty", STAC_D965_REF),
  3611. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3612. "DFI LanParty", STAC_D965_REF),
  3613. /* Intel 946 based systems */
  3614. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  3615. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  3616. /* 965 based 3 stack systems */
  3617. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
  3618. "Intel D965", STAC_D965_3ST),
  3619. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
  3620. "Intel D965", STAC_D965_3ST),
  3621. /* Dell 3 stack systems */
  3622. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  3623. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  3624. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  3625. /* Dell 3 stack systems with verb table in BIOS */
  3626. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
  3627. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
  3628. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
  3629. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
  3630. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
  3631. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  3632. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  3633. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  3634. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
  3635. /* 965 based 5 stack systems */
  3636. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
  3637. "Intel D965", STAC_D965_5ST),
  3638. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
  3639. "Intel D965", STAC_D965_5ST),
  3640. /* volume-knob fixes */
  3641. SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
  3642. {} /* terminator */
  3643. };
  3644. static const struct hda_pintbl ref9205_pin_configs[] = {
  3645. { 0x0a, 0x40000100 },
  3646. { 0x0b, 0x40000100 },
  3647. { 0x0c, 0x01016011 },
  3648. { 0x0d, 0x01014010 },
  3649. { 0x0e, 0x01813122 },
  3650. { 0x0f, 0x01a19021 },
  3651. { 0x14, 0x01019020 },
  3652. { 0x16, 0x40000100 },
  3653. { 0x17, 0x90a000f0 },
  3654. { 0x18, 0x90a000f0 },
  3655. { 0x21, 0x01441030 },
  3656. { 0x22, 0x01c41030 },
  3657. {}
  3658. };
  3659. /*
  3660. STAC 9205 pin configs for
  3661. 102801F1
  3662. 102801F2
  3663. 102801FC
  3664. 102801FD
  3665. 10280204
  3666. 1028021F
  3667. 10280228 (Dell Vostro 1500)
  3668. 10280229 (Dell Vostro 1700)
  3669. */
  3670. static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
  3671. { 0x0a, 0x0321101F },
  3672. { 0x0b, 0x03A11020 },
  3673. { 0x0c, 0x400003FA },
  3674. { 0x0d, 0x90170310 },
  3675. { 0x0e, 0x400003FB },
  3676. { 0x0f, 0x400003FC },
  3677. { 0x14, 0x400003FD },
  3678. { 0x16, 0x40F000F9 },
  3679. { 0x17, 0x90A60330 },
  3680. { 0x18, 0x400003FF },
  3681. { 0x21, 0x0144131F },
  3682. { 0x22, 0x40C003FE },
  3683. {}
  3684. };
  3685. /*
  3686. STAC 9205 pin configs for
  3687. 102801F9
  3688. 102801FA
  3689. 102801FE
  3690. 102801FF (Dell Precision M4300)
  3691. 10280206
  3692. 10280200
  3693. 10280201
  3694. */
  3695. static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
  3696. { 0x0a, 0x0321101f },
  3697. { 0x0b, 0x03a11020 },
  3698. { 0x0c, 0x90a70330 },
  3699. { 0x0d, 0x90170310 },
  3700. { 0x0e, 0x400000fe },
  3701. { 0x0f, 0x400000ff },
  3702. { 0x14, 0x400000fd },
  3703. { 0x16, 0x40f000f9 },
  3704. { 0x17, 0x400000fa },
  3705. { 0x18, 0x400000fc },
  3706. { 0x21, 0x0144131f },
  3707. { 0x22, 0x40c003f8 },
  3708. /* Enable SPDIF in/out */
  3709. { 0x1f, 0x01441030 },
  3710. { 0x20, 0x1c410030 },
  3711. {}
  3712. };
  3713. static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
  3714. { 0x0a, 0x0421101f },
  3715. { 0x0b, 0x04a11020 },
  3716. { 0x0c, 0x400003fa },
  3717. { 0x0d, 0x90170310 },
  3718. { 0x0e, 0x400003fb },
  3719. { 0x0f, 0x400003fc },
  3720. { 0x14, 0x400003fd },
  3721. { 0x16, 0x400003f9 },
  3722. { 0x17, 0x90a60330 },
  3723. { 0x18, 0x400003ff },
  3724. { 0x21, 0x01441340 },
  3725. { 0x22, 0x40c003fe },
  3726. {}
  3727. };
  3728. static void stac9205_fixup_ref(struct hda_codec *codec,
  3729. const struct hda_fixup *fix, int action)
  3730. {
  3731. struct sigmatel_spec *spec = codec->spec;
  3732. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3733. snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
  3734. /* SPDIF-In enabled */
  3735. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
  3736. }
  3737. }
  3738. static void stac9205_fixup_dell_m43(struct hda_codec *codec,
  3739. const struct hda_fixup *fix, int action)
  3740. {
  3741. struct sigmatel_spec *spec = codec->spec;
  3742. struct hda_jack_callback *jack;
  3743. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3744. snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
  3745. /* Enable unsol response for GPIO4/Dock HP connection */
  3746. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  3747. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
  3748. jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
  3749. stac_vref_event);
  3750. if (!IS_ERR(jack))
  3751. jack->private_data = 0x01;
  3752. spec->gpio_dir = 0x0b;
  3753. spec->eapd_mask = 0x01;
  3754. spec->gpio_mask = 0x1b;
  3755. spec->gpio_mute = 0x10;
  3756. /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
  3757. * GPIO3 Low = DRM
  3758. */
  3759. spec->gpio_data = 0x01;
  3760. }
  3761. }
  3762. static void stac9205_fixup_eapd(struct hda_codec *codec,
  3763. const struct hda_fixup *fix, int action)
  3764. {
  3765. struct sigmatel_spec *spec = codec->spec;
  3766. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3767. spec->eapd_switch = 0;
  3768. }
  3769. static const struct hda_fixup stac9205_fixups[] = {
  3770. [STAC_9205_REF] = {
  3771. .type = HDA_FIXUP_FUNC,
  3772. .v.func = stac9205_fixup_ref,
  3773. },
  3774. [STAC_9205_DELL_M42] = {
  3775. .type = HDA_FIXUP_PINS,
  3776. .v.pins = dell_9205_m42_pin_configs,
  3777. },
  3778. [STAC_9205_DELL_M43] = {
  3779. .type = HDA_FIXUP_FUNC,
  3780. .v.func = stac9205_fixup_dell_m43,
  3781. },
  3782. [STAC_9205_DELL_M44] = {
  3783. .type = HDA_FIXUP_PINS,
  3784. .v.pins = dell_9205_m44_pin_configs,
  3785. },
  3786. [STAC_9205_EAPD] = {
  3787. .type = HDA_FIXUP_FUNC,
  3788. .v.func = stac9205_fixup_eapd,
  3789. },
  3790. {}
  3791. };
  3792. static const struct hda_model_fixup stac9205_models[] = {
  3793. { .id = STAC_9205_REF, .name = "ref" },
  3794. { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
  3795. { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
  3796. { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
  3797. { .id = STAC_9205_EAPD, .name = "eapd" },
  3798. {}
  3799. };
  3800. static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
  3801. /* SigmaTel reference board */
  3802. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3803. "DFI LanParty", STAC_9205_REF),
  3804. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
  3805. "SigmaTel", STAC_9205_REF),
  3806. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3807. "DFI LanParty", STAC_9205_REF),
  3808. /* Dell */
  3809. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  3810. "unknown Dell", STAC_9205_DELL_M42),
  3811. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  3812. "unknown Dell", STAC_9205_DELL_M42),
  3813. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  3814. "Dell Precision", STAC_9205_DELL_M43),
  3815. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  3816. "Dell Precision", STAC_9205_DELL_M43),
  3817. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  3818. "Dell Precision", STAC_9205_DELL_M43),
  3819. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  3820. "unknown Dell", STAC_9205_DELL_M42),
  3821. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  3822. "unknown Dell", STAC_9205_DELL_M42),
  3823. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  3824. "Dell Precision", STAC_9205_DELL_M43),
  3825. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  3826. "Dell Precision M4300", STAC_9205_DELL_M43),
  3827. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  3828. "unknown Dell", STAC_9205_DELL_M42),
  3829. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  3830. "Dell Precision", STAC_9205_DELL_M43),
  3831. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  3832. "Dell Precision", STAC_9205_DELL_M43),
  3833. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  3834. "Dell Precision", STAC_9205_DELL_M43),
  3835. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  3836. "Dell Inspiron", STAC_9205_DELL_M44),
  3837. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
  3838. "Dell Vostro 1500", STAC_9205_DELL_M42),
  3839. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
  3840. "Dell Vostro 1700", STAC_9205_DELL_M42),
  3841. /* Gateway */
  3842. SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
  3843. SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
  3844. {} /* terminator */
  3845. };
  3846. static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
  3847. const struct hda_fixup *fix, int action)
  3848. {
  3849. struct sigmatel_spec *spec = codec->spec;
  3850. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3851. return;
  3852. if (find_mute_led_cfg(codec, spec->default_polarity))
  3853. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  3854. spec->gpio_led,
  3855. spec->gpio_led_polarity);
  3856. }
  3857. static const struct hda_fixup stac92hd95_fixups[] = {
  3858. [STAC_92HD95_HP_LED] = {
  3859. .type = HDA_FIXUP_FUNC,
  3860. .v.func = stac92hd95_fixup_hp_led,
  3861. },
  3862. [STAC_92HD95_HP_BASS] = {
  3863. .type = HDA_FIXUP_VERBS,
  3864. .v.verbs = (const struct hda_verb[]) {
  3865. {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
  3866. {}
  3867. },
  3868. .chained = true,
  3869. .chain_id = STAC_92HD95_HP_LED,
  3870. },
  3871. };
  3872. static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
  3873. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
  3874. {} /* terminator */
  3875. };
  3876. static const struct hda_model_fixup stac92hd95_models[] = {
  3877. { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
  3878. { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
  3879. {}
  3880. };
  3881. static int stac_parse_auto_config(struct hda_codec *codec)
  3882. {
  3883. struct sigmatel_spec *spec = codec->spec;
  3884. int err;
  3885. int flags = 0;
  3886. if (spec->headset_jack)
  3887. flags |= HDA_PINCFG_HEADSET_MIC;
  3888. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
  3889. if (err < 0)
  3890. return err;
  3891. /* add hooks */
  3892. spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
  3893. spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
  3894. spec->gen.automute_hook = stac_update_outputs;
  3895. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  3896. if (err < 0)
  3897. return err;
  3898. if (spec->vref_mute_led_nid) {
  3899. err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
  3900. if (err < 0)
  3901. return err;
  3902. }
  3903. /* setup analog beep controls */
  3904. if (spec->anabeep_nid > 0) {
  3905. err = stac_auto_create_beep_ctls(codec,
  3906. spec->anabeep_nid);
  3907. if (err < 0)
  3908. return err;
  3909. }
  3910. /* setup digital beep controls and input device */
  3911. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  3912. if (spec->gen.beep_nid) {
  3913. hda_nid_t nid = spec->gen.beep_nid;
  3914. unsigned int caps;
  3915. err = stac_auto_create_beep_ctls(codec, nid);
  3916. if (err < 0)
  3917. return err;
  3918. if (codec->beep) {
  3919. /* IDT/STAC codecs have linear beep tone parameter */
  3920. codec->beep->linear_tone = spec->linear_tone_beep;
  3921. /* if no beep switch is available, make its own one */
  3922. caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  3923. if (!(caps & AC_AMPCAP_MUTE)) {
  3924. err = stac_beep_switch_ctl(codec);
  3925. if (err < 0)
  3926. return err;
  3927. }
  3928. }
  3929. }
  3930. #endif
  3931. if (spec->gpio_led)
  3932. spec->gen.vmaster_mute.hook = stac_vmaster_hook;
  3933. if (spec->aloopback_ctl &&
  3934. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  3935. unsigned int wr_verb =
  3936. spec->aloopback_ctl->private_value >> 16;
  3937. if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
  3938. return -ENOMEM;
  3939. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
  3940. return -ENOMEM;
  3941. }
  3942. if (spec->have_spdif_mux) {
  3943. err = stac_create_spdif_mux_ctls(codec);
  3944. if (err < 0)
  3945. return err;
  3946. }
  3947. stac_init_power_map(codec);
  3948. return 0;
  3949. }
  3950. static int stac_init(struct hda_codec *codec)
  3951. {
  3952. struct sigmatel_spec *spec = codec->spec;
  3953. int i;
  3954. /* override some hints */
  3955. stac_store_hints(codec);
  3956. /* set up GPIO */
  3957. /* turn on EAPD statically when spec->eapd_switch isn't set.
  3958. * otherwise, unsol event will turn it on/off dynamically
  3959. */
  3960. if (!spec->eapd_switch)
  3961. spec->gpio_data |= spec->eapd_mask;
  3962. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  3963. snd_hda_gen_init(codec);
  3964. /* sync the power-map */
  3965. if (spec->num_pwrs)
  3966. snd_hda_codec_write(codec, codec->core.afg, 0,
  3967. AC_VERB_IDT_SET_POWER_MAP,
  3968. spec->power_map_bits);
  3969. /* power down inactive ADCs */
  3970. if (spec->powerdown_adcs) {
  3971. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  3972. if (spec->active_adcs & (1 << i))
  3973. continue;
  3974. snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
  3975. AC_VERB_SET_POWER_STATE,
  3976. AC_PWRST_D3);
  3977. }
  3978. }
  3979. return 0;
  3980. }
  3981. static void stac_shutup(struct hda_codec *codec)
  3982. {
  3983. struct sigmatel_spec *spec = codec->spec;
  3984. snd_hda_shutup_pins(codec);
  3985. if (spec->eapd_mask)
  3986. stac_gpio_set(codec, spec->gpio_mask,
  3987. spec->gpio_dir, spec->gpio_data &
  3988. ~spec->eapd_mask);
  3989. }
  3990. #define stac_free snd_hda_gen_free
  3991. #ifdef CONFIG_SND_PROC_FS
  3992. static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
  3993. struct hda_codec *codec, hda_nid_t nid)
  3994. {
  3995. if (nid == codec->core.afg)
  3996. snd_iprintf(buffer, "Power-Map: 0x%02x\n",
  3997. snd_hda_codec_read(codec, nid, 0,
  3998. AC_VERB_IDT_GET_POWER_MAP, 0));
  3999. }
  4000. static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
  4001. struct hda_codec *codec,
  4002. unsigned int verb)
  4003. {
  4004. snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
  4005. snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
  4006. }
  4007. /* stac92hd71bxx, stac92hd73xx */
  4008. static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
  4009. struct hda_codec *codec, hda_nid_t nid)
  4010. {
  4011. stac92hd_proc_hook(buffer, codec, nid);
  4012. if (nid == codec->core.afg)
  4013. analog_loop_proc_hook(buffer, codec, 0xfa0);
  4014. }
  4015. static void stac9205_proc_hook(struct snd_info_buffer *buffer,
  4016. struct hda_codec *codec, hda_nid_t nid)
  4017. {
  4018. if (nid == codec->core.afg)
  4019. analog_loop_proc_hook(buffer, codec, 0xfe0);
  4020. }
  4021. static void stac927x_proc_hook(struct snd_info_buffer *buffer,
  4022. struct hda_codec *codec, hda_nid_t nid)
  4023. {
  4024. if (nid == codec->core.afg)
  4025. analog_loop_proc_hook(buffer, codec, 0xfeb);
  4026. }
  4027. #else
  4028. #define stac92hd_proc_hook NULL
  4029. #define stac92hd7x_proc_hook NULL
  4030. #define stac9205_proc_hook NULL
  4031. #define stac927x_proc_hook NULL
  4032. #endif
  4033. #ifdef CONFIG_PM
  4034. static int stac_suspend(struct hda_codec *codec)
  4035. {
  4036. stac_shutup(codec);
  4037. return 0;
  4038. }
  4039. #else
  4040. #define stac_suspend NULL
  4041. #endif /* CONFIG_PM */
  4042. static const struct hda_codec_ops stac_patch_ops = {
  4043. .build_controls = snd_hda_gen_build_controls,
  4044. .build_pcms = snd_hda_gen_build_pcms,
  4045. .init = stac_init,
  4046. .free = stac_free,
  4047. .unsol_event = snd_hda_jack_unsol_event,
  4048. #ifdef CONFIG_PM
  4049. .suspend = stac_suspend,
  4050. #endif
  4051. .reboot_notify = stac_shutup,
  4052. };
  4053. static int alloc_stac_spec(struct hda_codec *codec)
  4054. {
  4055. struct sigmatel_spec *spec;
  4056. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  4057. if (!spec)
  4058. return -ENOMEM;
  4059. snd_hda_gen_spec_init(&spec->gen);
  4060. codec->spec = spec;
  4061. codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
  4062. spec->gen.dac_min_mute = true;
  4063. codec->patch_ops = stac_patch_ops;
  4064. return 0;
  4065. }
  4066. static int patch_stac9200(struct hda_codec *codec)
  4067. {
  4068. struct sigmatel_spec *spec;
  4069. int err;
  4070. err = alloc_stac_spec(codec);
  4071. if (err < 0)
  4072. return err;
  4073. spec = codec->spec;
  4074. spec->linear_tone_beep = 1;
  4075. spec->gen.own_eapd_ctl = 1;
  4076. codec->power_filter = snd_hda_codec_eapd_power_filter;
  4077. snd_hda_add_verbs(codec, stac9200_eapd_init);
  4078. snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
  4079. stac9200_fixups);
  4080. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4081. err = stac_parse_auto_config(codec);
  4082. if (err < 0) {
  4083. stac_free(codec);
  4084. return err;
  4085. }
  4086. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4087. return 0;
  4088. }
  4089. static int patch_stac925x(struct hda_codec *codec)
  4090. {
  4091. struct sigmatel_spec *spec;
  4092. int err;
  4093. err = alloc_stac_spec(codec);
  4094. if (err < 0)
  4095. return err;
  4096. spec = codec->spec;
  4097. spec->linear_tone_beep = 1;
  4098. spec->gen.own_eapd_ctl = 1;
  4099. snd_hda_add_verbs(codec, stac925x_core_init);
  4100. snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
  4101. stac925x_fixups);
  4102. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4103. err = stac_parse_auto_config(codec);
  4104. if (err < 0) {
  4105. stac_free(codec);
  4106. return err;
  4107. }
  4108. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4109. return 0;
  4110. }
  4111. static int patch_stac92hd73xx(struct hda_codec *codec)
  4112. {
  4113. struct sigmatel_spec *spec;
  4114. int err;
  4115. int num_dacs;
  4116. err = alloc_stac_spec(codec);
  4117. if (err < 0)
  4118. return err;
  4119. spec = codec->spec;
  4120. codec->power_save_node = 1;
  4121. spec->linear_tone_beep = 0;
  4122. spec->gen.mixer_nid = 0x1d;
  4123. spec->have_spdif_mux = 1;
  4124. num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
  4125. if (num_dacs < 3 || num_dacs > 5) {
  4126. codec_warn(codec,
  4127. "Could not determine number of channels defaulting to DAC count\n");
  4128. num_dacs = 5;
  4129. }
  4130. switch (num_dacs) {
  4131. case 0x3: /* 6 Channel */
  4132. spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
  4133. break;
  4134. case 0x4: /* 8 Channel */
  4135. spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
  4136. break;
  4137. case 0x5: /* 10 Channel */
  4138. spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
  4139. break;
  4140. }
  4141. spec->aloopback_mask = 0x01;
  4142. spec->aloopback_shift = 8;
  4143. spec->gen.beep_nid = 0x1c; /* digital beep */
  4144. /* GPIO0 High = Enable EAPD */
  4145. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4146. spec->gpio_data = 0x01;
  4147. spec->eapd_switch = 1;
  4148. spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
  4149. spec->pwr_nids = stac92hd73xx_pwr_nids;
  4150. spec->gen.own_eapd_ctl = 1;
  4151. spec->gen.power_down_unused = 1;
  4152. snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
  4153. stac92hd73xx_fixups);
  4154. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4155. if (!spec->volknob_init)
  4156. snd_hda_add_verbs(codec, stac92hd73xx_core_init);
  4157. err = stac_parse_auto_config(codec);
  4158. if (err < 0) {
  4159. stac_free(codec);
  4160. return err;
  4161. }
  4162. /* Don't GPIO-mute speakers if there are no internal speakers, because
  4163. * the GPIO might be necessary for Headphone
  4164. */
  4165. if (spec->eapd_switch && !has_builtin_speaker(codec))
  4166. spec->eapd_switch = 0;
  4167. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4168. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4169. return 0;
  4170. }
  4171. static void stac_setup_gpio(struct hda_codec *codec)
  4172. {
  4173. struct sigmatel_spec *spec = codec->spec;
  4174. spec->gpio_mask |= spec->eapd_mask;
  4175. if (spec->gpio_led) {
  4176. if (!spec->vref_mute_led_nid) {
  4177. spec->gpio_mask |= spec->gpio_led;
  4178. spec->gpio_dir |= spec->gpio_led;
  4179. spec->gpio_data |= spec->gpio_led;
  4180. } else {
  4181. codec->power_filter = stac_vref_led_power_filter;
  4182. }
  4183. }
  4184. if (spec->mic_mute_led_gpio) {
  4185. spec->gpio_mask |= spec->mic_mute_led_gpio;
  4186. spec->gpio_dir |= spec->mic_mute_led_gpio;
  4187. spec->mic_enabled = 0;
  4188. spec->gpio_data |= spec->mic_mute_led_gpio;
  4189. spec->gen.cap_sync_hook = stac_capture_led_hook;
  4190. }
  4191. }
  4192. static int patch_stac92hd83xxx(struct hda_codec *codec)
  4193. {
  4194. struct sigmatel_spec *spec;
  4195. int err;
  4196. err = alloc_stac_spec(codec);
  4197. if (err < 0)
  4198. return err;
  4199. /* longer delay needed for D3 */
  4200. codec->core.power_caps &= ~AC_PWRST_EPSS;
  4201. spec = codec->spec;
  4202. codec->power_save_node = 1;
  4203. spec->linear_tone_beep = 0;
  4204. spec->gen.own_eapd_ctl = 1;
  4205. spec->gen.power_down_unused = 1;
  4206. spec->gen.mixer_nid = 0x1b;
  4207. spec->gen.beep_nid = 0x21; /* digital beep */
  4208. spec->pwr_nids = stac92hd83xxx_pwr_nids;
  4209. spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
  4210. spec->default_polarity = -1; /* no default cfg */
  4211. snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
  4212. snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
  4213. stac92hd83xxx_fixups);
  4214. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4215. stac_setup_gpio(codec);
  4216. err = stac_parse_auto_config(codec);
  4217. if (err < 0) {
  4218. stac_free(codec);
  4219. return err;
  4220. }
  4221. codec->proc_widget_hook = stac92hd_proc_hook;
  4222. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4223. return 0;
  4224. }
  4225. static const hda_nid_t stac92hd95_pwr_nids[] = {
  4226. 0x0a, 0x0b, 0x0c, 0x0d
  4227. };
  4228. static int patch_stac92hd95(struct hda_codec *codec)
  4229. {
  4230. struct sigmatel_spec *spec;
  4231. int err;
  4232. err = alloc_stac_spec(codec);
  4233. if (err < 0)
  4234. return err;
  4235. /* longer delay needed for D3 */
  4236. codec->core.power_caps &= ~AC_PWRST_EPSS;
  4237. spec = codec->spec;
  4238. codec->power_save_node = 1;
  4239. spec->linear_tone_beep = 0;
  4240. spec->gen.own_eapd_ctl = 1;
  4241. spec->gen.power_down_unused = 1;
  4242. spec->gen.beep_nid = 0x19; /* digital beep */
  4243. spec->pwr_nids = stac92hd95_pwr_nids;
  4244. spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
  4245. spec->default_polarity = 0;
  4246. snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
  4247. stac92hd95_fixups);
  4248. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4249. stac_setup_gpio(codec);
  4250. err = stac_parse_auto_config(codec);
  4251. if (err < 0) {
  4252. stac_free(codec);
  4253. return err;
  4254. }
  4255. codec->proc_widget_hook = stac92hd_proc_hook;
  4256. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4257. return 0;
  4258. }
  4259. static int patch_stac92hd71bxx(struct hda_codec *codec)
  4260. {
  4261. struct sigmatel_spec *spec;
  4262. const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
  4263. int err;
  4264. err = alloc_stac_spec(codec);
  4265. if (err < 0)
  4266. return err;
  4267. spec = codec->spec;
  4268. /* disabled power_save_node since it causes noises on a Dell machine */
  4269. /* codec->power_save_node = 1; */
  4270. spec->linear_tone_beep = 0;
  4271. spec->gen.own_eapd_ctl = 1;
  4272. spec->gen.power_down_unused = 1;
  4273. spec->gen.mixer_nid = 0x17;
  4274. spec->have_spdif_mux = 1;
  4275. /* GPIO0 = EAPD */
  4276. spec->gpio_mask = 0x01;
  4277. spec->gpio_dir = 0x01;
  4278. spec->gpio_data = 0x01;
  4279. switch (codec->core.vendor_id) {
  4280. case 0x111d76b6: /* 4 Port without Analog Mixer */
  4281. case 0x111d76b7:
  4282. unmute_nids++;
  4283. break;
  4284. case 0x111d7608: /* 5 Port with Analog Mixer */
  4285. if ((codec->core.revision_id & 0xf) == 0 ||
  4286. (codec->core.revision_id & 0xf) == 1)
  4287. spec->stream_delay = 40; /* 40 milliseconds */
  4288. /* disable VSW */
  4289. unmute_nids++;
  4290. snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
  4291. snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
  4292. break;
  4293. case 0x111d7603: /* 6 Port with Analog Mixer */
  4294. if ((codec->core.revision_id & 0xf) == 1)
  4295. spec->stream_delay = 40; /* 40 milliseconds */
  4296. break;
  4297. }
  4298. if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
  4299. snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
  4300. if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
  4301. const hda_nid_t *p;
  4302. for (p = unmute_nids; *p; p++)
  4303. snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
  4304. 0xff, 0x00);
  4305. }
  4306. spec->aloopback_ctl = &stac92hd71bxx_loopback;
  4307. spec->aloopback_mask = 0x50;
  4308. spec->aloopback_shift = 0;
  4309. spec->powerdown_adcs = 1;
  4310. spec->gen.beep_nid = 0x26; /* digital beep */
  4311. spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
  4312. spec->pwr_nids = stac92hd71bxx_pwr_nids;
  4313. snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
  4314. stac92hd71bxx_fixups);
  4315. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4316. stac_setup_gpio(codec);
  4317. err = stac_parse_auto_config(codec);
  4318. if (err < 0) {
  4319. stac_free(codec);
  4320. return err;
  4321. }
  4322. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4323. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4324. return 0;
  4325. }
  4326. static int patch_stac922x(struct hda_codec *codec)
  4327. {
  4328. struct sigmatel_spec *spec;
  4329. int err;
  4330. err = alloc_stac_spec(codec);
  4331. if (err < 0)
  4332. return err;
  4333. spec = codec->spec;
  4334. spec->linear_tone_beep = 1;
  4335. spec->gen.own_eapd_ctl = 1;
  4336. snd_hda_add_verbs(codec, stac922x_core_init);
  4337. /* Fix Mux capture level; max to 2 */
  4338. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  4339. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  4340. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  4341. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  4342. (0 << AC_AMPCAP_MUTE_SHIFT));
  4343. snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
  4344. stac922x_fixups);
  4345. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4346. err = stac_parse_auto_config(codec);
  4347. if (err < 0) {
  4348. stac_free(codec);
  4349. return err;
  4350. }
  4351. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4352. return 0;
  4353. }
  4354. static const char * const stac927x_spdif_labels[] = {
  4355. "Digital Playback", "ADAT", "Analog Mux 1",
  4356. "Analog Mux 2", "Analog Mux 3", NULL
  4357. };
  4358. static int patch_stac927x(struct hda_codec *codec)
  4359. {
  4360. struct sigmatel_spec *spec;
  4361. int err;
  4362. err = alloc_stac_spec(codec);
  4363. if (err < 0)
  4364. return err;
  4365. spec = codec->spec;
  4366. spec->linear_tone_beep = 1;
  4367. spec->gen.own_eapd_ctl = 1;
  4368. spec->have_spdif_mux = 1;
  4369. spec->spdif_labels = stac927x_spdif_labels;
  4370. spec->gen.beep_nid = 0x23; /* digital beep */
  4371. /* GPIO0 High = Enable EAPD */
  4372. spec->eapd_mask = spec->gpio_mask = 0x01;
  4373. spec->gpio_dir = spec->gpio_data = 0x01;
  4374. spec->aloopback_ctl = &stac927x_loopback;
  4375. spec->aloopback_mask = 0x40;
  4376. spec->aloopback_shift = 0;
  4377. spec->eapd_switch = 1;
  4378. snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
  4379. stac927x_fixups);
  4380. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4381. if (!spec->volknob_init)
  4382. snd_hda_add_verbs(codec, stac927x_core_init);
  4383. err = stac_parse_auto_config(codec);
  4384. if (err < 0) {
  4385. stac_free(codec);
  4386. return err;
  4387. }
  4388. codec->proc_widget_hook = stac927x_proc_hook;
  4389. /*
  4390. * !!FIXME!!
  4391. * The STAC927x seem to require fairly long delays for certain
  4392. * command sequences. With too short delays (even if the answer
  4393. * is set to RIRB properly), it results in the silence output
  4394. * on some hardwares like Dell.
  4395. *
  4396. * The below flag enables the longer delay (see get_response
  4397. * in hda_intel.c).
  4398. */
  4399. codec->bus->needs_damn_long_delay = 1;
  4400. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4401. return 0;
  4402. }
  4403. static int patch_stac9205(struct hda_codec *codec)
  4404. {
  4405. struct sigmatel_spec *spec;
  4406. int err;
  4407. err = alloc_stac_spec(codec);
  4408. if (err < 0)
  4409. return err;
  4410. spec = codec->spec;
  4411. spec->linear_tone_beep = 1;
  4412. spec->gen.own_eapd_ctl = 1;
  4413. spec->have_spdif_mux = 1;
  4414. spec->gen.beep_nid = 0x23; /* digital beep */
  4415. snd_hda_add_verbs(codec, stac9205_core_init);
  4416. spec->aloopback_ctl = &stac9205_loopback;
  4417. spec->aloopback_mask = 0x40;
  4418. spec->aloopback_shift = 0;
  4419. /* GPIO0 High = EAPD */
  4420. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4421. spec->gpio_data = 0x01;
  4422. /* Turn on/off EAPD per HP plugging */
  4423. spec->eapd_switch = 1;
  4424. snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
  4425. stac9205_fixups);
  4426. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4427. err = stac_parse_auto_config(codec);
  4428. if (err < 0) {
  4429. stac_free(codec);
  4430. return err;
  4431. }
  4432. codec->proc_widget_hook = stac9205_proc_hook;
  4433. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4434. return 0;
  4435. }
  4436. /*
  4437. * STAC9872 hack
  4438. */
  4439. static const struct hda_verb stac9872_core_init[] = {
  4440. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  4441. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  4442. {}
  4443. };
  4444. static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
  4445. { 0x0a, 0x03211020 },
  4446. { 0x0b, 0x411111f0 },
  4447. { 0x0c, 0x411111f0 },
  4448. { 0x0d, 0x03a15030 },
  4449. { 0x0e, 0x411111f0 },
  4450. { 0x0f, 0x90170110 },
  4451. { 0x11, 0x411111f0 },
  4452. { 0x13, 0x411111f0 },
  4453. { 0x14, 0x90a7013e },
  4454. {}
  4455. };
  4456. static const struct hda_model_fixup stac9872_models[] = {
  4457. { .id = STAC_9872_VAIO, .name = "vaio" },
  4458. {}
  4459. };
  4460. static const struct hda_fixup stac9872_fixups[] = {
  4461. [STAC_9872_VAIO] = {
  4462. .type = HDA_FIXUP_PINS,
  4463. .v.pins = stac9872_vaio_pin_configs,
  4464. },
  4465. };
  4466. static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
  4467. SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
  4468. "Sony VAIO F/S", STAC_9872_VAIO),
  4469. {} /* terminator */
  4470. };
  4471. static int patch_stac9872(struct hda_codec *codec)
  4472. {
  4473. struct sigmatel_spec *spec;
  4474. int err;
  4475. err = alloc_stac_spec(codec);
  4476. if (err < 0)
  4477. return err;
  4478. spec = codec->spec;
  4479. spec->linear_tone_beep = 1;
  4480. spec->gen.own_eapd_ctl = 1;
  4481. snd_hda_add_verbs(codec, stac9872_core_init);
  4482. snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
  4483. stac9872_fixups);
  4484. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4485. err = stac_parse_auto_config(codec);
  4486. if (err < 0) {
  4487. stac_free(codec);
  4488. return -EINVAL;
  4489. }
  4490. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4491. return 0;
  4492. }
  4493. /*
  4494. * patch entries
  4495. */
  4496. static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  4497. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  4498. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  4499. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  4500. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  4501. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  4502. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  4503. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  4504. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  4505. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  4506. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  4507. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  4508. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  4509. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  4510. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  4511. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  4512. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  4513. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  4514. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  4515. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  4516. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  4517. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  4518. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  4519. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  4520. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  4521. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  4522. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  4523. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  4524. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  4525. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  4526. { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
  4527. { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
  4528. /* The following does not take into account .id=0x83847661 when subsys =
  4529. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  4530. * currently not fully supported.
  4531. */
  4532. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  4533. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  4534. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  4535. { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
  4536. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  4537. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  4538. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  4539. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  4540. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  4541. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  4542. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  4543. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  4544. { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
  4545. { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
  4546. { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
  4547. { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
  4548. { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
  4549. { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
  4550. { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
  4551. { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
  4552. { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
  4553. { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
  4554. { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
  4555. { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
  4556. { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
  4557. { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
  4558. { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
  4559. { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
  4560. { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  4561. { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  4562. { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  4563. { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  4564. { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  4565. { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  4566. { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  4567. { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  4568. { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
  4569. { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
  4570. { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
  4571. { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
  4572. { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
  4573. { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
  4574. { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
  4575. { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
  4576. { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
  4577. { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
  4578. { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
  4579. { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
  4580. { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
  4581. { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
  4582. { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
  4583. { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
  4584. { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
  4585. { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
  4586. { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
  4587. { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
  4588. { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
  4589. { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
  4590. { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
  4591. { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
  4592. { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
  4593. { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
  4594. { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
  4595. { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
  4596. { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
  4597. { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
  4598. { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
  4599. { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
  4600. {} /* terminator */
  4601. };
  4602. MODULE_ALIAS("snd-hda-codec-id:8384*");
  4603. MODULE_ALIAS("snd-hda-codec-id:111d*");
  4604. MODULE_LICENSE("GPL");
  4605. MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
  4606. static struct hda_codec_driver sigmatel_driver = {
  4607. .preset = snd_hda_preset_sigmatel,
  4608. };
  4609. module_hda_codec_driver(sigmatel_driver);