patch_cirrus.c 32 KB

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  1. /*
  2. * HD audio interface patch for Cirrus Logic CS420x chip
  3. *
  4. * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
  5. *
  6. * This driver is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This driver is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/slab.h>
  22. #include <linux/module.h>
  23. #include <sound/core.h>
  24. #include <sound/tlv.h>
  25. #include "hda_codec.h"
  26. #include "hda_local.h"
  27. #include "hda_auto_parser.h"
  28. #include "hda_jack.h"
  29. #include "hda_generic.h"
  30. /*
  31. */
  32. struct cs_spec {
  33. struct hda_gen_spec gen;
  34. unsigned int gpio_mask;
  35. unsigned int gpio_dir;
  36. unsigned int gpio_data;
  37. unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
  38. unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
  39. /* CS421x */
  40. unsigned int spdif_detect:1;
  41. unsigned int spdif_present:1;
  42. unsigned int sense_b:1;
  43. hda_nid_t vendor_nid;
  44. /* for MBP SPDIF control */
  45. int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
  46. struct snd_ctl_elem_value *ucontrol);
  47. };
  48. /* available models with CS420x */
  49. enum {
  50. CS420X_MBP53,
  51. CS420X_MBP55,
  52. CS420X_IMAC27,
  53. CS420X_GPIO_13,
  54. CS420X_GPIO_23,
  55. CS420X_MBP101,
  56. CS420X_MBP81,
  57. CS420X_MBA42,
  58. CS420X_AUTO,
  59. /* aliases */
  60. CS420X_IMAC27_122 = CS420X_GPIO_23,
  61. CS420X_APPLE = CS420X_GPIO_13,
  62. };
  63. /* CS421x boards */
  64. enum {
  65. CS421X_CDB4210,
  66. CS421X_SENSE_B,
  67. CS421X_STUMPY,
  68. };
  69. /* Vendor-specific processing widget */
  70. #define CS420X_VENDOR_NID 0x11
  71. #define CS_DIG_OUT1_PIN_NID 0x10
  72. #define CS_DIG_OUT2_PIN_NID 0x15
  73. #define CS_DMIC1_PIN_NID 0x0e
  74. #define CS_DMIC2_PIN_NID 0x12
  75. /* coef indices */
  76. #define IDX_SPDIF_STAT 0x0000
  77. #define IDX_SPDIF_CTL 0x0001
  78. #define IDX_ADC_CFG 0x0002
  79. /* SZC bitmask, 4 modes below:
  80. * 0 = immediate,
  81. * 1 = digital immediate, analog zero-cross
  82. * 2 = digtail & analog soft-ramp
  83. * 3 = digital soft-ramp, analog zero-cross
  84. */
  85. #define CS_COEF_ADC_SZC_MASK (3 << 0)
  86. #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
  87. #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
  88. /* PGA mode: 0 = differential, 1 = signle-ended */
  89. #define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
  90. #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
  91. #define IDX_DAC_CFG 0x0003
  92. /* SZC bitmask, 4 modes below:
  93. * 0 = Immediate
  94. * 1 = zero-cross
  95. * 2 = soft-ramp
  96. * 3 = soft-ramp on zero-cross
  97. */
  98. #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
  99. #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
  100. #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
  101. #define IDX_BEEP_CFG 0x0004
  102. /* 0x0008 - test reg key */
  103. /* 0x0009 - 0x0014 -> 12 test regs */
  104. /* 0x0015 - visibility reg */
  105. /* Cirrus Logic CS4208 */
  106. #define CS4208_VENDOR_NID 0x24
  107. /*
  108. * Cirrus Logic CS4210
  109. *
  110. * 1 DAC => HP(sense) / Speakers,
  111. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  112. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  113. */
  114. #define CS4210_DAC_NID 0x02
  115. #define CS4210_ADC_NID 0x03
  116. #define CS4210_VENDOR_NID 0x0B
  117. #define CS421X_DMIC_PIN_NID 0x09 /* Port E */
  118. #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
  119. #define CS421X_IDX_DEV_CFG 0x01
  120. #define CS421X_IDX_ADC_CFG 0x02
  121. #define CS421X_IDX_DAC_CFG 0x03
  122. #define CS421X_IDX_SPK_CTL 0x04
  123. /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
  124. #define CS4213_VENDOR_NID 0x09
  125. static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
  126. {
  127. struct cs_spec *spec = codec->spec;
  128. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  129. AC_VERB_SET_COEF_INDEX, idx);
  130. return snd_hda_codec_read(codec, spec->vendor_nid, 0,
  131. AC_VERB_GET_PROC_COEF, 0);
  132. }
  133. static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
  134. unsigned int coef)
  135. {
  136. struct cs_spec *spec = codec->spec;
  137. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  138. AC_VERB_SET_COEF_INDEX, idx);
  139. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  140. AC_VERB_SET_PROC_COEF, coef);
  141. }
  142. /*
  143. * auto-mute and auto-mic switching
  144. * CS421x auto-output redirecting
  145. * HP/SPK/SPDIF
  146. */
  147. static void cs_automute(struct hda_codec *codec)
  148. {
  149. struct cs_spec *spec = codec->spec;
  150. /* mute HPs if spdif jack (SENSE_B) is present */
  151. spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
  152. snd_hda_gen_update_outputs(codec);
  153. if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
  154. spec->gpio_data = spec->gen.hp_jack_present ?
  155. spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
  156. snd_hda_codec_write(codec, 0x01, 0,
  157. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  158. }
  159. }
  160. static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
  161. {
  162. unsigned int val;
  163. val = snd_hda_codec_get_pincfg(codec, nid);
  164. return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
  165. }
  166. static void init_input_coef(struct hda_codec *codec)
  167. {
  168. struct cs_spec *spec = codec->spec;
  169. unsigned int coef;
  170. /* CS420x has multiple ADC, CS421x has single ADC */
  171. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  172. coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
  173. if (is_active_pin(codec, CS_DMIC2_PIN_NID))
  174. coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
  175. if (is_active_pin(codec, CS_DMIC1_PIN_NID))
  176. coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
  177. * No effect if SPDIF_OUT2 is
  178. * selected in IDX_SPDIF_CTL.
  179. */
  180. cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
  181. }
  182. }
  183. static const struct hda_verb cs_coef_init_verbs[] = {
  184. {0x11, AC_VERB_SET_PROC_STATE, 1},
  185. {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
  186. {0x11, AC_VERB_SET_PROC_COEF,
  187. (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
  188. | 0x0040 /* Mute DACs on FIFO error */
  189. | 0x1000 /* Enable DACs High Pass Filter */
  190. | 0x0400 /* Disable Coefficient Auto increment */
  191. )},
  192. /* ADC1/2 - Digital and Analog Soft Ramp */
  193. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  194. {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
  195. /* Beep */
  196. {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
  197. {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
  198. {} /* terminator */
  199. };
  200. static const struct hda_verb cs4208_coef_init_verbs[] = {
  201. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  202. {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  203. {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
  204. {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
  205. {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
  206. {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
  207. {} /* terminator */
  208. };
  209. /* Errata: CS4207 rev C0/C1/C2 Silicon
  210. *
  211. * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
  212. *
  213. * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
  214. * may be excessive (up to an additional 200 μA), which is most easily
  215. * observed while the part is being held in reset (RESET# active low).
  216. *
  217. * Root Cause: At initial powerup of the device, the logic that drives
  218. * the clock and write enable to the S/PDIF SRC RAMs is not properly
  219. * initialized.
  220. * Certain random patterns will cause a steady leakage current in those
  221. * RAM cells. The issue will resolve once the SRCs are used (turned on).
  222. *
  223. * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
  224. * blocks, which will alleviate the issue.
  225. */
  226. static const struct hda_verb cs_errata_init_verbs[] = {
  227. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  228. {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  229. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  230. {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
  231. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  232. {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
  233. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  234. {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
  235. {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
  236. {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
  237. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  238. {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
  239. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  240. {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
  241. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  242. {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
  243. {0x11, AC_VERB_SET_PROC_STATE, 0x00},
  244. #if 0 /* Don't to set to D3 as we are in power-up sequence */
  245. {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
  246. {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
  247. /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
  248. #endif
  249. {} /* terminator */
  250. };
  251. /* SPDIF setup */
  252. static void init_digital_coef(struct hda_codec *codec)
  253. {
  254. unsigned int coef;
  255. coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
  256. coef |= 0x0008; /* Replace with mute on error */
  257. if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
  258. coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
  259. * SPDIF_OUT2 is shared with GPIO1 and
  260. * DMIC_SDA2.
  261. */
  262. cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
  263. }
  264. static int cs_init(struct hda_codec *codec)
  265. {
  266. struct cs_spec *spec = codec->spec;
  267. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  268. /* init_verb sequence for C0/C1/C2 errata*/
  269. snd_hda_sequence_write(codec, cs_errata_init_verbs);
  270. snd_hda_sequence_write(codec, cs_coef_init_verbs);
  271. } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
  272. snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
  273. }
  274. snd_hda_gen_init(codec);
  275. if (spec->gpio_mask) {
  276. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  277. spec->gpio_mask);
  278. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  279. spec->gpio_dir);
  280. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  281. spec->gpio_data);
  282. }
  283. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  284. init_input_coef(codec);
  285. init_digital_coef(codec);
  286. }
  287. return 0;
  288. }
  289. static int cs_build_controls(struct hda_codec *codec)
  290. {
  291. int err;
  292. err = snd_hda_gen_build_controls(codec);
  293. if (err < 0)
  294. return err;
  295. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
  296. return 0;
  297. }
  298. #define cs_free snd_hda_gen_free
  299. static const struct hda_codec_ops cs_patch_ops = {
  300. .build_controls = cs_build_controls,
  301. .build_pcms = snd_hda_gen_build_pcms,
  302. .init = cs_init,
  303. .free = cs_free,
  304. .unsol_event = snd_hda_jack_unsol_event,
  305. };
  306. static int cs_parse_auto_config(struct hda_codec *codec)
  307. {
  308. struct cs_spec *spec = codec->spec;
  309. int err;
  310. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  311. if (err < 0)
  312. return err;
  313. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  314. if (err < 0)
  315. return err;
  316. return 0;
  317. }
  318. static const struct hda_model_fixup cs420x_models[] = {
  319. { .id = CS420X_MBP53, .name = "mbp53" },
  320. { .id = CS420X_MBP55, .name = "mbp55" },
  321. { .id = CS420X_IMAC27, .name = "imac27" },
  322. { .id = CS420X_IMAC27_122, .name = "imac27_122" },
  323. { .id = CS420X_APPLE, .name = "apple" },
  324. { .id = CS420X_MBP101, .name = "mbp101" },
  325. { .id = CS420X_MBP81, .name = "mbp81" },
  326. { .id = CS420X_MBA42, .name = "mba42" },
  327. {}
  328. };
  329. static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
  330. SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
  331. SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
  332. SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
  333. SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
  334. /* this conflicts with too many other models */
  335. /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
  336. /* codec SSID */
  337. SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
  338. SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
  339. SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
  340. SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
  341. SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
  342. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
  343. {} /* terminator */
  344. };
  345. static const struct hda_pintbl mbp53_pincfgs[] = {
  346. { 0x09, 0x012b4050 },
  347. { 0x0a, 0x90100141 },
  348. { 0x0b, 0x90100140 },
  349. { 0x0c, 0x018b3020 },
  350. { 0x0d, 0x90a00110 },
  351. { 0x0e, 0x400000f0 },
  352. { 0x0f, 0x01cbe030 },
  353. { 0x10, 0x014be060 },
  354. { 0x12, 0x400000f0 },
  355. { 0x15, 0x400000f0 },
  356. {} /* terminator */
  357. };
  358. static const struct hda_pintbl mbp55_pincfgs[] = {
  359. { 0x09, 0x012b4030 },
  360. { 0x0a, 0x90100121 },
  361. { 0x0b, 0x90100120 },
  362. { 0x0c, 0x400000f0 },
  363. { 0x0d, 0x90a00110 },
  364. { 0x0e, 0x400000f0 },
  365. { 0x0f, 0x400000f0 },
  366. { 0x10, 0x014be040 },
  367. { 0x12, 0x400000f0 },
  368. { 0x15, 0x400000f0 },
  369. {} /* terminator */
  370. };
  371. static const struct hda_pintbl imac27_pincfgs[] = {
  372. { 0x09, 0x012b4050 },
  373. { 0x0a, 0x90100140 },
  374. { 0x0b, 0x90100142 },
  375. { 0x0c, 0x018b3020 },
  376. { 0x0d, 0x90a00110 },
  377. { 0x0e, 0x400000f0 },
  378. { 0x0f, 0x01cbe030 },
  379. { 0x10, 0x014be060 },
  380. { 0x12, 0x01ab9070 },
  381. { 0x15, 0x400000f0 },
  382. {} /* terminator */
  383. };
  384. static const struct hda_pintbl mbp101_pincfgs[] = {
  385. { 0x0d, 0x40ab90f0 },
  386. { 0x0e, 0x90a600f0 },
  387. { 0x12, 0x50a600f0 },
  388. {} /* terminator */
  389. };
  390. static const struct hda_pintbl mba42_pincfgs[] = {
  391. { 0x09, 0x012b4030 }, /* HP */
  392. { 0x0a, 0x400000f0 },
  393. { 0x0b, 0x90100120 }, /* speaker */
  394. { 0x0c, 0x400000f0 },
  395. { 0x0d, 0x90a00110 }, /* mic */
  396. { 0x0e, 0x400000f0 },
  397. { 0x0f, 0x400000f0 },
  398. { 0x10, 0x400000f0 },
  399. { 0x12, 0x400000f0 },
  400. { 0x15, 0x400000f0 },
  401. {} /* terminator */
  402. };
  403. static const struct hda_pintbl mba6_pincfgs[] = {
  404. { 0x10, 0x032120f0 }, /* HP */
  405. { 0x11, 0x500000f0 },
  406. { 0x12, 0x90100010 }, /* Speaker */
  407. { 0x13, 0x500000f0 },
  408. { 0x14, 0x500000f0 },
  409. { 0x15, 0x770000f0 },
  410. { 0x16, 0x770000f0 },
  411. { 0x17, 0x430000f0 },
  412. { 0x18, 0x43ab9030 }, /* Mic */
  413. { 0x19, 0x770000f0 },
  414. { 0x1a, 0x770000f0 },
  415. { 0x1b, 0x770000f0 },
  416. { 0x1c, 0x90a00090 },
  417. { 0x1d, 0x500000f0 },
  418. { 0x1e, 0x500000f0 },
  419. { 0x1f, 0x500000f0 },
  420. { 0x20, 0x500000f0 },
  421. { 0x21, 0x430000f0 },
  422. { 0x22, 0x430000f0 },
  423. {} /* terminator */
  424. };
  425. static void cs420x_fixup_gpio_13(struct hda_codec *codec,
  426. const struct hda_fixup *fix, int action)
  427. {
  428. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  429. struct cs_spec *spec = codec->spec;
  430. spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
  431. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  432. spec->gpio_mask = spec->gpio_dir =
  433. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  434. }
  435. }
  436. static void cs420x_fixup_gpio_23(struct hda_codec *codec,
  437. const struct hda_fixup *fix, int action)
  438. {
  439. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  440. struct cs_spec *spec = codec->spec;
  441. spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
  442. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  443. spec->gpio_mask = spec->gpio_dir =
  444. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  445. }
  446. }
  447. static const struct hda_fixup cs420x_fixups[] = {
  448. [CS420X_MBP53] = {
  449. .type = HDA_FIXUP_PINS,
  450. .v.pins = mbp53_pincfgs,
  451. .chained = true,
  452. .chain_id = CS420X_APPLE,
  453. },
  454. [CS420X_MBP55] = {
  455. .type = HDA_FIXUP_PINS,
  456. .v.pins = mbp55_pincfgs,
  457. .chained = true,
  458. .chain_id = CS420X_GPIO_13,
  459. },
  460. [CS420X_IMAC27] = {
  461. .type = HDA_FIXUP_PINS,
  462. .v.pins = imac27_pincfgs,
  463. .chained = true,
  464. .chain_id = CS420X_GPIO_13,
  465. },
  466. [CS420X_GPIO_13] = {
  467. .type = HDA_FIXUP_FUNC,
  468. .v.func = cs420x_fixup_gpio_13,
  469. },
  470. [CS420X_GPIO_23] = {
  471. .type = HDA_FIXUP_FUNC,
  472. .v.func = cs420x_fixup_gpio_23,
  473. },
  474. [CS420X_MBP101] = {
  475. .type = HDA_FIXUP_PINS,
  476. .v.pins = mbp101_pincfgs,
  477. .chained = true,
  478. .chain_id = CS420X_GPIO_13,
  479. },
  480. [CS420X_MBP81] = {
  481. .type = HDA_FIXUP_VERBS,
  482. .v.verbs = (const struct hda_verb[]) {
  483. /* internal mic ADC2: right only, single ended */
  484. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  485. {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
  486. {}
  487. },
  488. .chained = true,
  489. .chain_id = CS420X_GPIO_13,
  490. },
  491. [CS420X_MBA42] = {
  492. .type = HDA_FIXUP_PINS,
  493. .v.pins = mba42_pincfgs,
  494. .chained = true,
  495. .chain_id = CS420X_GPIO_13,
  496. },
  497. };
  498. static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
  499. {
  500. struct cs_spec *spec;
  501. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  502. if (!spec)
  503. return NULL;
  504. codec->spec = spec;
  505. spec->vendor_nid = vendor_nid;
  506. snd_hda_gen_spec_init(&spec->gen);
  507. return spec;
  508. }
  509. static int patch_cs420x(struct hda_codec *codec)
  510. {
  511. struct cs_spec *spec;
  512. int err;
  513. spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
  514. if (!spec)
  515. return -ENOMEM;
  516. codec->patch_ops = cs_patch_ops;
  517. spec->gen.automute_hook = cs_automute;
  518. codec->single_adc_amp = 1;
  519. snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
  520. cs420x_fixups);
  521. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  522. err = cs_parse_auto_config(codec);
  523. if (err < 0)
  524. goto error;
  525. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  526. return 0;
  527. error:
  528. cs_free(codec);
  529. return err;
  530. }
  531. /*
  532. * CS4208 support:
  533. * Its layout is no longer compatible with CS4206/CS4207
  534. */
  535. enum {
  536. CS4208_MAC_AUTO,
  537. CS4208_MBA6,
  538. CS4208_MBP11,
  539. CS4208_GPIO0,
  540. };
  541. static const struct hda_model_fixup cs4208_models[] = {
  542. { .id = CS4208_GPIO0, .name = "gpio0" },
  543. { .id = CS4208_MBA6, .name = "mba6" },
  544. { .id = CS4208_MBP11, .name = "mbp11" },
  545. {}
  546. };
  547. static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
  548. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
  549. {} /* terminator */
  550. };
  551. /* codec SSID matching */
  552. static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
  553. SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
  554. SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
  555. SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
  556. {} /* terminator */
  557. };
  558. static void cs4208_fixup_gpio0(struct hda_codec *codec,
  559. const struct hda_fixup *fix, int action)
  560. {
  561. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  562. struct cs_spec *spec = codec->spec;
  563. spec->gpio_eapd_hp = 0;
  564. spec->gpio_eapd_speaker = 1;
  565. spec->gpio_mask = spec->gpio_dir =
  566. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  567. }
  568. }
  569. static const struct hda_fixup cs4208_fixups[];
  570. /* remap the fixup from codec SSID and apply it */
  571. static void cs4208_fixup_mac(struct hda_codec *codec,
  572. const struct hda_fixup *fix, int action)
  573. {
  574. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  575. return;
  576. codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
  577. snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
  578. if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET)
  579. codec->fixup_id = CS4208_GPIO0; /* default fixup */
  580. snd_hda_apply_fixup(codec, action);
  581. }
  582. static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
  583. struct snd_ctl_elem_value *ucontrol)
  584. {
  585. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  586. struct cs_spec *spec = codec->spec;
  587. hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
  588. int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
  589. snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
  590. return spec->spdif_sw_put(kcontrol, ucontrol);
  591. }
  592. /* hook the SPDIF switch */
  593. static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
  594. const struct hda_fixup *fix, int action)
  595. {
  596. if (action == HDA_FIXUP_ACT_BUILD) {
  597. struct cs_spec *spec = codec->spec;
  598. struct snd_kcontrol *kctl;
  599. if (!spec->gen.autocfg.dig_out_pins[0])
  600. return;
  601. kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
  602. if (!kctl)
  603. return;
  604. spec->spdif_sw_put = kctl->put;
  605. kctl->put = cs4208_spdif_sw_put;
  606. }
  607. }
  608. static const struct hda_fixup cs4208_fixups[] = {
  609. [CS4208_MBA6] = {
  610. .type = HDA_FIXUP_PINS,
  611. .v.pins = mba6_pincfgs,
  612. .chained = true,
  613. .chain_id = CS4208_GPIO0,
  614. },
  615. [CS4208_MBP11] = {
  616. .type = HDA_FIXUP_FUNC,
  617. .v.func = cs4208_fixup_spdif_switch,
  618. .chained = true,
  619. .chain_id = CS4208_GPIO0,
  620. },
  621. [CS4208_GPIO0] = {
  622. .type = HDA_FIXUP_FUNC,
  623. .v.func = cs4208_fixup_gpio0,
  624. },
  625. [CS4208_MAC_AUTO] = {
  626. .type = HDA_FIXUP_FUNC,
  627. .v.func = cs4208_fixup_mac,
  628. },
  629. };
  630. /* correct the 0dB offset of input pins */
  631. static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
  632. {
  633. unsigned int caps;
  634. caps = query_amp_caps(codec, adc, HDA_INPUT);
  635. caps &= ~(AC_AMPCAP_OFFSET);
  636. caps |= 0x02;
  637. snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
  638. }
  639. static int patch_cs4208(struct hda_codec *codec)
  640. {
  641. struct cs_spec *spec;
  642. int err;
  643. spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
  644. if (!spec)
  645. return -ENOMEM;
  646. codec->patch_ops = cs_patch_ops;
  647. spec->gen.automute_hook = cs_automute;
  648. /* exclude NID 0x10 (HP) from output volumes due to different steps */
  649. spec->gen.out_vol_mask = 1ULL << 0x10;
  650. snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
  651. cs4208_fixups);
  652. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  653. snd_hda_override_wcaps(codec, 0x18,
  654. get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
  655. cs4208_fix_amp_caps(codec, 0x18);
  656. cs4208_fix_amp_caps(codec, 0x1b);
  657. cs4208_fix_amp_caps(codec, 0x1c);
  658. err = cs_parse_auto_config(codec);
  659. if (err < 0)
  660. goto error;
  661. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  662. return 0;
  663. error:
  664. cs_free(codec);
  665. return err;
  666. }
  667. /*
  668. * Cirrus Logic CS4210
  669. *
  670. * 1 DAC => HP(sense) / Speakers,
  671. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  672. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  673. */
  674. /* CS4210 board names */
  675. static const struct hda_model_fixup cs421x_models[] = {
  676. { .id = CS421X_CDB4210, .name = "cdb4210" },
  677. { .id = CS421X_STUMPY, .name = "stumpy" },
  678. {}
  679. };
  680. static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
  681. /* Test Intel board + CDB2410 */
  682. SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
  683. {} /* terminator */
  684. };
  685. /* CS4210 board pinconfigs */
  686. /* Default CS4210 (CDB4210)*/
  687. static const struct hda_pintbl cdb4210_pincfgs[] = {
  688. { 0x05, 0x0321401f },
  689. { 0x06, 0x90170010 },
  690. { 0x07, 0x03813031 },
  691. { 0x08, 0xb7a70037 },
  692. { 0x09, 0xb7a6003e },
  693. { 0x0a, 0x034510f0 },
  694. {} /* terminator */
  695. };
  696. /* Stumpy ChromeBox */
  697. static const struct hda_pintbl stumpy_pincfgs[] = {
  698. { 0x05, 0x022120f0 },
  699. { 0x06, 0x901700f0 },
  700. { 0x07, 0x02a120f0 },
  701. { 0x08, 0x77a70037 },
  702. { 0x09, 0x77a6003e },
  703. { 0x0a, 0x434510f0 },
  704. {} /* terminator */
  705. };
  706. /* Setup GPIO/SENSE for each board (if used) */
  707. static void cs421x_fixup_sense_b(struct hda_codec *codec,
  708. const struct hda_fixup *fix, int action)
  709. {
  710. struct cs_spec *spec = codec->spec;
  711. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  712. spec->sense_b = 1;
  713. }
  714. static const struct hda_fixup cs421x_fixups[] = {
  715. [CS421X_CDB4210] = {
  716. .type = HDA_FIXUP_PINS,
  717. .v.pins = cdb4210_pincfgs,
  718. .chained = true,
  719. .chain_id = CS421X_SENSE_B,
  720. },
  721. [CS421X_SENSE_B] = {
  722. .type = HDA_FIXUP_FUNC,
  723. .v.func = cs421x_fixup_sense_b,
  724. },
  725. [CS421X_STUMPY] = {
  726. .type = HDA_FIXUP_PINS,
  727. .v.pins = stumpy_pincfgs,
  728. },
  729. };
  730. static const struct hda_verb cs421x_coef_init_verbs[] = {
  731. {0x0B, AC_VERB_SET_PROC_STATE, 1},
  732. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
  733. /*
  734. Disable Coefficient Index Auto-Increment(DAI)=1,
  735. PDREF=0
  736. */
  737. {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
  738. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
  739. /* ADC SZCMode = Digital Soft Ramp */
  740. {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
  741. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
  742. {0x0B, AC_VERB_SET_PROC_COEF,
  743. (0x0002 /* DAC SZCMode = Digital Soft Ramp */
  744. | 0x0004 /* Mute DAC on FIFO error */
  745. | 0x0008 /* Enable DAC High Pass Filter */
  746. )},
  747. {} /* terminator */
  748. };
  749. /* Errata: CS4210 rev A1 Silicon
  750. *
  751. * http://www.cirrus.com/en/pubs/errata/
  752. *
  753. * Description:
  754. * 1. Performance degredation is present in the ADC.
  755. * 2. Speaker output is not completely muted upon HP detect.
  756. * 3. Noise is present when clipping occurs on the amplified
  757. * speaker outputs.
  758. *
  759. * Workaround:
  760. * The following verb sequence written to the registers during
  761. * initialization will correct the issues listed above.
  762. */
  763. static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
  764. {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  765. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
  766. {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
  767. {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
  768. {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
  769. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
  770. {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
  771. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
  772. {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
  773. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
  774. {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
  775. {} /* terminator */
  776. };
  777. /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
  778. static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
  779. static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
  780. struct snd_ctl_elem_info *uinfo)
  781. {
  782. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  783. uinfo->count = 1;
  784. uinfo->value.integer.min = 0;
  785. uinfo->value.integer.max = 3;
  786. return 0;
  787. }
  788. static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
  789. struct snd_ctl_elem_value *ucontrol)
  790. {
  791. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  792. ucontrol->value.integer.value[0] =
  793. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
  794. return 0;
  795. }
  796. static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
  797. struct snd_ctl_elem_value *ucontrol)
  798. {
  799. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  800. unsigned int vol = ucontrol->value.integer.value[0];
  801. unsigned int coef =
  802. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
  803. unsigned int original_coef = coef;
  804. coef &= ~0x0003;
  805. coef |= (vol & 0x0003);
  806. if (original_coef == coef)
  807. return 0;
  808. else {
  809. cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
  810. return 1;
  811. }
  812. }
  813. static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
  814. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  815. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  816. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  817. .name = "Speaker Boost Playback Volume",
  818. .info = cs421x_boost_vol_info,
  819. .get = cs421x_boost_vol_get,
  820. .put = cs421x_boost_vol_put,
  821. .tlv = { .p = cs421x_speaker_boost_db_scale },
  822. };
  823. static void cs4210_pinmux_init(struct hda_codec *codec)
  824. {
  825. struct cs_spec *spec = codec->spec;
  826. unsigned int def_conf, coef;
  827. /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
  828. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  829. if (spec->gpio_mask)
  830. coef |= 0x0008; /* B1,B2 are GPIOs */
  831. else
  832. coef &= ~0x0008;
  833. if (spec->sense_b)
  834. coef |= 0x0010; /* B2 is SENSE_B, not inverted */
  835. else
  836. coef &= ~0x0010;
  837. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  838. if ((spec->gpio_mask || spec->sense_b) &&
  839. is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
  840. /*
  841. GPIO or SENSE_B forced - disconnect the DMIC pin.
  842. */
  843. def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
  844. def_conf &= ~AC_DEFCFG_PORT_CONN;
  845. def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
  846. snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
  847. }
  848. }
  849. static void cs4210_spdif_automute(struct hda_codec *codec,
  850. struct hda_jack_callback *tbl)
  851. {
  852. struct cs_spec *spec = codec->spec;
  853. bool spdif_present = false;
  854. hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
  855. /* detect on spdif is specific to CS4210 */
  856. if (!spec->spdif_detect ||
  857. spec->vendor_nid != CS4210_VENDOR_NID)
  858. return;
  859. spdif_present = snd_hda_jack_detect(codec, spdif_pin);
  860. if (spdif_present == spec->spdif_present)
  861. return;
  862. spec->spdif_present = spdif_present;
  863. /* SPDIF TX on/off */
  864. if (spdif_present)
  865. snd_hda_set_pin_ctl(codec, spdif_pin,
  866. spdif_present ? PIN_OUT : 0);
  867. cs_automute(codec);
  868. }
  869. static void parse_cs421x_digital(struct hda_codec *codec)
  870. {
  871. struct cs_spec *spec = codec->spec;
  872. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  873. int i;
  874. for (i = 0; i < cfg->dig_outs; i++) {
  875. hda_nid_t nid = cfg->dig_out_pins[i];
  876. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
  877. spec->spdif_detect = 1;
  878. snd_hda_jack_detect_enable_callback(codec, nid,
  879. cs4210_spdif_automute);
  880. }
  881. }
  882. }
  883. static int cs421x_init(struct hda_codec *codec)
  884. {
  885. struct cs_spec *spec = codec->spec;
  886. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  887. snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
  888. snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
  889. cs4210_pinmux_init(codec);
  890. }
  891. snd_hda_gen_init(codec);
  892. if (spec->gpio_mask) {
  893. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  894. spec->gpio_mask);
  895. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  896. spec->gpio_dir);
  897. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  898. spec->gpio_data);
  899. }
  900. init_input_coef(codec);
  901. cs4210_spdif_automute(codec, NULL);
  902. return 0;
  903. }
  904. static int cs421x_build_controls(struct hda_codec *codec)
  905. {
  906. struct cs_spec *spec = codec->spec;
  907. int err;
  908. err = snd_hda_gen_build_controls(codec);
  909. if (err < 0)
  910. return err;
  911. if (spec->gen.autocfg.speaker_outs &&
  912. spec->vendor_nid == CS4210_VENDOR_NID) {
  913. err = snd_hda_ctl_add(codec, 0,
  914. snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
  915. if (err < 0)
  916. return err;
  917. }
  918. return 0;
  919. }
  920. static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
  921. {
  922. unsigned int caps;
  923. /* set the upper-limit for mixer amp to 0dB */
  924. caps = query_amp_caps(codec, dac, HDA_OUTPUT);
  925. caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
  926. caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
  927. << AC_AMPCAP_NUM_STEPS_SHIFT;
  928. snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
  929. }
  930. static int cs421x_parse_auto_config(struct hda_codec *codec)
  931. {
  932. struct cs_spec *spec = codec->spec;
  933. hda_nid_t dac = CS4210_DAC_NID;
  934. int err;
  935. fix_volume_caps(codec, dac);
  936. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  937. if (err < 0)
  938. return err;
  939. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  940. if (err < 0)
  941. return err;
  942. parse_cs421x_digital(codec);
  943. return 0;
  944. }
  945. #ifdef CONFIG_PM
  946. /*
  947. Manage PDREF, when transitioning to D3hot
  948. (DAC,ADC) -> D3, PDREF=1, AFG->D3
  949. */
  950. static int cs421x_suspend(struct hda_codec *codec)
  951. {
  952. struct cs_spec *spec = codec->spec;
  953. unsigned int coef;
  954. snd_hda_shutup_pins(codec);
  955. snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
  956. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  957. snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
  958. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  959. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  960. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  961. coef |= 0x0004; /* PDREF */
  962. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  963. }
  964. return 0;
  965. }
  966. #endif
  967. static const struct hda_codec_ops cs421x_patch_ops = {
  968. .build_controls = cs421x_build_controls,
  969. .build_pcms = snd_hda_gen_build_pcms,
  970. .init = cs421x_init,
  971. .free = cs_free,
  972. .unsol_event = snd_hda_jack_unsol_event,
  973. #ifdef CONFIG_PM
  974. .suspend = cs421x_suspend,
  975. #endif
  976. };
  977. static int patch_cs4210(struct hda_codec *codec)
  978. {
  979. struct cs_spec *spec;
  980. int err;
  981. spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
  982. if (!spec)
  983. return -ENOMEM;
  984. codec->patch_ops = cs421x_patch_ops;
  985. spec->gen.automute_hook = cs_automute;
  986. snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
  987. cs421x_fixups);
  988. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  989. /*
  990. Update the GPIO/DMIC/SENSE_B pinmux before the configuration
  991. is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
  992. is disabled.
  993. */
  994. cs4210_pinmux_init(codec);
  995. err = cs421x_parse_auto_config(codec);
  996. if (err < 0)
  997. goto error;
  998. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  999. return 0;
  1000. error:
  1001. cs_free(codec);
  1002. return err;
  1003. }
  1004. static int patch_cs4213(struct hda_codec *codec)
  1005. {
  1006. struct cs_spec *spec;
  1007. int err;
  1008. spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
  1009. if (!spec)
  1010. return -ENOMEM;
  1011. codec->patch_ops = cs421x_patch_ops;
  1012. err = cs421x_parse_auto_config(codec);
  1013. if (err < 0)
  1014. goto error;
  1015. return 0;
  1016. error:
  1017. cs_free(codec);
  1018. return err;
  1019. }
  1020. /*
  1021. * patch entries
  1022. */
  1023. static const struct hda_codec_preset snd_hda_preset_cirrus[] = {
  1024. { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x },
  1025. { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x },
  1026. { .id = 0x10134208, .name = "CS4208", .patch = patch_cs4208 },
  1027. { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 },
  1028. { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 },
  1029. {} /* terminator */
  1030. };
  1031. MODULE_ALIAS("snd-hda-codec-id:10134206");
  1032. MODULE_ALIAS("snd-hda-codec-id:10134207");
  1033. MODULE_ALIAS("snd-hda-codec-id:10134208");
  1034. MODULE_ALIAS("snd-hda-codec-id:10134210");
  1035. MODULE_ALIAS("snd-hda-codec-id:10134213");
  1036. MODULE_LICENSE("GPL");
  1037. MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
  1038. static struct hda_codec_driver cirrus_driver = {
  1039. .preset = snd_hda_preset_cirrus,
  1040. };
  1041. module_hda_codec_driver(cirrus_driver);