aw2-tsl.c 4.0 KB

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  1. /*****************************************************************************
  2. *
  3. * Copyright (C) 2008 Cedric Bregardis <cedric.bregardis@free.fr> and
  4. * Jean-Christian Hassler <jhassler@free.fr>
  5. * Copyright 1998 Emagic Soft- und Hardware GmbH
  6. * Copyright 2002 Martijn Sipkema
  7. *
  8. * This file is part of the Audiowerk2 ALSA driver
  9. *
  10. * The Audiowerk2 ALSA driver is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; version 2.
  13. *
  14. * The Audiowerk2 ALSA driver is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with the Audiowerk2 ALSA driver; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  22. * USA.
  23. *
  24. *****************************************************************************/
  25. #define TSL_WS0 (1UL << 31)
  26. #define TSL_WS1 (1UL << 30)
  27. #define TSL_WS2 (1UL << 29)
  28. #define TSL_WS3 (1UL << 28)
  29. #define TSL_WS4 (1UL << 27)
  30. #define TSL_DIS_A1 (1UL << 24)
  31. #define TSL_SDW_A1 (1UL << 23)
  32. #define TSL_SIB_A1 (1UL << 22)
  33. #define TSL_SF_A1 (1UL << 21)
  34. #define TSL_LF_A1 (1UL << 20)
  35. #define TSL_BSEL_A1 (1UL << 17)
  36. #define TSL_DOD_A1 (1UL << 15)
  37. #define TSL_LOW_A1 (1UL << 14)
  38. #define TSL_DIS_A2 (1UL << 11)
  39. #define TSL_SDW_A2 (1UL << 10)
  40. #define TSL_SIB_A2 (1UL << 9)
  41. #define TSL_SF_A2 (1UL << 8)
  42. #define TSL_LF_A2 (1UL << 7)
  43. #define TSL_BSEL_A2 (1UL << 4)
  44. #define TSL_DOD_A2 (1UL << 2)
  45. #define TSL_LOW_A2 (1UL << 1)
  46. #define TSL_EOS (1UL << 0)
  47. /* Audiowerk8 hardware setup: */
  48. /* WS0, SD4, TSL1 - Analog/ digital in */
  49. /* WS1, SD0, TSL1 - Analog out #1, digital out */
  50. /* WS2, SD2, TSL1 - Analog out #2 */
  51. /* WS3, SD1, TSL2 - Analog out #3 */
  52. /* WS4, SD3, TSL2 - Analog out #4 */
  53. /* Audiowerk8 timing: */
  54. /* Timeslot: | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | ... */
  55. /* A1_INPUT: */
  56. /* SD4: <_ADC-L_>-------<_ADC-R_>-------< */
  57. /* WS0: _______________/---------------\_ */
  58. /* A1_OUTPUT: */
  59. /* SD0: <_1-L___>-------<_1-R___>-------< */
  60. /* WS1: _______________/---------------\_ */
  61. /* SD2: >-------<_2-L___>-------<_2-R___> */
  62. /* WS2: -------\_______________/--------- */
  63. /* A2_OUTPUT: */
  64. /* SD1: <_3-L___>-------<_3-R___>-------< */
  65. /* WS3: _______________/---------------\_ */
  66. /* SD3: >-------<_4-L___>-------<_4-R___> */
  67. /* WS4: -------\_______________/--------- */
  68. static int tsl1[8] = {
  69. 1 * TSL_SDW_A1 | 3 * TSL_BSEL_A1 |
  70. 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_LF_A1,
  71. 1 * TSL_SDW_A1 | 2 * TSL_BSEL_A1 |
  72. 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1,
  73. 0 * TSL_SDW_A1 | 3 * TSL_BSEL_A1 |
  74. 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1,
  75. 0 * TSL_SDW_A1 | 2 * TSL_BSEL_A1 |
  76. 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1,
  77. 1 * TSL_SDW_A1 | 1 * TSL_BSEL_A1 |
  78. 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0,
  79. 1 * TSL_SDW_A1 | 0 * TSL_BSEL_A1 |
  80. 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0,
  81. 0 * TSL_SDW_A1 | 1 * TSL_BSEL_A1 |
  82. 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0,
  83. 0 * TSL_SDW_A1 | 0 * TSL_BSEL_A1 | 0 * TSL_DIS_A1 |
  84. 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0 | TSL_SF_A1 | TSL_EOS,
  85. };
  86. static int tsl2[8] = {
  87. 0 * TSL_SDW_A2 | 3 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_LF_A2,
  88. 0 * TSL_SDW_A2 | 2 * TSL_BSEL_A2 | 2 * TSL_DOD_A2,
  89. 0 * TSL_SDW_A2 | 3 * TSL_BSEL_A2 | 2 * TSL_DOD_A2,
  90. 0 * TSL_SDW_A2 | 2 * TSL_BSEL_A2 | 2 * TSL_DOD_A2,
  91. 0 * TSL_SDW_A2 | 1 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2,
  92. 0 * TSL_SDW_A2 | 0 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2,
  93. 0 * TSL_SDW_A2 | 1 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2,
  94. 0 * TSL_SDW_A2 | 0 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2 | TSL_EOS
  95. };