hdac_ext_controller.c 7.4 KB

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  1. /*
  2. * hdac-ext-controller.c - HD-audio extended controller functions.
  3. *
  4. * Copyright (C) 2014-2015 Intel Corp
  5. * Author: Jeeja KP <jeeja.kp@intel.com>
  6. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/slab.h>
  21. #include <sound/hda_register.h>
  22. #include <sound/hdaudio_ext.h>
  23. /*
  24. * maximum HDAC capablities we should parse to avoid endless looping:
  25. * currently we have 4 extended caps, so this is future proof for now.
  26. * extend when this limit is seen meeting in real HW
  27. */
  28. #define HDAC_MAX_CAPS 10
  29. /**
  30. * snd_hdac_ext_bus_parse_capabilities - parse capablity structure
  31. * @ebus: the pointer to extended bus object
  32. *
  33. * Returns 0 if successful, or a negative error code.
  34. */
  35. int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus)
  36. {
  37. unsigned int cur_cap;
  38. unsigned int offset;
  39. struct hdac_bus *bus = &ebus->bus;
  40. unsigned int counter = 0;
  41. offset = snd_hdac_chip_readl(bus, LLCH);
  42. if (offset < 0)
  43. return -EIO;
  44. /* Lets walk the linked capabilities list */
  45. do {
  46. cur_cap = _snd_hdac_chip_read(l, bus, offset);
  47. if (cur_cap < 0)
  48. return -EIO;
  49. dev_dbg(bus->dev, "Capability version: 0x%x\n",
  50. ((cur_cap & AZX_CAP_HDR_VER_MASK) >> AZX_CAP_HDR_VER_OFF));
  51. dev_dbg(bus->dev, "HDA capability ID: 0x%x\n",
  52. (cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF);
  53. switch ((cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF) {
  54. case AZX_ML_CAP_ID:
  55. dev_dbg(bus->dev, "Found ML capability\n");
  56. ebus->mlcap = bus->remap_addr + offset;
  57. break;
  58. case AZX_GTS_CAP_ID:
  59. dev_dbg(bus->dev, "Found GTS capability offset=%x\n", offset);
  60. ebus->gtscap = bus->remap_addr + offset;
  61. break;
  62. case AZX_PP_CAP_ID:
  63. /* PP capability found, the Audio DSP is present */
  64. dev_dbg(bus->dev, "Found PP capability offset=%x\n", offset);
  65. ebus->ppcap = bus->remap_addr + offset;
  66. break;
  67. case AZX_SPB_CAP_ID:
  68. /* SPIB capability found, handler function */
  69. dev_dbg(bus->dev, "Found SPB capability\n");
  70. ebus->spbcap = bus->remap_addr + offset;
  71. break;
  72. default:
  73. dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap);
  74. break;
  75. }
  76. counter++;
  77. if (counter > HDAC_MAX_CAPS) {
  78. dev_err(bus->dev, "We exceeded HDAC Ext capablities!!!\n");
  79. break;
  80. }
  81. /* read the offset of next capabiity */
  82. offset = cur_cap & AZX_CAP_HDR_NXT_PTR_MASK;
  83. } while (offset);
  84. return 0;
  85. }
  86. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_parse_capabilities);
  87. /*
  88. * processing pipe helpers - these helpers are useful for dealing with HDA
  89. * new capability of processing pipelines
  90. */
  91. /**
  92. * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
  93. * @ebus: HD-audio extended core bus
  94. * @enable: flag to turn on/off the capability
  95. */
  96. void snd_hdac_ext_bus_ppcap_enable(struct hdac_ext_bus *ebus, bool enable)
  97. {
  98. struct hdac_bus *bus = &ebus->bus;
  99. if (!ebus->ppcap) {
  100. dev_err(bus->dev, "Address of PP capability is NULL");
  101. return;
  102. }
  103. if (enable)
  104. snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_GPROCEN);
  105. else
  106. snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_GPROCEN, 0);
  107. }
  108. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
  109. /**
  110. * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
  111. * @ebus: HD-audio extended core bus
  112. * @enable: flag to enable/disable interrupt
  113. */
  114. void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_ext_bus *ebus, bool enable)
  115. {
  116. struct hdac_bus *bus = &ebus->bus;
  117. if (!ebus->ppcap) {
  118. dev_err(bus->dev, "Address of PP capability is NULL\n");
  119. return;
  120. }
  121. if (enable)
  122. snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_PIE);
  123. else
  124. snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_PIE, 0);
  125. }
  126. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
  127. /*
  128. * Multilink helpers - these helpers are useful for dealing with HDA
  129. * new multilink capability
  130. */
  131. /**
  132. * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
  133. * @ebus: HD-audio extended core bus
  134. *
  135. * This will parse all links and read the mlink capabilities and add them
  136. * in hlink_list of extended hdac bus
  137. * Note: this will be freed on bus exit by driver
  138. */
  139. int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
  140. {
  141. int idx;
  142. u32 link_count;
  143. struct hdac_ext_link *hlink;
  144. struct hdac_bus *bus = &ebus->bus;
  145. link_count = readl(ebus->mlcap + AZX_REG_ML_MLCD) + 1;
  146. dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
  147. for (idx = 0; idx < link_count; idx++) {
  148. hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
  149. if (!hlink)
  150. return -ENOMEM;
  151. hlink->index = idx;
  152. hlink->bus = bus;
  153. hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
  154. (AZX_ML_INTERVAL * idx);
  155. hlink->lcaps = snd_hdac_chip_readl(bus, ML_LCAP);
  156. hlink->lsdiid = snd_hdac_chip_readw(bus, ML_LSDIID);
  157. list_add_tail(&hlink->list, &ebus->hlink_list);
  158. }
  159. return 0;
  160. }
  161. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
  162. /**
  163. * snd_hdac_link_free_all- free hdac extended link objects
  164. *
  165. * @ebus: HD-audio ext core bus
  166. */
  167. void snd_hdac_link_free_all(struct hdac_ext_bus *ebus)
  168. {
  169. struct hdac_ext_link *l;
  170. while (!list_empty(&ebus->hlink_list)) {
  171. l = list_first_entry(&ebus->hlink_list, struct hdac_ext_link, list);
  172. list_del(&l->list);
  173. kfree(l);
  174. }
  175. }
  176. EXPORT_SYMBOL_GPL(snd_hdac_link_free_all);
  177. /**
  178. * snd_hdac_ext_bus_get_link_index - get link based on codec name
  179. * @ebus: HD-audio extended core bus
  180. * @codec_name: codec name
  181. */
  182. struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_ext_bus *ebus,
  183. const char *codec_name)
  184. {
  185. int i;
  186. struct hdac_ext_link *hlink = NULL;
  187. int bus_idx, addr;
  188. if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
  189. return NULL;
  190. if (ebus->idx != bus_idx)
  191. return NULL;
  192. list_for_each_entry(hlink, &ebus->hlink_list, list) {
  193. for (i = 0; i < HDA_MAX_CODECS; i++) {
  194. if (hlink->lsdiid & (0x1 << addr))
  195. return hlink;
  196. }
  197. }
  198. return NULL;
  199. }
  200. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_link);
  201. static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
  202. {
  203. int timeout;
  204. u32 val;
  205. int mask = (1 << AZX_MLCTL_CPA);
  206. udelay(3);
  207. timeout = 50;
  208. do {
  209. val = snd_hdac_chip_readl(link->bus, ML_LCTL);
  210. if (enable) {
  211. if (((val & mask) >> AZX_MLCTL_CPA))
  212. return 0;
  213. } else {
  214. if (!((val & mask) >> AZX_MLCTL_CPA))
  215. return 0;
  216. }
  217. udelay(3);
  218. } while (--timeout);
  219. return -EIO;
  220. }
  221. /**
  222. * snd_hdac_ext_bus_link_power_up -power up hda link
  223. * @link: HD-audio extended link
  224. */
  225. int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
  226. {
  227. snd_hdac_chip_updatel(link->bus, ML_LCTL, 0, AZX_MLCTL_SPA);
  228. return check_hdac_link_power_active(link, true);
  229. }
  230. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
  231. /**
  232. * snd_hdac_ext_bus_link_power_down -power down hda link
  233. * @link: HD-audio extended link
  234. */
  235. int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
  236. {
  237. snd_hdac_chip_updatel(link->bus, ML_LCTL, AZX_MLCTL_SPA, 0);
  238. return check_hdac_link_power_active(link, false);
  239. }
  240. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);