vmwgfx_drm.h 30 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #ifndef __VMWGFX_DRM_H__
  28. #define __VMWGFX_DRM_H__
  29. #ifndef __KERNEL__
  30. #include <drm/drm.h>
  31. #endif
  32. #define DRM_VMW_MAX_SURFACE_FACES 6
  33. #define DRM_VMW_MAX_MIP_LEVELS 24
  34. #define DRM_VMW_GET_PARAM 0
  35. #define DRM_VMW_ALLOC_DMABUF 1
  36. #define DRM_VMW_UNREF_DMABUF 2
  37. #define DRM_VMW_CURSOR_BYPASS 3
  38. /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
  39. #define DRM_VMW_CONTROL_STREAM 4
  40. #define DRM_VMW_CLAIM_STREAM 5
  41. #define DRM_VMW_UNREF_STREAM 6
  42. /* guarded by DRM_VMW_PARAM_3D == 1 */
  43. #define DRM_VMW_CREATE_CONTEXT 7
  44. #define DRM_VMW_UNREF_CONTEXT 8
  45. #define DRM_VMW_CREATE_SURFACE 9
  46. #define DRM_VMW_UNREF_SURFACE 10
  47. #define DRM_VMW_REF_SURFACE 11
  48. #define DRM_VMW_EXECBUF 12
  49. #define DRM_VMW_GET_3D_CAP 13
  50. #define DRM_VMW_FENCE_WAIT 14
  51. #define DRM_VMW_FENCE_SIGNALED 15
  52. #define DRM_VMW_FENCE_UNREF 16
  53. #define DRM_VMW_FENCE_EVENT 17
  54. #define DRM_VMW_PRESENT 18
  55. #define DRM_VMW_PRESENT_READBACK 19
  56. #define DRM_VMW_UPDATE_LAYOUT 20
  57. #define DRM_VMW_CREATE_SHADER 21
  58. #define DRM_VMW_UNREF_SHADER 22
  59. #define DRM_VMW_GB_SURFACE_CREATE 23
  60. #define DRM_VMW_GB_SURFACE_REF 24
  61. #define DRM_VMW_SYNCCPU 25
  62. /*************************************************************************/
  63. /**
  64. * DRM_VMW_GET_PARAM - get device information.
  65. *
  66. * DRM_VMW_PARAM_FIFO_OFFSET:
  67. * Offset to use to map the first page of the FIFO read-only.
  68. * The fifo is mapped using the mmap() system call on the drm device.
  69. *
  70. * DRM_VMW_PARAM_OVERLAY_IOCTL:
  71. * Does the driver support the overlay ioctl.
  72. */
  73. #define DRM_VMW_PARAM_NUM_STREAMS 0
  74. #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
  75. #define DRM_VMW_PARAM_3D 2
  76. #define DRM_VMW_PARAM_HW_CAPS 3
  77. #define DRM_VMW_PARAM_FIFO_CAPS 4
  78. #define DRM_VMW_PARAM_MAX_FB_SIZE 5
  79. #define DRM_VMW_PARAM_FIFO_HW_VERSION 6
  80. #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7
  81. #define DRM_VMW_PARAM_3D_CAPS_SIZE 8
  82. #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9
  83. #define DRM_VMW_PARAM_MAX_MOB_SIZE 10
  84. /**
  85. * enum drm_vmw_handle_type - handle type for ref ioctls
  86. *
  87. */
  88. enum drm_vmw_handle_type {
  89. DRM_VMW_HANDLE_LEGACY = 0,
  90. DRM_VMW_HANDLE_PRIME = 1
  91. };
  92. /**
  93. * struct drm_vmw_getparam_arg
  94. *
  95. * @value: Returned value. //Out
  96. * @param: Parameter to query. //In.
  97. *
  98. * Argument to the DRM_VMW_GET_PARAM Ioctl.
  99. */
  100. struct drm_vmw_getparam_arg {
  101. uint64_t value;
  102. uint32_t param;
  103. uint32_t pad64;
  104. };
  105. /*************************************************************************/
  106. /**
  107. * DRM_VMW_CREATE_CONTEXT - Create a host context.
  108. *
  109. * Allocates a device unique context id, and queues a create context command
  110. * for the host. Does not wait for host completion.
  111. */
  112. /**
  113. * struct drm_vmw_context_arg
  114. *
  115. * @cid: Device unique context ID.
  116. *
  117. * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  118. * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  119. */
  120. struct drm_vmw_context_arg {
  121. int32_t cid;
  122. uint32_t pad64;
  123. };
  124. /*************************************************************************/
  125. /**
  126. * DRM_VMW_UNREF_CONTEXT - Create a host context.
  127. *
  128. * Frees a global context id, and queues a destroy host command for the host.
  129. * Does not wait for host completion. The context ID can be used directly
  130. * in the command stream and shows up as the same context ID on the host.
  131. */
  132. /*************************************************************************/
  133. /**
  134. * DRM_VMW_CREATE_SURFACE - Create a host suface.
  135. *
  136. * Allocates a device unique surface id, and queues a create surface command
  137. * for the host. Does not wait for host completion. The surface ID can be
  138. * used directly in the command stream and shows up as the same surface
  139. * ID on the host.
  140. */
  141. /**
  142. * struct drm_wmv_surface_create_req
  143. *
  144. * @flags: Surface flags as understood by the host.
  145. * @format: Surface format as understood by the host.
  146. * @mip_levels: Number of mip levels for each face.
  147. * An unused face should have 0 encoded.
  148. * @size_addr: Address of a user-space array of sruct drm_vmw_size
  149. * cast to an uint64_t for 32-64 bit compatibility.
  150. * The size of the array should equal the total number of mipmap levels.
  151. * @shareable: Boolean whether other clients (as identified by file descriptors)
  152. * may reference this surface.
  153. * @scanout: Boolean whether the surface is intended to be used as a
  154. * scanout.
  155. *
  156. * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
  157. * Output data from the DRM_VMW_REF_SURFACE Ioctl.
  158. */
  159. struct drm_vmw_surface_create_req {
  160. uint32_t flags;
  161. uint32_t format;
  162. uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
  163. uint64_t size_addr;
  164. int32_t shareable;
  165. int32_t scanout;
  166. };
  167. /**
  168. * struct drm_wmv_surface_arg
  169. *
  170. * @sid: Surface id of created surface or surface to destroy or reference.
  171. * @handle_type: Handle type for DRM_VMW_REF_SURFACE Ioctl.
  172. *
  173. * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
  174. * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
  175. * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
  176. */
  177. struct drm_vmw_surface_arg {
  178. int32_t sid;
  179. enum drm_vmw_handle_type handle_type;
  180. };
  181. /**
  182. * struct drm_vmw_size ioctl.
  183. *
  184. * @width - mip level width
  185. * @height - mip level height
  186. * @depth - mip level depth
  187. *
  188. * Description of a mip level.
  189. * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
  190. */
  191. struct drm_vmw_size {
  192. uint32_t width;
  193. uint32_t height;
  194. uint32_t depth;
  195. uint32_t pad64;
  196. };
  197. /**
  198. * union drm_vmw_surface_create_arg
  199. *
  200. * @rep: Output data as described above.
  201. * @req: Input data as described above.
  202. *
  203. * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
  204. */
  205. union drm_vmw_surface_create_arg {
  206. struct drm_vmw_surface_arg rep;
  207. struct drm_vmw_surface_create_req req;
  208. };
  209. /*************************************************************************/
  210. /**
  211. * DRM_VMW_REF_SURFACE - Reference a host surface.
  212. *
  213. * Puts a reference on a host surface with a give sid, as previously
  214. * returned by the DRM_VMW_CREATE_SURFACE ioctl.
  215. * A reference will make sure the surface isn't destroyed while we hold
  216. * it and will allow the calling client to use the surface ID in the command
  217. * stream.
  218. *
  219. * On successful return, the Ioctl returns the surface information given
  220. * in the DRM_VMW_CREATE_SURFACE ioctl.
  221. */
  222. /**
  223. * union drm_vmw_surface_reference_arg
  224. *
  225. * @rep: Output data as described above.
  226. * @req: Input data as described above.
  227. *
  228. * Argument to the DRM_VMW_REF_SURFACE Ioctl.
  229. */
  230. union drm_vmw_surface_reference_arg {
  231. struct drm_vmw_surface_create_req rep;
  232. struct drm_vmw_surface_arg req;
  233. };
  234. /*************************************************************************/
  235. /**
  236. * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
  237. *
  238. * Clear a reference previously put on a host surface.
  239. * When all references are gone, including the one implicitly placed
  240. * on creation,
  241. * a destroy surface command will be queued for the host.
  242. * Does not wait for completion.
  243. */
  244. /*************************************************************************/
  245. /**
  246. * DRM_VMW_EXECBUF
  247. *
  248. * Submit a command buffer for execution on the host, and return a
  249. * fence seqno that when signaled, indicates that the command buffer has
  250. * executed.
  251. */
  252. /**
  253. * struct drm_vmw_execbuf_arg
  254. *
  255. * @commands: User-space address of a command buffer cast to an uint64_t.
  256. * @command-size: Size in bytes of the command buffer.
  257. * @throttle-us: Sleep until software is less than @throttle_us
  258. * microseconds ahead of hardware. The driver may round this value
  259. * to the nearest kernel tick.
  260. * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
  261. * uint64_t.
  262. * @version: Allows expanding the execbuf ioctl parameters without breaking
  263. * backwards compatibility, since user-space will always tell the kernel
  264. * which version it uses.
  265. * @flags: Execbuf flags. None currently.
  266. *
  267. * Argument to the DRM_VMW_EXECBUF Ioctl.
  268. */
  269. #define DRM_VMW_EXECBUF_VERSION 1
  270. struct drm_vmw_execbuf_arg {
  271. uint64_t commands;
  272. uint32_t command_size;
  273. uint32_t throttle_us;
  274. uint64_t fence_rep;
  275. uint32_t version;
  276. uint32_t flags;
  277. };
  278. /**
  279. * struct drm_vmw_fence_rep
  280. *
  281. * @handle: Fence object handle for fence associated with a command submission.
  282. * @mask: Fence flags relevant for this fence object.
  283. * @seqno: Fence sequence number in fifo. A fence object with a lower
  284. * seqno will signal the EXEC flag before a fence object with a higher
  285. * seqno. This can be used by user-space to avoid kernel calls to determine
  286. * whether a fence has signaled the EXEC flag. Note that @seqno will
  287. * wrap at 32-bit.
  288. * @passed_seqno: The highest seqno number processed by the hardware
  289. * so far. This can be used to mark user-space fence objects as signaled, and
  290. * to determine whether a fence seqno might be stale.
  291. * @error: This member should've been set to -EFAULT on submission.
  292. * The following actions should be take on completion:
  293. * error == -EFAULT: Fence communication failed. The host is synchronized.
  294. * Use the last fence id read from the FIFO fence register.
  295. * error != 0 && error != -EFAULT:
  296. * Fence submission failed. The host is synchronized. Use the fence_seq member.
  297. * error == 0: All is OK, The host may not be synchronized.
  298. * Use the fence_seq member.
  299. *
  300. * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
  301. */
  302. struct drm_vmw_fence_rep {
  303. uint32_t handle;
  304. uint32_t mask;
  305. uint32_t seqno;
  306. uint32_t passed_seqno;
  307. uint32_t pad64;
  308. int32_t error;
  309. };
  310. /*************************************************************************/
  311. /**
  312. * DRM_VMW_ALLOC_DMABUF
  313. *
  314. * Allocate a DMA buffer that is visible also to the host.
  315. * NOTE: The buffer is
  316. * identified by a handle and an offset, which are private to the guest, but
  317. * useable in the command stream. The guest kernel may translate these
  318. * and patch up the command stream accordingly. In the future, the offset may
  319. * be zero at all times, or it may disappear from the interface before it is
  320. * fixed.
  321. *
  322. * The DMA buffer may stay user-space mapped in the guest at all times,
  323. * and is thus suitable for sub-allocation.
  324. *
  325. * DMA buffers are mapped using the mmap() syscall on the drm device.
  326. */
  327. /**
  328. * struct drm_vmw_alloc_dmabuf_req
  329. *
  330. * @size: Required minimum size of the buffer.
  331. *
  332. * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
  333. */
  334. struct drm_vmw_alloc_dmabuf_req {
  335. uint32_t size;
  336. uint32_t pad64;
  337. };
  338. /**
  339. * struct drm_vmw_dmabuf_rep
  340. *
  341. * @map_handle: Offset to use in the mmap() call used to map the buffer.
  342. * @handle: Handle unique to this buffer. Used for unreferencing.
  343. * @cur_gmr_id: GMR id to use in the command stream when this buffer is
  344. * referenced. See not above.
  345. * @cur_gmr_offset: Offset to use in the command stream when this buffer is
  346. * referenced. See note above.
  347. *
  348. * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
  349. */
  350. struct drm_vmw_dmabuf_rep {
  351. uint64_t map_handle;
  352. uint32_t handle;
  353. uint32_t cur_gmr_id;
  354. uint32_t cur_gmr_offset;
  355. uint32_t pad64;
  356. };
  357. /**
  358. * union drm_vmw_dmabuf_arg
  359. *
  360. * @req: Input data as described above.
  361. * @rep: Output data as described above.
  362. *
  363. * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
  364. */
  365. union drm_vmw_alloc_dmabuf_arg {
  366. struct drm_vmw_alloc_dmabuf_req req;
  367. struct drm_vmw_dmabuf_rep rep;
  368. };
  369. /*************************************************************************/
  370. /**
  371. * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
  372. *
  373. */
  374. /**
  375. * struct drm_vmw_unref_dmabuf_arg
  376. *
  377. * @handle: Handle indicating what buffer to free. Obtained from the
  378. * DRM_VMW_ALLOC_DMABUF Ioctl.
  379. *
  380. * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
  381. */
  382. struct drm_vmw_unref_dmabuf_arg {
  383. uint32_t handle;
  384. uint32_t pad64;
  385. };
  386. /*************************************************************************/
  387. /**
  388. * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
  389. *
  390. * This IOCTL controls the overlay units of the svga device.
  391. * The SVGA overlay units does not work like regular hardware units in
  392. * that they do not automaticaly read back the contents of the given dma
  393. * buffer. But instead only read back for each call to this ioctl, and
  394. * at any point between this call being made and a following call that
  395. * either changes the buffer or disables the stream.
  396. */
  397. /**
  398. * struct drm_vmw_rect
  399. *
  400. * Defines a rectangle. Used in the overlay ioctl to define
  401. * source and destination rectangle.
  402. */
  403. struct drm_vmw_rect {
  404. int32_t x;
  405. int32_t y;
  406. uint32_t w;
  407. uint32_t h;
  408. };
  409. /**
  410. * struct drm_vmw_control_stream_arg
  411. *
  412. * @stream_id: Stearm to control
  413. * @enabled: If false all following arguments are ignored.
  414. * @handle: Handle to buffer for getting data from.
  415. * @format: Format of the overlay as understood by the host.
  416. * @width: Width of the overlay.
  417. * @height: Height of the overlay.
  418. * @size: Size of the overlay in bytes.
  419. * @pitch: Array of pitches, the two last are only used for YUV12 formats.
  420. * @offset: Offset from start of dma buffer to overlay.
  421. * @src: Source rect, must be within the defined area above.
  422. * @dst: Destination rect, x and y may be negative.
  423. *
  424. * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
  425. */
  426. struct drm_vmw_control_stream_arg {
  427. uint32_t stream_id;
  428. uint32_t enabled;
  429. uint32_t flags;
  430. uint32_t color_key;
  431. uint32_t handle;
  432. uint32_t offset;
  433. int32_t format;
  434. uint32_t size;
  435. uint32_t width;
  436. uint32_t height;
  437. uint32_t pitch[3];
  438. uint32_t pad64;
  439. struct drm_vmw_rect src;
  440. struct drm_vmw_rect dst;
  441. };
  442. /*************************************************************************/
  443. /**
  444. * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
  445. *
  446. */
  447. #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
  448. #define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
  449. /**
  450. * struct drm_vmw_cursor_bypass_arg
  451. *
  452. * @flags: Flags.
  453. * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
  454. * @xpos: X position of cursor.
  455. * @ypos: Y position of cursor.
  456. * @xhot: X hotspot.
  457. * @yhot: Y hotspot.
  458. *
  459. * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
  460. */
  461. struct drm_vmw_cursor_bypass_arg {
  462. uint32_t flags;
  463. uint32_t crtc_id;
  464. int32_t xpos;
  465. int32_t ypos;
  466. int32_t xhot;
  467. int32_t yhot;
  468. };
  469. /*************************************************************************/
  470. /**
  471. * DRM_VMW_CLAIM_STREAM - Claim a single stream.
  472. */
  473. /**
  474. * struct drm_vmw_context_arg
  475. *
  476. * @stream_id: Device unique context ID.
  477. *
  478. * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  479. * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  480. */
  481. struct drm_vmw_stream_arg {
  482. uint32_t stream_id;
  483. uint32_t pad64;
  484. };
  485. /*************************************************************************/
  486. /**
  487. * DRM_VMW_UNREF_STREAM - Unclaim a stream.
  488. *
  489. * Return a single stream that was claimed by this process. Also makes
  490. * sure that the stream has been stopped.
  491. */
  492. /*************************************************************************/
  493. /**
  494. * DRM_VMW_GET_3D_CAP
  495. *
  496. * Read 3D capabilities from the FIFO
  497. *
  498. */
  499. /**
  500. * struct drm_vmw_get_3d_cap_arg
  501. *
  502. * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
  503. * @size: Max size to copy
  504. *
  505. * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
  506. * ioctls.
  507. */
  508. struct drm_vmw_get_3d_cap_arg {
  509. uint64_t buffer;
  510. uint32_t max_size;
  511. uint32_t pad64;
  512. };
  513. /*************************************************************************/
  514. /**
  515. * DRM_VMW_FENCE_WAIT
  516. *
  517. * Waits for a fence object to signal. The wait is interruptible, so that
  518. * signals may be delivered during the interrupt. The wait may timeout,
  519. * in which case the calls returns -EBUSY. If the wait is restarted,
  520. * that is restarting without resetting @cookie_valid to zero,
  521. * the timeout is computed from the first call.
  522. *
  523. * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
  524. * on:
  525. * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
  526. * stream
  527. * have executed.
  528. * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
  529. * commands
  530. * in the buffer given to the EXECBUF ioctl returning the fence object handle
  531. * are available to user-space.
  532. *
  533. * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
  534. * fenc wait ioctl returns 0, the fence object has been unreferenced after
  535. * the wait.
  536. */
  537. #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
  538. #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
  539. #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
  540. /**
  541. * struct drm_vmw_fence_wait_arg
  542. *
  543. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  544. * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
  545. * @kernel_cookie: Set to 0 on first call. Left alone on restart.
  546. * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
  547. * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
  548. * before returning.
  549. * @flags: Fence flags to wait on.
  550. * @wait_options: Options that control the behaviour of the wait ioctl.
  551. *
  552. * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
  553. */
  554. struct drm_vmw_fence_wait_arg {
  555. uint32_t handle;
  556. int32_t cookie_valid;
  557. uint64_t kernel_cookie;
  558. uint64_t timeout_us;
  559. int32_t lazy;
  560. int32_t flags;
  561. int32_t wait_options;
  562. int32_t pad64;
  563. };
  564. /*************************************************************************/
  565. /**
  566. * DRM_VMW_FENCE_SIGNALED
  567. *
  568. * Checks if a fence object is signaled..
  569. */
  570. /**
  571. * struct drm_vmw_fence_signaled_arg
  572. *
  573. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  574. * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
  575. * @signaled: Out: Flags signaled.
  576. * @sequence: Out: Highest sequence passed so far. Can be used to signal the
  577. * EXEC flag of user-space fence objects.
  578. *
  579. * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
  580. * ioctls.
  581. */
  582. struct drm_vmw_fence_signaled_arg {
  583. uint32_t handle;
  584. uint32_t flags;
  585. int32_t signaled;
  586. uint32_t passed_seqno;
  587. uint32_t signaled_flags;
  588. uint32_t pad64;
  589. };
  590. /*************************************************************************/
  591. /**
  592. * DRM_VMW_FENCE_UNREF
  593. *
  594. * Unreferences a fence object, and causes it to be destroyed if there are no
  595. * other references to it.
  596. *
  597. */
  598. /**
  599. * struct drm_vmw_fence_arg
  600. *
  601. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  602. *
  603. * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
  604. */
  605. struct drm_vmw_fence_arg {
  606. uint32_t handle;
  607. uint32_t pad64;
  608. };
  609. /*************************************************************************/
  610. /**
  611. * DRM_VMW_FENCE_EVENT
  612. *
  613. * Queues an event on a fence to be delivered on the drm character device
  614. * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
  615. * Optionally the approximate time when the fence signaled is
  616. * given by the event.
  617. */
  618. /*
  619. * The event type
  620. */
  621. #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
  622. struct drm_vmw_event_fence {
  623. struct drm_event base;
  624. uint64_t user_data;
  625. uint32_t tv_sec;
  626. uint32_t tv_usec;
  627. };
  628. /*
  629. * Flags that may be given to the command.
  630. */
  631. /* Request fence signaled time on the event. */
  632. #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
  633. /**
  634. * struct drm_vmw_fence_event_arg
  635. *
  636. * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
  637. * the fence is not supposed to be referenced by user-space.
  638. * @user_info: Info to be delivered with the event.
  639. * @handle: Attach the event to this fence only.
  640. * @flags: A set of flags as defined above.
  641. */
  642. struct drm_vmw_fence_event_arg {
  643. uint64_t fence_rep;
  644. uint64_t user_data;
  645. uint32_t handle;
  646. uint32_t flags;
  647. };
  648. /*************************************************************************/
  649. /**
  650. * DRM_VMW_PRESENT
  651. *
  652. * Executes an SVGA present on a given fb for a given surface. The surface
  653. * is placed on the framebuffer. Cliprects are given relative to the given
  654. * point (the point disignated by dest_{x|y}).
  655. *
  656. */
  657. /**
  658. * struct drm_vmw_present_arg
  659. * @fb_id: framebuffer id to present / read back from.
  660. * @sid: Surface id to present from.
  661. * @dest_x: X placement coordinate for surface.
  662. * @dest_y: Y placement coordinate for surface.
  663. * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  664. * @num_clips: Number of cliprects given relative to the framebuffer origin,
  665. * in the same coordinate space as the frame buffer.
  666. * @pad64: Unused 64-bit padding.
  667. *
  668. * Input argument to the DRM_VMW_PRESENT ioctl.
  669. */
  670. struct drm_vmw_present_arg {
  671. uint32_t fb_id;
  672. uint32_t sid;
  673. int32_t dest_x;
  674. int32_t dest_y;
  675. uint64_t clips_ptr;
  676. uint32_t num_clips;
  677. uint32_t pad64;
  678. };
  679. /*************************************************************************/
  680. /**
  681. * DRM_VMW_PRESENT_READBACK
  682. *
  683. * Executes an SVGA present readback from a given fb to the dma buffer
  684. * currently bound as the fb. If there is no dma buffer bound to the fb,
  685. * an error will be returned.
  686. *
  687. */
  688. /**
  689. * struct drm_vmw_present_arg
  690. * @fb_id: fb_id to present / read back from.
  691. * @num_clips: Number of cliprects.
  692. * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  693. * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
  694. * If this member is NULL, then the ioctl should not return a fence.
  695. */
  696. struct drm_vmw_present_readback_arg {
  697. uint32_t fb_id;
  698. uint32_t num_clips;
  699. uint64_t clips_ptr;
  700. uint64_t fence_rep;
  701. };
  702. /*************************************************************************/
  703. /**
  704. * DRM_VMW_UPDATE_LAYOUT - Update layout
  705. *
  706. * Updates the preferred modes and connection status for connectors. The
  707. * command consists of one drm_vmw_update_layout_arg pointing to an array
  708. * of num_outputs drm_vmw_rect's.
  709. */
  710. /**
  711. * struct drm_vmw_update_layout_arg
  712. *
  713. * @num_outputs: number of active connectors
  714. * @rects: pointer to array of drm_vmw_rect cast to an uint64_t
  715. *
  716. * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
  717. */
  718. struct drm_vmw_update_layout_arg {
  719. uint32_t num_outputs;
  720. uint32_t pad64;
  721. uint64_t rects;
  722. };
  723. /*************************************************************************/
  724. /**
  725. * DRM_VMW_CREATE_SHADER - Create shader
  726. *
  727. * Creates a shader and optionally binds it to a dma buffer containing
  728. * the shader byte-code.
  729. */
  730. /**
  731. * enum drm_vmw_shader_type - Shader types
  732. */
  733. enum drm_vmw_shader_type {
  734. drm_vmw_shader_type_vs = 0,
  735. drm_vmw_shader_type_ps,
  736. drm_vmw_shader_type_gs
  737. };
  738. /**
  739. * struct drm_vmw_shader_create_arg
  740. *
  741. * @shader_type: Shader type of the shader to create.
  742. * @size: Size of the byte-code in bytes.
  743. * where the shader byte-code starts
  744. * @buffer_handle: Buffer handle identifying the buffer containing the
  745. * shader byte-code
  746. * @shader_handle: On successful completion contains a handle that
  747. * can be used to subsequently identify the shader.
  748. * @offset: Offset in bytes into the buffer given by @buffer_handle,
  749. *
  750. * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl.
  751. */
  752. struct drm_vmw_shader_create_arg {
  753. enum drm_vmw_shader_type shader_type;
  754. uint32_t size;
  755. uint32_t buffer_handle;
  756. uint32_t shader_handle;
  757. uint64_t offset;
  758. };
  759. /*************************************************************************/
  760. /**
  761. * DRM_VMW_UNREF_SHADER - Unreferences a shader
  762. *
  763. * Destroys a user-space reference to a shader, optionally destroying
  764. * it.
  765. */
  766. /**
  767. * struct drm_vmw_shader_arg
  768. *
  769. * @handle: Handle identifying the shader to destroy.
  770. *
  771. * Input argument to the DRM_VMW_UNREF_SHADER ioctl.
  772. */
  773. struct drm_vmw_shader_arg {
  774. uint32_t handle;
  775. uint32_t pad64;
  776. };
  777. /*************************************************************************/
  778. /**
  779. * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface.
  780. *
  781. * Allocates a surface handle and queues a create surface command
  782. * for the host on the first use of the surface. The surface ID can
  783. * be used as the surface ID in commands referencing the surface.
  784. */
  785. /**
  786. * enum drm_vmw_surface_flags
  787. *
  788. * @drm_vmw_surface_flag_shareable: Whether the surface is shareable
  789. * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout
  790. * surface.
  791. * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is
  792. * given.
  793. */
  794. enum drm_vmw_surface_flags {
  795. drm_vmw_surface_flag_shareable = (1 << 0),
  796. drm_vmw_surface_flag_scanout = (1 << 1),
  797. drm_vmw_surface_flag_create_buffer = (1 << 2)
  798. };
  799. /**
  800. * struct drm_vmw_gb_surface_create_req
  801. *
  802. * @svga3d_flags: SVGA3d surface flags for the device.
  803. * @format: SVGA3d format.
  804. * @mip_level: Number of mip levels for all faces.
  805. * @drm_surface_flags Flags as described above.
  806. * @multisample_count Future use. Set to 0.
  807. * @autogen_filter Future use. Set to 0.
  808. * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID
  809. * if none.
  810. * @base_size Size of the base mip level for all faces.
  811. *
  812. * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl.
  813. * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl.
  814. */
  815. struct drm_vmw_gb_surface_create_req {
  816. uint32_t svga3d_flags;
  817. uint32_t format;
  818. uint32_t mip_levels;
  819. enum drm_vmw_surface_flags drm_surface_flags;
  820. uint32_t multisample_count;
  821. uint32_t autogen_filter;
  822. uint32_t buffer_handle;
  823. uint32_t pad64;
  824. struct drm_vmw_size base_size;
  825. };
  826. /**
  827. * struct drm_vmw_gb_surface_create_rep
  828. *
  829. * @handle: Surface handle.
  830. * @backup_size: Size of backup buffers for this surface.
  831. * @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none.
  832. * @buffer_size: Actual size of the buffer identified by
  833. * @buffer_handle
  834. * @buffer_map_handle: Offset into device address space for the buffer
  835. * identified by @buffer_handle.
  836. *
  837. * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl.
  838. * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl.
  839. */
  840. struct drm_vmw_gb_surface_create_rep {
  841. uint32_t handle;
  842. uint32_t backup_size;
  843. uint32_t buffer_handle;
  844. uint32_t buffer_size;
  845. uint64_t buffer_map_handle;
  846. };
  847. /**
  848. * union drm_vmw_gb_surface_create_arg
  849. *
  850. * @req: Input argument as described above.
  851. * @rep: Output argument as described above.
  852. *
  853. * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl.
  854. */
  855. union drm_vmw_gb_surface_create_arg {
  856. struct drm_vmw_gb_surface_create_rep rep;
  857. struct drm_vmw_gb_surface_create_req req;
  858. };
  859. /*************************************************************************/
  860. /**
  861. * DRM_VMW_GB_SURFACE_REF - Reference a host surface.
  862. *
  863. * Puts a reference on a host surface with a given handle, as previously
  864. * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl.
  865. * A reference will make sure the surface isn't destroyed while we hold
  866. * it and will allow the calling client to use the surface handle in
  867. * the command stream.
  868. *
  869. * On successful return, the Ioctl returns the surface information given
  870. * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl.
  871. */
  872. /**
  873. * struct drm_vmw_gb_surface_reference_arg
  874. *
  875. * @creq: The data used as input when the surface was created, as described
  876. * above at "struct drm_vmw_gb_surface_create_req"
  877. * @crep: Additional data output when the surface was created, as described
  878. * above at "struct drm_vmw_gb_surface_create_rep"
  879. *
  880. * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl.
  881. */
  882. struct drm_vmw_gb_surface_ref_rep {
  883. struct drm_vmw_gb_surface_create_req creq;
  884. struct drm_vmw_gb_surface_create_rep crep;
  885. };
  886. /**
  887. * union drm_vmw_gb_surface_reference_arg
  888. *
  889. * @req: Input data as described above at "struct drm_vmw_surface_arg"
  890. * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep"
  891. *
  892. * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl.
  893. */
  894. union drm_vmw_gb_surface_reference_arg {
  895. struct drm_vmw_gb_surface_ref_rep rep;
  896. struct drm_vmw_surface_arg req;
  897. };
  898. /*************************************************************************/
  899. /**
  900. * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access.
  901. *
  902. * Idles any previously submitted GPU operations on the buffer and
  903. * by default blocks command submissions that reference the buffer.
  904. * If the file descriptor used to grab a blocking CPU sync is closed, the
  905. * cpu sync is released.
  906. * The flags argument indicates how the grab / release operation should be
  907. * performed:
  908. */
  909. /**
  910. * enum drm_vmw_synccpu_flags - Synccpu flags:
  911. *
  912. * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a
  913. * hint to the kernel to allow command submissions that references the buffer
  914. * for read-only.
  915. * @drm_vmw_synccpu_write: Sync for write. Block all command submissions
  916. * referencing this buffer.
  917. * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
  918. * -EBUSY should the buffer be busy.
  919. * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
  920. * while the buffer is synced for CPU. This is similar to the GEM bo idle
  921. * behavior.
  922. */
  923. enum drm_vmw_synccpu_flags {
  924. drm_vmw_synccpu_read = (1 << 0),
  925. drm_vmw_synccpu_write = (1 << 1),
  926. drm_vmw_synccpu_dontblock = (1 << 2),
  927. drm_vmw_synccpu_allow_cs = (1 << 3)
  928. };
  929. /**
  930. * enum drm_vmw_synccpu_op - Synccpu operations:
  931. *
  932. * @drm_vmw_synccpu_grab: Grab the buffer for CPU operations
  933. * @drm_vmw_synccpu_release: Release a previous grab.
  934. */
  935. enum drm_vmw_synccpu_op {
  936. drm_vmw_synccpu_grab,
  937. drm_vmw_synccpu_release
  938. };
  939. /**
  940. * struct drm_vmw_synccpu_arg
  941. *
  942. * @op: The synccpu operation as described above.
  943. * @handle: Handle identifying the buffer object.
  944. * @flags: Flags as described above.
  945. */
  946. struct drm_vmw_synccpu_arg {
  947. enum drm_vmw_synccpu_op op;
  948. enum drm_vmw_synccpu_flags flags;
  949. uint32_t handle;
  950. uint32_t pad64;
  951. };
  952. #endif