ep93xx-fb.c 17 KB

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  1. /*
  2. * linux/drivers/video/ep93xx-fb.c
  3. *
  4. * Framebuffer support for the EP93xx series.
  5. *
  6. * Copyright (C) 2007 Bluewater Systems Ltd
  7. * Author: Ryan Mallon
  8. *
  9. * Copyright (c) 2009 H Hartley Sweeten <hsweeten@visionengravers.com>
  10. *
  11. * Based on the Cirrus Logic ep93xxfb driver, and various other ep93xxfb
  12. * drivers.
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. *
  18. */
  19. #include <linux/platform_device.h>
  20. #include <linux/module.h>
  21. #include <linux/dma-mapping.h>
  22. #include <linux/slab.h>
  23. #include <linux/clk.h>
  24. #include <linux/fb.h>
  25. #include <linux/io.h>
  26. #include <linux/platform_data/video-ep93xx.h>
  27. /* Vertical Frame Timing Registers */
  28. #define EP93XXFB_VLINES_TOTAL 0x0000 /* SW locked */
  29. #define EP93XXFB_VSYNC 0x0004 /* SW locked */
  30. #define EP93XXFB_VACTIVE 0x0008 /* SW locked */
  31. #define EP93XXFB_VBLANK 0x0228 /* SW locked */
  32. #define EP93XXFB_VCLK 0x000c /* SW locked */
  33. /* Horizontal Frame Timing Registers */
  34. #define EP93XXFB_HCLKS_TOTAL 0x0010 /* SW locked */
  35. #define EP93XXFB_HSYNC 0x0014 /* SW locked */
  36. #define EP93XXFB_HACTIVE 0x0018 /* SW locked */
  37. #define EP93XXFB_HBLANK 0x022c /* SW locked */
  38. #define EP93XXFB_HCLK 0x001c /* SW locked */
  39. /* Frame Buffer Memory Configuration Registers */
  40. #define EP93XXFB_SCREEN_PAGE 0x0028
  41. #define EP93XXFB_SCREEN_HPAGE 0x002c
  42. #define EP93XXFB_SCREEN_LINES 0x0030
  43. #define EP93XXFB_LINE_LENGTH 0x0034
  44. #define EP93XXFB_VLINE_STEP 0x0038
  45. #define EP93XXFB_LINE_CARRY 0x003c /* SW locked */
  46. #define EP93XXFB_EOL_OFFSET 0x0230
  47. /* Other Video Registers */
  48. #define EP93XXFB_BRIGHTNESS 0x0020
  49. #define EP93XXFB_ATTRIBS 0x0024 /* SW locked */
  50. #define EP93XXFB_SWLOCK 0x007c /* SW locked */
  51. #define EP93XXFB_AC_RATE 0x0214
  52. #define EP93XXFB_FIFO_LEVEL 0x0234
  53. #define EP93XXFB_PIXELMODE 0x0054
  54. #define EP93XXFB_PIXELMODE_32BPP (0x7 << 0)
  55. #define EP93XXFB_PIXELMODE_24BPP (0x6 << 0)
  56. #define EP93XXFB_PIXELMODE_16BPP (0x4 << 0)
  57. #define EP93XXFB_PIXELMODE_8BPP (0x2 << 0)
  58. #define EP93XXFB_PIXELMODE_SHIFT_1P_24B (0x0 << 3)
  59. #define EP93XXFB_PIXELMODE_SHIFT_1P_18B (0x1 << 3)
  60. #define EP93XXFB_PIXELMODE_COLOR_LUT (0x0 << 10)
  61. #define EP93XXFB_PIXELMODE_COLOR_888 (0x4 << 10)
  62. #define EP93XXFB_PIXELMODE_COLOR_555 (0x5 << 10)
  63. #define EP93XXFB_PARL_IF_OUT 0x0058
  64. #define EP93XXFB_PARL_IF_IN 0x005c
  65. /* Blink Control Registers */
  66. #define EP93XXFB_BLINK_RATE 0x0040
  67. #define EP93XXFB_BLINK_MASK 0x0044
  68. #define EP93XXFB_BLINK_PATTRN 0x0048
  69. #define EP93XXFB_PATTRN_MASK 0x004c
  70. #define EP93XXFB_BKGRND_OFFSET 0x0050
  71. /* Hardware Cursor Registers */
  72. #define EP93XXFB_CURSOR_ADR_START 0x0060
  73. #define EP93XXFB_CURSOR_ADR_RESET 0x0064
  74. #define EP93XXFB_CURSOR_SIZE 0x0068
  75. #define EP93XXFB_CURSOR_COLOR1 0x006c
  76. #define EP93XXFB_CURSOR_COLOR2 0x0070
  77. #define EP93XXFB_CURSOR_BLINK_COLOR1 0x021c
  78. #define EP93XXFB_CURSOR_BLINK_COLOR2 0x0220
  79. #define EP93XXFB_CURSOR_XY_LOC 0x0074
  80. #define EP93XXFB_CURSOR_DSCAN_HY_LOC 0x0078
  81. #define EP93XXFB_CURSOR_BLINK_RATE_CTRL 0x0224
  82. /* LUT Registers */
  83. #define EP93XXFB_GRY_SCL_LUTR 0x0080
  84. #define EP93XXFB_GRY_SCL_LUTG 0x0280
  85. #define EP93XXFB_GRY_SCL_LUTB 0x0300
  86. #define EP93XXFB_LUT_SW_CONTROL 0x0218
  87. #define EP93XXFB_LUT_SW_CONTROL_SWTCH (1 << 0)
  88. #define EP93XXFB_LUT_SW_CONTROL_SSTAT (1 << 1)
  89. #define EP93XXFB_COLOR_LUT 0x0400
  90. /* Video Signature Registers */
  91. #define EP93XXFB_VID_SIG_RSLT_VAL 0x0200
  92. #define EP93XXFB_VID_SIG_CTRL 0x0204
  93. #define EP93XXFB_VSIG 0x0208
  94. #define EP93XXFB_HSIG 0x020c
  95. #define EP93XXFB_SIG_CLR_STR 0x0210
  96. /* Minimum / Maximum resolutions supported */
  97. #define EP93XXFB_MIN_XRES 64
  98. #define EP93XXFB_MIN_YRES 64
  99. #define EP93XXFB_MAX_XRES 1024
  100. #define EP93XXFB_MAX_YRES 768
  101. struct ep93xx_fbi {
  102. struct ep93xxfb_mach_info *mach_info;
  103. struct clk *clk;
  104. struct resource *res;
  105. void __iomem *mmio_base;
  106. unsigned int pseudo_palette[256];
  107. };
  108. static int check_screenpage_bug = 1;
  109. module_param(check_screenpage_bug, int, 0644);
  110. MODULE_PARM_DESC(check_screenpage_bug,
  111. "Check for bit 27 screen page bug. Default = 1");
  112. static inline unsigned int ep93xxfb_readl(struct ep93xx_fbi *fbi,
  113. unsigned int off)
  114. {
  115. return __raw_readl(fbi->mmio_base + off);
  116. }
  117. static inline void ep93xxfb_writel(struct ep93xx_fbi *fbi,
  118. unsigned int val, unsigned int off)
  119. {
  120. __raw_writel(val, fbi->mmio_base + off);
  121. }
  122. /*
  123. * Write to one of the locked raster registers.
  124. */
  125. static inline void ep93xxfb_out_locked(struct ep93xx_fbi *fbi,
  126. unsigned int val, unsigned int reg)
  127. {
  128. /*
  129. * We don't need a lock or delay here since the raster register
  130. * block will remain unlocked until the next access.
  131. */
  132. ep93xxfb_writel(fbi, 0xaa, EP93XXFB_SWLOCK);
  133. ep93xxfb_writel(fbi, val, reg);
  134. }
  135. static void ep93xxfb_set_video_attribs(struct fb_info *info)
  136. {
  137. struct ep93xx_fbi *fbi = info->par;
  138. unsigned int attribs;
  139. attribs = EP93XXFB_ENABLE;
  140. attribs |= fbi->mach_info->flags;
  141. ep93xxfb_out_locked(fbi, attribs, EP93XXFB_ATTRIBS);
  142. }
  143. static int ep93xxfb_set_pixelmode(struct fb_info *info)
  144. {
  145. struct ep93xx_fbi *fbi = info->par;
  146. unsigned int val;
  147. info->var.transp.offset = 0;
  148. info->var.transp.length = 0;
  149. switch (info->var.bits_per_pixel) {
  150. case 8:
  151. val = EP93XXFB_PIXELMODE_8BPP | EP93XXFB_PIXELMODE_COLOR_LUT |
  152. EP93XXFB_PIXELMODE_SHIFT_1P_18B;
  153. info->var.red.offset = 0;
  154. info->var.red.length = 8;
  155. info->var.green.offset = 0;
  156. info->var.green.length = 8;
  157. info->var.blue.offset = 0;
  158. info->var.blue.length = 8;
  159. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  160. break;
  161. case 16:
  162. val = EP93XXFB_PIXELMODE_16BPP | EP93XXFB_PIXELMODE_COLOR_555 |
  163. EP93XXFB_PIXELMODE_SHIFT_1P_18B;
  164. info->var.red.offset = 11;
  165. info->var.red.length = 5;
  166. info->var.green.offset = 5;
  167. info->var.green.length = 6;
  168. info->var.blue.offset = 0;
  169. info->var.blue.length = 5;
  170. info->fix.visual = FB_VISUAL_TRUECOLOR;
  171. break;
  172. case 24:
  173. val = EP93XXFB_PIXELMODE_24BPP | EP93XXFB_PIXELMODE_COLOR_888 |
  174. EP93XXFB_PIXELMODE_SHIFT_1P_24B;
  175. info->var.red.offset = 16;
  176. info->var.red.length = 8;
  177. info->var.green.offset = 8;
  178. info->var.green.length = 8;
  179. info->var.blue.offset = 0;
  180. info->var.blue.length = 8;
  181. info->fix.visual = FB_VISUAL_TRUECOLOR;
  182. break;
  183. case 32:
  184. val = EP93XXFB_PIXELMODE_32BPP | EP93XXFB_PIXELMODE_COLOR_888 |
  185. EP93XXFB_PIXELMODE_SHIFT_1P_24B;
  186. info->var.red.offset = 16;
  187. info->var.red.length = 8;
  188. info->var.green.offset = 8;
  189. info->var.green.length = 8;
  190. info->var.blue.offset = 0;
  191. info->var.blue.length = 8;
  192. info->fix.visual = FB_VISUAL_TRUECOLOR;
  193. break;
  194. default:
  195. return -EINVAL;
  196. }
  197. ep93xxfb_writel(fbi, val, EP93XXFB_PIXELMODE);
  198. return 0;
  199. }
  200. static void ep93xxfb_set_timing(struct fb_info *info)
  201. {
  202. struct ep93xx_fbi *fbi = info->par;
  203. unsigned int vlines_total, hclks_total, start, stop;
  204. vlines_total = info->var.yres + info->var.upper_margin +
  205. info->var.lower_margin + info->var.vsync_len - 1;
  206. hclks_total = info->var.xres + info->var.left_margin +
  207. info->var.right_margin + info->var.hsync_len - 1;
  208. ep93xxfb_out_locked(fbi, vlines_total, EP93XXFB_VLINES_TOTAL);
  209. ep93xxfb_out_locked(fbi, hclks_total, EP93XXFB_HCLKS_TOTAL);
  210. start = vlines_total;
  211. stop = vlines_total - info->var.vsync_len;
  212. ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VSYNC);
  213. start = vlines_total - info->var.vsync_len - info->var.upper_margin;
  214. stop = info->var.lower_margin - 1;
  215. ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VBLANK);
  216. ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VACTIVE);
  217. start = vlines_total;
  218. stop = vlines_total + 1;
  219. ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VCLK);
  220. start = hclks_total;
  221. stop = hclks_total - info->var.hsync_len;
  222. ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HSYNC);
  223. start = hclks_total - info->var.hsync_len - info->var.left_margin;
  224. stop = info->var.right_margin - 1;
  225. ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HBLANK);
  226. ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HACTIVE);
  227. start = hclks_total;
  228. stop = hclks_total;
  229. ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HCLK);
  230. ep93xxfb_out_locked(fbi, 0x0, EP93XXFB_LINE_CARRY);
  231. }
  232. static int ep93xxfb_set_par(struct fb_info *info)
  233. {
  234. struct ep93xx_fbi *fbi = info->par;
  235. clk_set_rate(fbi->clk, 1000 * PICOS2KHZ(info->var.pixclock));
  236. ep93xxfb_set_timing(info);
  237. info->fix.line_length = info->var.xres_virtual *
  238. info->var.bits_per_pixel / 8;
  239. ep93xxfb_writel(fbi, info->fix.smem_start, EP93XXFB_SCREEN_PAGE);
  240. ep93xxfb_writel(fbi, info->var.yres - 1, EP93XXFB_SCREEN_LINES);
  241. ep93xxfb_writel(fbi, ((info->var.xres * info->var.bits_per_pixel)
  242. / 32) - 1, EP93XXFB_LINE_LENGTH);
  243. ep93xxfb_writel(fbi, info->fix.line_length / 4, EP93XXFB_VLINE_STEP);
  244. ep93xxfb_set_video_attribs(info);
  245. return 0;
  246. }
  247. static int ep93xxfb_check_var(struct fb_var_screeninfo *var,
  248. struct fb_info *info)
  249. {
  250. int err;
  251. err = ep93xxfb_set_pixelmode(info);
  252. if (err)
  253. return err;
  254. var->xres = max_t(unsigned int, var->xres, EP93XXFB_MIN_XRES);
  255. var->xres = min_t(unsigned int, var->xres, EP93XXFB_MAX_XRES);
  256. var->xres_virtual = max(var->xres_virtual, var->xres);
  257. var->yres = max_t(unsigned int, var->yres, EP93XXFB_MIN_YRES);
  258. var->yres = min_t(unsigned int, var->yres, EP93XXFB_MAX_YRES);
  259. var->yres_virtual = max(var->yres_virtual, var->yres);
  260. return 0;
  261. }
  262. static int ep93xxfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
  263. {
  264. unsigned int offset = vma->vm_pgoff << PAGE_SHIFT;
  265. if (offset < info->fix.smem_len) {
  266. return dma_mmap_writecombine(info->dev, vma, info->screen_base,
  267. info->fix.smem_start,
  268. info->fix.smem_len);
  269. }
  270. return -EINVAL;
  271. }
  272. static int ep93xxfb_blank(int blank_mode, struct fb_info *info)
  273. {
  274. struct ep93xx_fbi *fbi = info->par;
  275. unsigned int attribs = ep93xxfb_readl(fbi, EP93XXFB_ATTRIBS);
  276. if (blank_mode) {
  277. if (fbi->mach_info->blank)
  278. fbi->mach_info->blank(blank_mode, info);
  279. ep93xxfb_out_locked(fbi, attribs & ~EP93XXFB_ENABLE,
  280. EP93XXFB_ATTRIBS);
  281. clk_disable(fbi->clk);
  282. } else {
  283. clk_enable(fbi->clk);
  284. ep93xxfb_out_locked(fbi, attribs | EP93XXFB_ENABLE,
  285. EP93XXFB_ATTRIBS);
  286. if (fbi->mach_info->blank)
  287. fbi->mach_info->blank(blank_mode, info);
  288. }
  289. return 0;
  290. }
  291. static inline int ep93xxfb_convert_color(int val, int width)
  292. {
  293. return ((val << width) + 0x7fff - val) >> 16;
  294. }
  295. static int ep93xxfb_setcolreg(unsigned int regno, unsigned int red,
  296. unsigned int green, unsigned int blue,
  297. unsigned int transp, struct fb_info *info)
  298. {
  299. struct ep93xx_fbi *fbi = info->par;
  300. unsigned int *pal = info->pseudo_palette;
  301. unsigned int ctrl, i, rgb, lut_current, lut_stat;
  302. switch (info->fix.visual) {
  303. case FB_VISUAL_PSEUDOCOLOR:
  304. if (regno > 255)
  305. return 1;
  306. rgb = ((red & 0xff00) << 8) | (green & 0xff00) |
  307. ((blue & 0xff00) >> 8);
  308. pal[regno] = rgb;
  309. ep93xxfb_writel(fbi, rgb, (EP93XXFB_COLOR_LUT + (regno << 2)));
  310. ctrl = ep93xxfb_readl(fbi, EP93XXFB_LUT_SW_CONTROL);
  311. lut_stat = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SSTAT);
  312. lut_current = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SWTCH);
  313. if (lut_stat == lut_current) {
  314. for (i = 0; i < 256; i++) {
  315. ep93xxfb_writel(fbi, pal[i],
  316. EP93XXFB_COLOR_LUT + (i << 2));
  317. }
  318. ep93xxfb_writel(fbi,
  319. ctrl ^ EP93XXFB_LUT_SW_CONTROL_SWTCH,
  320. EP93XXFB_LUT_SW_CONTROL);
  321. }
  322. break;
  323. case FB_VISUAL_TRUECOLOR:
  324. if (regno > 16)
  325. return 1;
  326. red = ep93xxfb_convert_color(red, info->var.red.length);
  327. green = ep93xxfb_convert_color(green, info->var.green.length);
  328. blue = ep93xxfb_convert_color(blue, info->var.blue.length);
  329. transp = ep93xxfb_convert_color(transp,
  330. info->var.transp.length);
  331. pal[regno] = (red << info->var.red.offset) |
  332. (green << info->var.green.offset) |
  333. (blue << info->var.blue.offset) |
  334. (transp << info->var.transp.offset);
  335. break;
  336. default:
  337. return 1;
  338. }
  339. return 0;
  340. }
  341. static struct fb_ops ep93xxfb_ops = {
  342. .owner = THIS_MODULE,
  343. .fb_check_var = ep93xxfb_check_var,
  344. .fb_set_par = ep93xxfb_set_par,
  345. .fb_blank = ep93xxfb_blank,
  346. .fb_fillrect = cfb_fillrect,
  347. .fb_copyarea = cfb_copyarea,
  348. .fb_imageblit = cfb_imageblit,
  349. .fb_setcolreg = ep93xxfb_setcolreg,
  350. .fb_mmap = ep93xxfb_mmap,
  351. };
  352. static int ep93xxfb_calc_fbsize(struct ep93xxfb_mach_info *mach_info)
  353. {
  354. int i, fb_size = 0;
  355. if (mach_info->num_modes == EP93XXFB_USE_MODEDB) {
  356. fb_size = EP93XXFB_MAX_XRES * EP93XXFB_MAX_YRES *
  357. mach_info->bpp / 8;
  358. } else {
  359. for (i = 0; i < mach_info->num_modes; i++) {
  360. const struct fb_videomode *mode;
  361. int size;
  362. mode = &mach_info->modes[i];
  363. size = mode->xres * mode->yres * mach_info->bpp / 8;
  364. if (size > fb_size)
  365. fb_size = size;
  366. }
  367. }
  368. return fb_size;
  369. }
  370. static int ep93xxfb_alloc_videomem(struct fb_info *info)
  371. {
  372. struct ep93xx_fbi *fbi = info->par;
  373. char __iomem *virt_addr;
  374. dma_addr_t phys_addr;
  375. unsigned int fb_size;
  376. fb_size = ep93xxfb_calc_fbsize(fbi->mach_info);
  377. virt_addr = dma_alloc_writecombine(info->dev, fb_size,
  378. &phys_addr, GFP_KERNEL);
  379. if (!virt_addr)
  380. return -ENOMEM;
  381. /*
  382. * There is a bug in the ep93xx framebuffer which causes problems
  383. * if bit 27 of the physical address is set.
  384. * See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
  385. * There does not seem to be any official errata for this, but I
  386. * have confirmed the problem exists on my hardware (ep9315) at
  387. * least.
  388. */
  389. if (check_screenpage_bug && phys_addr & (1 << 27)) {
  390. dev_err(info->dev, "ep93xx framebuffer bug. phys addr (0x%x) "
  391. "has bit 27 set: cannot init framebuffer\n",
  392. phys_addr);
  393. dma_free_coherent(info->dev, fb_size, virt_addr, phys_addr);
  394. return -ENOMEM;
  395. }
  396. info->fix.smem_start = phys_addr;
  397. info->fix.smem_len = fb_size;
  398. info->screen_base = virt_addr;
  399. return 0;
  400. }
  401. static void ep93xxfb_dealloc_videomem(struct fb_info *info)
  402. {
  403. if (info->screen_base)
  404. dma_free_coherent(info->dev, info->fix.smem_len,
  405. info->screen_base, info->fix.smem_start);
  406. }
  407. static int ep93xxfb_probe(struct platform_device *pdev)
  408. {
  409. struct ep93xxfb_mach_info *mach_info = dev_get_platdata(&pdev->dev);
  410. struct fb_info *info;
  411. struct ep93xx_fbi *fbi;
  412. struct resource *res;
  413. char *video_mode;
  414. int err;
  415. if (!mach_info)
  416. return -EINVAL;
  417. info = framebuffer_alloc(sizeof(struct ep93xx_fbi), &pdev->dev);
  418. if (!info)
  419. return -ENOMEM;
  420. info->dev = &pdev->dev;
  421. platform_set_drvdata(pdev, info);
  422. fbi = info->par;
  423. fbi->mach_info = mach_info;
  424. err = fb_alloc_cmap(&info->cmap, 256, 0);
  425. if (err)
  426. goto failed_cmap;
  427. err = ep93xxfb_alloc_videomem(info);
  428. if (err)
  429. goto failed_videomem;
  430. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  431. if (!res) {
  432. err = -ENXIO;
  433. goto failed_resource;
  434. }
  435. /*
  436. * FIXME - We don't do a request_mem_region here because we are
  437. * sharing the register space with the backlight driver (see
  438. * drivers/video/backlight/ep93xx_bl.c) and doing so will cause
  439. * the second loaded driver to return -EBUSY.
  440. *
  441. * NOTE: No locking is required; the backlight does not touch
  442. * any of the framebuffer registers.
  443. */
  444. fbi->res = res;
  445. fbi->mmio_base = devm_ioremap(&pdev->dev, res->start,
  446. resource_size(res));
  447. if (!fbi->mmio_base) {
  448. err = -ENXIO;
  449. goto failed_resource;
  450. }
  451. strcpy(info->fix.id, pdev->name);
  452. info->fbops = &ep93xxfb_ops;
  453. info->fix.type = FB_TYPE_PACKED_PIXELS;
  454. info->fix.accel = FB_ACCEL_NONE;
  455. info->var.activate = FB_ACTIVATE_NOW;
  456. info->var.vmode = FB_VMODE_NONINTERLACED;
  457. info->flags = FBINFO_DEFAULT;
  458. info->node = -1;
  459. info->state = FBINFO_STATE_RUNNING;
  460. info->pseudo_palette = &fbi->pseudo_palette;
  461. fb_get_options("ep93xx-fb", &video_mode);
  462. err = fb_find_mode(&info->var, info, video_mode,
  463. fbi->mach_info->modes, fbi->mach_info->num_modes,
  464. fbi->mach_info->default_mode, fbi->mach_info->bpp);
  465. if (err == 0) {
  466. dev_err(info->dev, "No suitable video mode found\n");
  467. err = -EINVAL;
  468. goto failed_resource;
  469. }
  470. if (mach_info->setup) {
  471. err = mach_info->setup(pdev);
  472. if (err)
  473. goto failed_resource;
  474. }
  475. err = ep93xxfb_check_var(&info->var, info);
  476. if (err)
  477. goto failed_check;
  478. fbi->clk = devm_clk_get(&pdev->dev, NULL);
  479. if (IS_ERR(fbi->clk)) {
  480. err = PTR_ERR(fbi->clk);
  481. fbi->clk = NULL;
  482. goto failed_check;
  483. }
  484. ep93xxfb_set_par(info);
  485. clk_enable(fbi->clk);
  486. err = register_framebuffer(info);
  487. if (err)
  488. goto failed_check;
  489. dev_info(info->dev, "registered. Mode = %dx%d-%d\n",
  490. info->var.xres, info->var.yres, info->var.bits_per_pixel);
  491. return 0;
  492. failed_check:
  493. if (fbi->mach_info->teardown)
  494. fbi->mach_info->teardown(pdev);
  495. failed_resource:
  496. ep93xxfb_dealloc_videomem(info);
  497. failed_videomem:
  498. fb_dealloc_cmap(&info->cmap);
  499. failed_cmap:
  500. kfree(info);
  501. return err;
  502. }
  503. static int ep93xxfb_remove(struct platform_device *pdev)
  504. {
  505. struct fb_info *info = platform_get_drvdata(pdev);
  506. struct ep93xx_fbi *fbi = info->par;
  507. unregister_framebuffer(info);
  508. clk_disable(fbi->clk);
  509. ep93xxfb_dealloc_videomem(info);
  510. fb_dealloc_cmap(&info->cmap);
  511. if (fbi->mach_info->teardown)
  512. fbi->mach_info->teardown(pdev);
  513. kfree(info);
  514. return 0;
  515. }
  516. static struct platform_driver ep93xxfb_driver = {
  517. .probe = ep93xxfb_probe,
  518. .remove = ep93xxfb_remove,
  519. .driver = {
  520. .name = "ep93xx-fb",
  521. },
  522. };
  523. module_platform_driver(ep93xxfb_driver);
  524. MODULE_DESCRIPTION("EP93XX Framebuffer Driver");
  525. MODULE_ALIAS("platform:ep93xx-fb");
  526. MODULE_AUTHOR("Ryan Mallon, "
  527. "H Hartley Sweeten <hsweeten@visionengravers.com");
  528. MODULE_LICENSE("GPL");