bcma-hcd.c 7.8 KB

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  1. /*
  2. * Broadcom specific Advanced Microcontroller Bus
  3. * Broadcom USB-core driver (BCMA bus glue)
  4. *
  5. * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
  6. *
  7. * Based on ssb-ohci driver
  8. * Copyright 2007 Michael Buesch <m@bues.ch>
  9. *
  10. * Derived from the OHCI-PCI driver
  11. * Copyright 1999 Roman Weissgaerber
  12. * Copyright 2000-2002 David Brownell
  13. * Copyright 1999 Linus Torvalds
  14. * Copyright 1999 Gregory P. Smith
  15. *
  16. * Derived from the USBcore related parts of Broadcom-SB
  17. * Copyright 2005-2011 Broadcom Corporation
  18. *
  19. * Licensed under the GNU/GPL. See COPYING for details.
  20. */
  21. #include <linux/bcma/bcma.h>
  22. #include <linux/delay.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/module.h>
  25. #include <linux/slab.h>
  26. #include <linux/usb/ehci_pdriver.h>
  27. #include <linux/usb/ohci_pdriver.h>
  28. MODULE_AUTHOR("Hauke Mehrtens");
  29. MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
  30. MODULE_LICENSE("GPL");
  31. struct bcma_hcd_device {
  32. struct platform_device *ehci_dev;
  33. struct platform_device *ohci_dev;
  34. };
  35. /* Wait for bitmask in a register to get set or cleared.
  36. * timeout is in units of ten-microseconds.
  37. */
  38. static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
  39. int timeout)
  40. {
  41. int i;
  42. u32 val;
  43. for (i = 0; i < timeout; i++) {
  44. val = bcma_read32(dev, reg);
  45. if ((val & bitmask) == bitmask)
  46. return 0;
  47. udelay(10);
  48. }
  49. return -ETIMEDOUT;
  50. }
  51. static void bcma_hcd_4716wa(struct bcma_device *dev)
  52. {
  53. #ifdef CONFIG_BCMA_DRIVER_MIPS
  54. /* Work around for 4716 failures. */
  55. if (dev->bus->chipinfo.id == 0x4716) {
  56. u32 tmp;
  57. tmp = bcma_cpu_clock(&dev->bus->drv_mips);
  58. if (tmp >= 480000000)
  59. tmp = 0x1846b; /* set CDR to 0x11(fast) */
  60. else if (tmp == 453000000)
  61. tmp = 0x1046b; /* set CDR to 0x10(slow) */
  62. else
  63. tmp = 0;
  64. /* Change Shim mdio control reg to fix host not acking at
  65. * high frequencies
  66. */
  67. if (tmp) {
  68. bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
  69. udelay(500);
  70. bcma_write32(dev, 0x524, tmp);
  71. udelay(500);
  72. bcma_write32(dev, 0x524, 0x4ab);
  73. udelay(500);
  74. bcma_read32(dev, 0x528);
  75. bcma_write32(dev, 0x528, 0x80000000);
  76. }
  77. }
  78. #endif /* CONFIG_BCMA_DRIVER_MIPS */
  79. }
  80. /* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
  81. static void bcma_hcd_init_chip(struct bcma_device *dev)
  82. {
  83. u32 tmp;
  84. /*
  85. * USB 2.0 special considerations:
  86. *
  87. * 1. Since the core supports both OHCI and EHCI functions, it must
  88. * only be reset once.
  89. *
  90. * 2. In addition to the standard SI reset sequence, the Host Control
  91. * Register must be programmed to bring the USB core and various
  92. * phy components out of reset.
  93. */
  94. if (!bcma_core_is_enabled(dev)) {
  95. bcma_core_enable(dev, 0);
  96. mdelay(10);
  97. if (dev->id.rev >= 5) {
  98. /* Enable Misc PLL */
  99. tmp = bcma_read32(dev, 0x1e0);
  100. tmp |= 0x100;
  101. bcma_write32(dev, 0x1e0, tmp);
  102. if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
  103. printk(KERN_EMERG "Failed to enable misc PPL!\n");
  104. /* Take out of resets */
  105. bcma_write32(dev, 0x200, 0x4ff);
  106. udelay(25);
  107. bcma_write32(dev, 0x200, 0x6ff);
  108. udelay(25);
  109. /* Make sure digital and AFE are locked in USB PHY */
  110. bcma_write32(dev, 0x524, 0x6b);
  111. udelay(50);
  112. tmp = bcma_read32(dev, 0x524);
  113. udelay(50);
  114. bcma_write32(dev, 0x524, 0xab);
  115. udelay(50);
  116. tmp = bcma_read32(dev, 0x524);
  117. udelay(50);
  118. bcma_write32(dev, 0x524, 0x2b);
  119. udelay(50);
  120. tmp = bcma_read32(dev, 0x524);
  121. udelay(50);
  122. bcma_write32(dev, 0x524, 0x10ab);
  123. udelay(50);
  124. tmp = bcma_read32(dev, 0x524);
  125. if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
  126. tmp = bcma_read32(dev, 0x528);
  127. printk(KERN_EMERG
  128. "USB20H mdio_rddata 0x%08x\n", tmp);
  129. }
  130. bcma_write32(dev, 0x528, 0x80000000);
  131. tmp = bcma_read32(dev, 0x314);
  132. udelay(265);
  133. bcma_write32(dev, 0x200, 0x7ff);
  134. udelay(10);
  135. /* Take USB and HSIC out of non-driving modes */
  136. bcma_write32(dev, 0x510, 0);
  137. } else {
  138. bcma_write32(dev, 0x200, 0x7ff);
  139. udelay(1);
  140. }
  141. bcma_hcd_4716wa(dev);
  142. }
  143. }
  144. static const struct usb_ehci_pdata ehci_pdata = {
  145. };
  146. static const struct usb_ohci_pdata ohci_pdata = {
  147. };
  148. static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, bool ohci, u32 addr)
  149. {
  150. struct platform_device *hci_dev;
  151. struct resource hci_res[2];
  152. int ret = -ENOMEM;
  153. memset(hci_res, 0, sizeof(hci_res));
  154. hci_res[0].start = addr;
  155. hci_res[0].end = hci_res[0].start + 0x1000 - 1;
  156. hci_res[0].flags = IORESOURCE_MEM;
  157. hci_res[1].start = dev->irq;
  158. hci_res[1].flags = IORESOURCE_IRQ;
  159. hci_dev = platform_device_alloc(ohci ? "ohci-platform" :
  160. "ehci-platform" , 0);
  161. if (!hci_dev)
  162. return NULL;
  163. hci_dev->dev.parent = &dev->dev;
  164. hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
  165. ret = platform_device_add_resources(hci_dev, hci_res,
  166. ARRAY_SIZE(hci_res));
  167. if (ret)
  168. goto err_alloc;
  169. if (ohci)
  170. ret = platform_device_add_data(hci_dev, &ohci_pdata,
  171. sizeof(ohci_pdata));
  172. else
  173. ret = platform_device_add_data(hci_dev, &ehci_pdata,
  174. sizeof(ehci_pdata));
  175. if (ret)
  176. goto err_alloc;
  177. ret = platform_device_add(hci_dev);
  178. if (ret)
  179. goto err_alloc;
  180. return hci_dev;
  181. err_alloc:
  182. platform_device_put(hci_dev);
  183. return ERR_PTR(ret);
  184. }
  185. static int bcma_hcd_probe(struct bcma_device *dev)
  186. {
  187. int err;
  188. u16 chipid_top;
  189. u32 ohci_addr;
  190. struct bcma_hcd_device *usb_dev;
  191. struct bcma_chipinfo *chipinfo;
  192. chipinfo = &dev->bus->chipinfo;
  193. /* USBcores are only connected on embedded devices. */
  194. chipid_top = (chipinfo->id & 0xFF00);
  195. if (chipid_top != 0x4700 && chipid_top != 0x5300)
  196. return -ENODEV;
  197. /* TODO: Probably need checks here; is the core connected? */
  198. if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
  199. return -EOPNOTSUPP;
  200. usb_dev = kzalloc(sizeof(struct bcma_hcd_device), GFP_KERNEL);
  201. if (!usb_dev)
  202. return -ENOMEM;
  203. bcma_hcd_init_chip(dev);
  204. /* In AI chips EHCI is addrspace 0, OHCI is 1 */
  205. ohci_addr = dev->addr_s[0];
  206. if ((chipinfo->id == 0x5357 || chipinfo->id == 0x4749)
  207. && chipinfo->rev == 0)
  208. ohci_addr = 0x18009000;
  209. usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, true, ohci_addr);
  210. if (IS_ERR(usb_dev->ohci_dev)) {
  211. err = PTR_ERR(usb_dev->ohci_dev);
  212. goto err_free_usb_dev;
  213. }
  214. usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, false, dev->addr);
  215. if (IS_ERR(usb_dev->ehci_dev)) {
  216. err = PTR_ERR(usb_dev->ehci_dev);
  217. goto err_unregister_ohci_dev;
  218. }
  219. bcma_set_drvdata(dev, usb_dev);
  220. return 0;
  221. err_unregister_ohci_dev:
  222. platform_device_unregister(usb_dev->ohci_dev);
  223. err_free_usb_dev:
  224. kfree(usb_dev);
  225. return err;
  226. }
  227. static void bcma_hcd_remove(struct bcma_device *dev)
  228. {
  229. struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
  230. struct platform_device *ohci_dev = usb_dev->ohci_dev;
  231. struct platform_device *ehci_dev = usb_dev->ehci_dev;
  232. if (ohci_dev)
  233. platform_device_unregister(ohci_dev);
  234. if (ehci_dev)
  235. platform_device_unregister(ehci_dev);
  236. bcma_core_disable(dev, 0);
  237. }
  238. static void bcma_hcd_shutdown(struct bcma_device *dev)
  239. {
  240. bcma_core_disable(dev, 0);
  241. }
  242. #ifdef CONFIG_PM
  243. static int bcma_hcd_suspend(struct bcma_device *dev)
  244. {
  245. bcma_core_disable(dev, 0);
  246. return 0;
  247. }
  248. static int bcma_hcd_resume(struct bcma_device *dev)
  249. {
  250. bcma_core_enable(dev, 0);
  251. return 0;
  252. }
  253. #else /* !CONFIG_PM */
  254. #define bcma_hcd_suspend NULL
  255. #define bcma_hcd_resume NULL
  256. #endif /* CONFIG_PM */
  257. static const struct bcma_device_id bcma_hcd_table[] = {
  258. BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
  259. {},
  260. };
  261. MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
  262. static struct bcma_driver bcma_hcd_driver = {
  263. .name = KBUILD_MODNAME,
  264. .id_table = bcma_hcd_table,
  265. .probe = bcma_hcd_probe,
  266. .remove = bcma_hcd_remove,
  267. .shutdown = bcma_hcd_shutdown,
  268. .suspend = bcma_hcd_suspend,
  269. .resume = bcma_hcd_resume,
  270. };
  271. static int __init bcma_hcd_init(void)
  272. {
  273. return bcma_driver_register(&bcma_hcd_driver);
  274. }
  275. module_init(bcma_hcd_init);
  276. static void __exit bcma_hcd_exit(void)
  277. {
  278. bcma_driver_unregister(&bcma_hcd_driver);
  279. }
  280. module_exit(bcma_hcd_exit);