rtc-palmas.c 10 KB

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  1. /*
  2. * rtc-palmas.c -- Palmas Real Time Clock driver.
  3. * RTC driver for TI Palma series devices like TPS65913,
  4. * TPS65914 power management IC.
  5. *
  6. * Copyright (c) 2012, NVIDIA Corporation.
  7. *
  8. * Author: Laxman Dewangan <ldewangan@nvidia.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation version 2.
  13. *
  14. * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
  15. * whether express or implied; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307, USA
  23. */
  24. #include <linux/bcd.h>
  25. #include <linux/errno.h>
  26. #include <linux/init.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/kernel.h>
  29. #include <linux/mfd/palmas.h>
  30. #include <linux/module.h>
  31. #include <linux/of.h>
  32. #include <linux/rtc.h>
  33. #include <linux/types.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/pm.h>
  36. struct palmas_rtc {
  37. struct rtc_device *rtc;
  38. struct device *dev;
  39. unsigned int irq;
  40. };
  41. /* Total number of RTC registers needed to set time*/
  42. #define PALMAS_NUM_TIME_REGS (PALMAS_YEARS_REG - PALMAS_SECONDS_REG + 1)
  43. static int palmas_rtc_read_time(struct device *dev, struct rtc_time *tm)
  44. {
  45. unsigned char rtc_data[PALMAS_NUM_TIME_REGS];
  46. struct palmas *palmas = dev_get_drvdata(dev->parent);
  47. int ret;
  48. /* Copy RTC counting registers to static registers or latches */
  49. ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
  50. PALMAS_RTC_CTRL_REG_GET_TIME, PALMAS_RTC_CTRL_REG_GET_TIME);
  51. if (ret < 0) {
  52. dev_err(dev, "RTC CTRL reg update failed, err: %d\n", ret);
  53. return ret;
  54. }
  55. ret = palmas_bulk_read(palmas, PALMAS_RTC_BASE, PALMAS_SECONDS_REG,
  56. rtc_data, PALMAS_NUM_TIME_REGS);
  57. if (ret < 0) {
  58. dev_err(dev, "RTC_SECONDS reg read failed, err = %d\n", ret);
  59. return ret;
  60. }
  61. tm->tm_sec = bcd2bin(rtc_data[0]);
  62. tm->tm_min = bcd2bin(rtc_data[1]);
  63. tm->tm_hour = bcd2bin(rtc_data[2]);
  64. tm->tm_mday = bcd2bin(rtc_data[3]);
  65. tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
  66. tm->tm_year = bcd2bin(rtc_data[5]) + 100;
  67. return ret;
  68. }
  69. static int palmas_rtc_set_time(struct device *dev, struct rtc_time *tm)
  70. {
  71. unsigned char rtc_data[PALMAS_NUM_TIME_REGS];
  72. struct palmas *palmas = dev_get_drvdata(dev->parent);
  73. int ret;
  74. rtc_data[0] = bin2bcd(tm->tm_sec);
  75. rtc_data[1] = bin2bcd(tm->tm_min);
  76. rtc_data[2] = bin2bcd(tm->tm_hour);
  77. rtc_data[3] = bin2bcd(tm->tm_mday);
  78. rtc_data[4] = bin2bcd(tm->tm_mon + 1);
  79. rtc_data[5] = bin2bcd(tm->tm_year - 100);
  80. /* Stop RTC while updating the RTC time registers */
  81. ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
  82. PALMAS_RTC_CTRL_REG_STOP_RTC, 0);
  83. if (ret < 0) {
  84. dev_err(dev, "RTC stop failed, err = %d\n", ret);
  85. return ret;
  86. }
  87. ret = palmas_bulk_write(palmas, PALMAS_RTC_BASE, PALMAS_SECONDS_REG,
  88. rtc_data, PALMAS_NUM_TIME_REGS);
  89. if (ret < 0) {
  90. dev_err(dev, "RTC_SECONDS reg write failed, err = %d\n", ret);
  91. return ret;
  92. }
  93. /* Start back RTC */
  94. ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
  95. PALMAS_RTC_CTRL_REG_STOP_RTC, PALMAS_RTC_CTRL_REG_STOP_RTC);
  96. if (ret < 0)
  97. dev_err(dev, "RTC start failed, err = %d\n", ret);
  98. return ret;
  99. }
  100. static int palmas_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
  101. {
  102. struct palmas *palmas = dev_get_drvdata(dev->parent);
  103. u8 val;
  104. val = enabled ? PALMAS_RTC_INTERRUPTS_REG_IT_ALARM : 0;
  105. return palmas_write(palmas, PALMAS_RTC_BASE,
  106. PALMAS_RTC_INTERRUPTS_REG, val);
  107. }
  108. static int palmas_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  109. {
  110. unsigned char alarm_data[PALMAS_NUM_TIME_REGS];
  111. u32 int_val;
  112. struct palmas *palmas = dev_get_drvdata(dev->parent);
  113. int ret;
  114. ret = palmas_bulk_read(palmas, PALMAS_RTC_BASE,
  115. PALMAS_ALARM_SECONDS_REG,
  116. alarm_data, PALMAS_NUM_TIME_REGS);
  117. if (ret < 0) {
  118. dev_err(dev, "RTC_ALARM_SECONDS read failed, err = %d\n", ret);
  119. return ret;
  120. }
  121. alm->time.tm_sec = bcd2bin(alarm_data[0]);
  122. alm->time.tm_min = bcd2bin(alarm_data[1]);
  123. alm->time.tm_hour = bcd2bin(alarm_data[2]);
  124. alm->time.tm_mday = bcd2bin(alarm_data[3]);
  125. alm->time.tm_mon = bcd2bin(alarm_data[4]) - 1;
  126. alm->time.tm_year = bcd2bin(alarm_data[5]) + 100;
  127. ret = palmas_read(palmas, PALMAS_RTC_BASE, PALMAS_RTC_INTERRUPTS_REG,
  128. &int_val);
  129. if (ret < 0) {
  130. dev_err(dev, "RTC_INTERRUPTS reg read failed, err = %d\n", ret);
  131. return ret;
  132. }
  133. if (int_val & PALMAS_RTC_INTERRUPTS_REG_IT_ALARM)
  134. alm->enabled = 1;
  135. return ret;
  136. }
  137. static int palmas_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  138. {
  139. unsigned char alarm_data[PALMAS_NUM_TIME_REGS];
  140. struct palmas *palmas = dev_get_drvdata(dev->parent);
  141. int ret;
  142. ret = palmas_rtc_alarm_irq_enable(dev, 0);
  143. if (ret < 0) {
  144. dev_err(dev, "Disable RTC alarm failed\n");
  145. return ret;
  146. }
  147. alarm_data[0] = bin2bcd(alm->time.tm_sec);
  148. alarm_data[1] = bin2bcd(alm->time.tm_min);
  149. alarm_data[2] = bin2bcd(alm->time.tm_hour);
  150. alarm_data[3] = bin2bcd(alm->time.tm_mday);
  151. alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
  152. alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
  153. ret = palmas_bulk_write(palmas, PALMAS_RTC_BASE,
  154. PALMAS_ALARM_SECONDS_REG, alarm_data, PALMAS_NUM_TIME_REGS);
  155. if (ret < 0) {
  156. dev_err(dev, "ALARM_SECONDS_REG write failed, err = %d\n", ret);
  157. return ret;
  158. }
  159. if (alm->enabled)
  160. ret = palmas_rtc_alarm_irq_enable(dev, 1);
  161. return ret;
  162. }
  163. static int palmas_clear_interrupts(struct device *dev)
  164. {
  165. struct palmas *palmas = dev_get_drvdata(dev->parent);
  166. unsigned int rtc_reg;
  167. int ret;
  168. ret = palmas_read(palmas, PALMAS_RTC_BASE, PALMAS_RTC_STATUS_REG,
  169. &rtc_reg);
  170. if (ret < 0) {
  171. dev_err(dev, "RTC_STATUS read failed, err = %d\n", ret);
  172. return ret;
  173. }
  174. ret = palmas_write(palmas, PALMAS_RTC_BASE, PALMAS_RTC_STATUS_REG,
  175. rtc_reg);
  176. if (ret < 0) {
  177. dev_err(dev, "RTC_STATUS write failed, err = %d\n", ret);
  178. return ret;
  179. }
  180. return 0;
  181. }
  182. static irqreturn_t palmas_rtc_interrupt(int irq, void *context)
  183. {
  184. struct palmas_rtc *palmas_rtc = context;
  185. struct device *dev = palmas_rtc->dev;
  186. int ret;
  187. ret = palmas_clear_interrupts(dev);
  188. if (ret < 0) {
  189. dev_err(dev, "RTC interrupt clear failed, err = %d\n", ret);
  190. return IRQ_NONE;
  191. }
  192. rtc_update_irq(palmas_rtc->rtc, 1, RTC_IRQF | RTC_AF);
  193. return IRQ_HANDLED;
  194. }
  195. static struct rtc_class_ops palmas_rtc_ops = {
  196. .read_time = palmas_rtc_read_time,
  197. .set_time = palmas_rtc_set_time,
  198. .read_alarm = palmas_rtc_read_alarm,
  199. .set_alarm = palmas_rtc_set_alarm,
  200. .alarm_irq_enable = palmas_rtc_alarm_irq_enable,
  201. };
  202. static int palmas_rtc_probe(struct platform_device *pdev)
  203. {
  204. struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
  205. struct palmas_rtc *palmas_rtc = NULL;
  206. int ret;
  207. bool enable_bb_charging = false;
  208. bool high_bb_charging = false;
  209. if (pdev->dev.of_node) {
  210. enable_bb_charging = of_property_read_bool(pdev->dev.of_node,
  211. "ti,backup-battery-chargeable");
  212. high_bb_charging = of_property_read_bool(pdev->dev.of_node,
  213. "ti,backup-battery-charge-high-current");
  214. }
  215. palmas_rtc = devm_kzalloc(&pdev->dev, sizeof(struct palmas_rtc),
  216. GFP_KERNEL);
  217. if (!palmas_rtc)
  218. return -ENOMEM;
  219. /* Clear pending interrupts */
  220. ret = palmas_clear_interrupts(&pdev->dev);
  221. if (ret < 0) {
  222. dev_err(&pdev->dev, "clear RTC int failed, err = %d\n", ret);
  223. return ret;
  224. }
  225. palmas_rtc->dev = &pdev->dev;
  226. platform_set_drvdata(pdev, palmas_rtc);
  227. if (enable_bb_charging) {
  228. unsigned reg = PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG;
  229. if (high_bb_charging)
  230. reg = 0;
  231. ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
  232. PALMAS_BACKUP_BATTERY_CTRL,
  233. PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG, reg);
  234. if (ret < 0) {
  235. dev_err(&pdev->dev,
  236. "BACKUP_BATTERY_CTRL update failed, %d\n", ret);
  237. return ret;
  238. }
  239. ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
  240. PALMAS_BACKUP_BATTERY_CTRL,
  241. PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN,
  242. PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN);
  243. if (ret < 0) {
  244. dev_err(&pdev->dev,
  245. "BACKUP_BATTERY_CTRL update failed, %d\n", ret);
  246. return ret;
  247. }
  248. }
  249. /* Start RTC */
  250. ret = palmas_update_bits(palmas, PALMAS_RTC_BASE, PALMAS_RTC_CTRL_REG,
  251. PALMAS_RTC_CTRL_REG_STOP_RTC,
  252. PALMAS_RTC_CTRL_REG_STOP_RTC);
  253. if (ret < 0) {
  254. dev_err(&pdev->dev, "RTC_CTRL write failed, err = %d\n", ret);
  255. return ret;
  256. }
  257. palmas_rtc->irq = platform_get_irq(pdev, 0);
  258. device_init_wakeup(&pdev->dev, 1);
  259. palmas_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
  260. &palmas_rtc_ops, THIS_MODULE);
  261. if (IS_ERR(palmas_rtc->rtc)) {
  262. ret = PTR_ERR(palmas_rtc->rtc);
  263. dev_err(&pdev->dev, "RTC register failed, err = %d\n", ret);
  264. return ret;
  265. }
  266. ret = devm_request_threaded_irq(&pdev->dev, palmas_rtc->irq, NULL,
  267. palmas_rtc_interrupt,
  268. IRQF_TRIGGER_LOW | IRQF_ONESHOT |
  269. IRQF_EARLY_RESUME,
  270. dev_name(&pdev->dev), palmas_rtc);
  271. if (ret < 0) {
  272. dev_err(&pdev->dev, "IRQ request failed, err = %d\n", ret);
  273. return ret;
  274. }
  275. return 0;
  276. }
  277. static int palmas_rtc_remove(struct platform_device *pdev)
  278. {
  279. palmas_rtc_alarm_irq_enable(&pdev->dev, 0);
  280. return 0;
  281. }
  282. #ifdef CONFIG_PM_SLEEP
  283. static int palmas_rtc_suspend(struct device *dev)
  284. {
  285. struct palmas_rtc *palmas_rtc = dev_get_drvdata(dev);
  286. if (device_may_wakeup(dev))
  287. enable_irq_wake(palmas_rtc->irq);
  288. return 0;
  289. }
  290. static int palmas_rtc_resume(struct device *dev)
  291. {
  292. struct palmas_rtc *palmas_rtc = dev_get_drvdata(dev);
  293. if (device_may_wakeup(dev))
  294. disable_irq_wake(palmas_rtc->irq);
  295. return 0;
  296. }
  297. #endif
  298. static SIMPLE_DEV_PM_OPS(palmas_rtc_pm_ops, palmas_rtc_suspend,
  299. palmas_rtc_resume);
  300. #ifdef CONFIG_OF
  301. static const struct of_device_id of_palmas_rtc_match[] = {
  302. { .compatible = "ti,palmas-rtc"},
  303. { },
  304. };
  305. MODULE_DEVICE_TABLE(of, of_palmas_rtc_match);
  306. #endif
  307. static struct platform_driver palmas_rtc_driver = {
  308. .probe = palmas_rtc_probe,
  309. .remove = palmas_rtc_remove,
  310. .driver = {
  311. .name = "palmas-rtc",
  312. .pm = &palmas_rtc_pm_ops,
  313. .of_match_table = of_match_ptr(of_palmas_rtc_match),
  314. },
  315. };
  316. module_platform_driver(palmas_rtc_driver);
  317. MODULE_ALIAS("platform:palmas_rtc");
  318. MODULE_DESCRIPTION("TI PALMAS series RTC driver");
  319. MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
  320. MODULE_LICENSE("GPL v2");