fw.c 20 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2014 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../core.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "fw.h"
  32. #include "../rtl8723com/fw_common.h"
  33. static bool _rtl8723be_check_fw_read_last_h2c(struct ieee80211_hw *hw,
  34. u8 boxnum)
  35. {
  36. struct rtl_priv *rtlpriv = rtl_priv(hw);
  37. u8 val_hmetfr;
  38. bool result = false;
  39. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  40. if (((val_hmetfr >> boxnum) & BIT(0)) == 0)
  41. result = true;
  42. return result;
  43. }
  44. static void _rtl8723be_fill_h2c_command(struct ieee80211_hw *hw, u8 element_id,
  45. u32 cmd_len, u8 *p_cmdbuffer)
  46. {
  47. struct rtl_priv *rtlpriv = rtl_priv(hw);
  48. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  49. u8 boxnum;
  50. u16 box_reg = 0, box_extreg = 0;
  51. u8 u1b_tmp;
  52. bool isfw_read = false;
  53. u8 buf_index = 0;
  54. bool bwrite_sucess = false;
  55. u8 wait_h2c_limmit = 100;
  56. u8 wait_writeh2c_limmit = 100;
  57. u8 boxcontent[4], boxextcontent[4];
  58. u32 h2c_waitcounter = 0;
  59. unsigned long flag;
  60. u8 idx;
  61. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "come in\n");
  62. while (true) {
  63. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  64. if (rtlhal->h2c_setinprogress) {
  65. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  66. "H2C set in progress! Wait to set..element_id(%d).\n",
  67. element_id);
  68. while (rtlhal->h2c_setinprogress) {
  69. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  70. flag);
  71. h2c_waitcounter++;
  72. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  73. "Wait 100 us (%d times)...\n",
  74. h2c_waitcounter);
  75. udelay(100);
  76. if (h2c_waitcounter > 1000)
  77. return;
  78. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  79. flag);
  80. }
  81. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  82. } else {
  83. rtlhal->h2c_setinprogress = true;
  84. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  85. break;
  86. }
  87. }
  88. while (!bwrite_sucess) {
  89. wait_writeh2c_limmit--;
  90. if (wait_writeh2c_limmit == 0) {
  91. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  92. "Write H2C fail because no trigger for FW INT!\n");
  93. break;
  94. }
  95. boxnum = rtlhal->last_hmeboxnum;
  96. switch (boxnum) {
  97. case 0:
  98. box_reg = REG_HMEBOX_0;
  99. box_extreg = REG_HMEBOX_EXT_0;
  100. break;
  101. case 1:
  102. box_reg = REG_HMEBOX_1;
  103. box_extreg = REG_HMEBOX_EXT_1;
  104. break;
  105. case 2:
  106. box_reg = REG_HMEBOX_2;
  107. box_extreg = REG_HMEBOX_EXT_2;
  108. break;
  109. case 3:
  110. box_reg = REG_HMEBOX_3;
  111. box_extreg = REG_HMEBOX_EXT_3;
  112. break;
  113. default:
  114. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  115. "switch case not process\n");
  116. break;
  117. }
  118. isfw_read = _rtl8723be_check_fw_read_last_h2c(hw, boxnum);
  119. while (!isfw_read) {
  120. wait_h2c_limmit--;
  121. if (wait_h2c_limmit == 0) {
  122. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  123. "Waiting too long for FW read clear HMEBox(%d)!\n",
  124. boxnum);
  125. break;
  126. }
  127. udelay(10);
  128. isfw_read = _rtl8723be_check_fw_read_last_h2c(hw,
  129. boxnum);
  130. u1b_tmp = rtl_read_byte(rtlpriv, 0x130);
  131. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  132. "Waiting for FW read clear HMEBox(%d)!!! 0x130 = %2x\n",
  133. boxnum, u1b_tmp);
  134. }
  135. if (!isfw_read) {
  136. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  137. "Write H2C register BOX[%d] fail!!!!! Fw do not read.\n",
  138. boxnum);
  139. break;
  140. }
  141. memset(boxcontent, 0, sizeof(boxcontent));
  142. memset(boxextcontent, 0, sizeof(boxextcontent));
  143. boxcontent[0] = element_id;
  144. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  145. "Write element_id box_reg(%4x) = %2x\n",
  146. box_reg, element_id);
  147. switch (cmd_len) {
  148. case 1:
  149. case 2:
  150. case 3:
  151. /*boxcontent[0] &= ~(BIT(7));*/
  152. memcpy((u8 *)(boxcontent) + 1,
  153. p_cmdbuffer + buf_index, cmd_len);
  154. for (idx = 0; idx < 4; idx++) {
  155. rtl_write_byte(rtlpriv, box_reg + idx,
  156. boxcontent[idx]);
  157. }
  158. break;
  159. case 4:
  160. case 5:
  161. case 6:
  162. case 7:
  163. /*boxcontent[0] |= (BIT(7));*/
  164. memcpy((u8 *)(boxextcontent),
  165. p_cmdbuffer + buf_index+3, cmd_len-3);
  166. memcpy((u8 *)(boxcontent) + 1,
  167. p_cmdbuffer + buf_index, 3);
  168. for (idx = 0; idx < 4; idx++) {
  169. rtl_write_byte(rtlpriv, box_extreg + idx,
  170. boxextcontent[idx]);
  171. }
  172. for (idx = 0; idx < 4; idx++) {
  173. rtl_write_byte(rtlpriv, box_reg + idx,
  174. boxcontent[idx]);
  175. }
  176. break;
  177. default:
  178. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  179. "switch case not process\n");
  180. break;
  181. }
  182. bwrite_sucess = true;
  183. rtlhal->last_hmeboxnum = boxnum + 1;
  184. if (rtlhal->last_hmeboxnum == 4)
  185. rtlhal->last_hmeboxnum = 0;
  186. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  187. "pHalData->last_hmeboxnum = %d\n",
  188. rtlhal->last_hmeboxnum);
  189. }
  190. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  191. rtlhal->h2c_setinprogress = false;
  192. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  193. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "go out\n");
  194. }
  195. void rtl8723be_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
  196. u32 cmd_len, u8 *p_cmdbuffer)
  197. {
  198. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  199. u32 tmp_cmdbuf[2];
  200. if (!rtlhal->fw_ready) {
  201. RT_ASSERT(false,
  202. "return H2C cmd because of Fw download fail!!!\n");
  203. return;
  204. }
  205. memset(tmp_cmdbuf, 0, 8);
  206. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  207. _rtl8723be_fill_h2c_command(hw, element_id, cmd_len,
  208. (u8 *)&tmp_cmdbuf);
  209. return;
  210. }
  211. void rtl8723be_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  212. {
  213. struct rtl_priv *rtlpriv = rtl_priv(hw);
  214. u8 u1_h2c_set_pwrmode[H2C_PWEMODE_LENGTH] = { 0 };
  215. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  216. u8 rlbm, power_state = 0;
  217. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "FW LPS mode = %d\n", mode);
  218. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, ((mode) ? 1 : 0));
  219. rlbm = 0;/*YJ,temp,120316. FW now not support RLBM=2.*/
  220. SET_H2CCMD_PWRMODE_PARM_RLBM(u1_h2c_set_pwrmode, rlbm);
  221. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode,
  222. (rtlpriv->mac80211.p2p) ?
  223. ppsc->smart_ps : 1);
  224. SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(u1_h2c_set_pwrmode,
  225. ppsc->reg_max_lps_awakeintvl);
  226. SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1_h2c_set_pwrmode, 0);
  227. if (mode == FW_PS_ACTIVE_MODE)
  228. power_state |= FW_PWR_STATE_ACTIVE;
  229. else
  230. power_state |= FW_PWR_STATE_RF_OFF;
  231. SET_H2CCMD_PWRMODE_PARM_PWR_STATE(u1_h2c_set_pwrmode, power_state);
  232. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  233. "rtl92c_set_fw_pwrmode(): u1_h2c_set_pwrmode\n",
  234. u1_h2c_set_pwrmode, H2C_PWEMODE_LENGTH);
  235. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_SETPWRMODE, H2C_PWEMODE_LENGTH,
  236. u1_h2c_set_pwrmode);
  237. }
  238. void rtl8723be_set_fw_media_status_rpt_cmd(struct ieee80211_hw *hw, u8 mstatus)
  239. {
  240. u8 parm[3] = { 0, 0, 0 };
  241. /* parm[0]: bit0=0-->Disconnect, bit0=1-->Connect
  242. * bit1=0-->update Media Status to MACID
  243. * bit1=1-->update Media Status from MACID to MACID_End
  244. * parm[1]: MACID, if this is INFRA_STA, MacID = 0
  245. * parm[2]: MACID_End
  246. */
  247. SET_H2CCMD_MSRRPT_PARM_OPMODE(parm, mstatus);
  248. SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, 0);
  249. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_MSRRPT, 3, parm);
  250. }
  251. #define BEACON_PG 0 /* ->1 */
  252. #define PSPOLL_PG 2
  253. #define NULL_PG 3
  254. #define PROBERSP_PG 4 /* ->5 */
  255. #define TOTAL_RESERVED_PKT_LEN 768
  256. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  257. /* page 0 beacon */
  258. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  259. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
  260. 0xEC, 0x1A, 0x59, 0x0B, 0xAD, 0xD4, 0x20, 0x00,
  261. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  262. 0x64, 0x00, 0x10, 0x04, 0x00, 0x05, 0x54, 0x65,
  263. 0x73, 0x74, 0x32, 0x01, 0x08, 0x82, 0x84, 0x0B,
  264. 0x16, 0x24, 0x30, 0x48, 0x6C, 0x03, 0x01, 0x06,
  265. 0x06, 0x02, 0x00, 0x00, 0x2A, 0x01, 0x02, 0x32,
  266. 0x04, 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C,
  267. 0x09, 0x03, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
  268. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  269. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  270. 0x00, 0x3D, 0x00, 0xDD, 0x07, 0x00, 0xE0, 0x4C,
  271. 0x02, 0x02, 0x00, 0x00, 0xDD, 0x18, 0x00, 0x50,
  272. 0xF2, 0x01, 0x01, 0x00, 0x00, 0x50, 0xF2, 0x04,
  273. 0x01, 0x00, 0x00, 0x50, 0xF2, 0x04, 0x01, 0x00,
  274. /* page 1 beacon */
  275. 0x00, 0x50, 0xF2, 0x02, 0x00, 0x00, 0x00, 0x00,
  276. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  277. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  278. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  279. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  280. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  281. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  282. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  283. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  284. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  285. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  286. 0x10, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
  287. 0x00, 0x00, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00,
  288. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  289. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  290. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  291. /* page 2 ps-poll */
  292. 0xA4, 0x10, 0x01, 0xC0, 0xEC, 0x1A, 0x59, 0x0B,
  293. 0xAD, 0xD4, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
  294. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  295. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  296. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  297. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  298. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  299. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  300. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  301. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  302. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  303. 0x18, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
  304. 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
  305. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  306. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  307. 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  308. /* page 3 null */
  309. 0x48, 0x01, 0x00, 0x00, 0xEC, 0x1A, 0x59, 0x0B,
  310. 0xAD, 0xD4, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
  311. 0xEC, 0x1A, 0x59, 0x0B, 0xAD, 0xD4, 0x00, 0x00,
  312. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  313. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  314. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  315. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  316. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  317. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  318. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  319. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  320. 0x72, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
  321. 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
  322. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  323. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  324. 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  325. /* page 4 probe_resp */
  326. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  327. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  328. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  329. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  330. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  331. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  332. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  333. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  334. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  335. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  336. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  337. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  338. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  339. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  340. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  341. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  342. /* page 5 probe_resp */
  343. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  344. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  345. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  346. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  347. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  348. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  349. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  350. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  351. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  352. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  353. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  354. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  355. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  356. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  357. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  358. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  359. };
  360. void rtl8723be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw,
  361. bool b_dl_finished)
  362. {
  363. struct rtl_priv *rtlpriv = rtl_priv(hw);
  364. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  365. struct sk_buff *skb = NULL;
  366. u32 totalpacketlen;
  367. bool rtstatus;
  368. u8 u1rsvdpageloc[5] = { 0 };
  369. bool b_dlok = false;
  370. u8 *beacon;
  371. u8 *p_pspoll;
  372. u8 *nullfunc;
  373. u8 *p_probersp;
  374. /*---------------------------------------------------------
  375. * (1) beacon
  376. *---------------------------------------------------------
  377. */
  378. beacon = &reserved_page_packet[BEACON_PG * 128];
  379. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  380. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  381. /*-------------------------------------------------------
  382. * (2) ps-poll
  383. *-------------------------------------------------------
  384. */
  385. p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  386. SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
  387. SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
  388. SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
  389. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1rsvdpageloc, PSPOLL_PG);
  390. /*--------------------------------------------------------
  391. * (3) null data
  392. *--------------------------------------------------------
  393. */
  394. nullfunc = &reserved_page_packet[NULL_PG * 128];
  395. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  396. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  397. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  398. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1rsvdpageloc, NULL_PG);
  399. /*---------------------------------------------------------
  400. * (4) probe response
  401. *---------------------------------------------------------
  402. */
  403. p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
  404. SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
  405. SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
  406. SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
  407. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1rsvdpageloc, PROBERSP_PG);
  408. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  409. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  410. "rtl8723be_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  411. &reserved_page_packet[0], totalpacketlen);
  412. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  413. "rtl8723be_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  414. u1rsvdpageloc, 3);
  415. skb = dev_alloc_skb(totalpacketlen);
  416. memcpy((u8 *)skb_put(skb, totalpacketlen),
  417. &reserved_page_packet, totalpacketlen);
  418. rtstatus = rtl_cmd_send_packet(hw, skb);
  419. if (rtstatus)
  420. b_dlok = true;
  421. if (b_dlok) {
  422. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  423. "Set RSVD page location to Fw.\n");
  424. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG, "H2C_RSVDPAGE:\n",
  425. u1rsvdpageloc, 3);
  426. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_RSVDPAGE,
  427. sizeof(u1rsvdpageloc), u1rsvdpageloc);
  428. } else
  429. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  430. "Set RSVD page location to Fw FAIL!!!!!!.\n");
  431. }
  432. /*Should check FW support p2p or not.*/
  433. static void rtl8723be_set_p2p_ctw_period_cmd(struct ieee80211_hw *hw,
  434. u8 ctwindow)
  435. {
  436. u8 u1_ctwindow_period[1] = { ctwindow};
  437. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_P2P_PS_CTW_CMD, 1,
  438. u1_ctwindow_period);
  439. }
  440. void rtl8723be_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw,
  441. u8 p2p_ps_state)
  442. {
  443. struct rtl_priv *rtlpriv = rtl_priv(hw);
  444. struct rtl_ps_ctl *rtlps = rtl_psc(rtl_priv(hw));
  445. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  446. struct rtl_p2p_ps_info *p2pinfo = &(rtlps->p2p_ps_info);
  447. struct p2p_ps_offload_t *p2p_ps_offload = &rtlhal->p2p_ps_offload;
  448. u8 i;
  449. u16 ctwindow;
  450. u32 start_time, tsf_low;
  451. switch (p2p_ps_state) {
  452. case P2P_PS_DISABLE:
  453. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_DISABLE\n");
  454. memset(p2p_ps_offload, 0, sizeof(*p2p_ps_offload));
  455. break;
  456. case P2P_PS_ENABLE:
  457. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_ENABLE\n");
  458. /* update CTWindow value. */
  459. if (p2pinfo->ctwindow > 0) {
  460. p2p_ps_offload->ctwindow_en = 1;
  461. ctwindow = p2pinfo->ctwindow;
  462. rtl8723be_set_p2p_ctw_period_cmd(hw, ctwindow);
  463. }
  464. /* hw only support 2 set of NoA */
  465. for (i = 0 ; i < p2pinfo->noa_num ; i++) {
  466. /* To control the register setting
  467. * for which NOA
  468. */
  469. rtl_write_byte(rtlpriv, 0x5cf, (i << 4));
  470. if (i == 0)
  471. p2p_ps_offload->noa0_en = 1;
  472. else
  473. p2p_ps_offload->noa1_en = 1;
  474. /* config P2P NoA Descriptor Register */
  475. rtl_write_dword(rtlpriv, 0x5E0,
  476. p2pinfo->noa_duration[i]);
  477. rtl_write_dword(rtlpriv, 0x5E4,
  478. p2pinfo->noa_interval[i]);
  479. /*Get Current TSF value */
  480. tsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
  481. start_time = p2pinfo->noa_start_time[i];
  482. if (p2pinfo->noa_count_type[i] != 1) {
  483. while (start_time <= (tsf_low + (50 * 1024))) {
  484. start_time += p2pinfo->noa_interval[i];
  485. if (p2pinfo->noa_count_type[i] != 255)
  486. p2pinfo->noa_count_type[i]--;
  487. }
  488. }
  489. rtl_write_dword(rtlpriv, 0x5E8, start_time);
  490. rtl_write_dword(rtlpriv, 0x5EC,
  491. p2pinfo->noa_count_type[i]);
  492. }
  493. if ((p2pinfo->opp_ps == 1) ||
  494. (p2pinfo->noa_num > 0)) {
  495. /* rst p2p circuit */
  496. rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, BIT(4));
  497. p2p_ps_offload->offload_en = 1;
  498. if (P2P_ROLE_GO == rtlpriv->mac80211.p2p) {
  499. p2p_ps_offload->role = 1;
  500. p2p_ps_offload->allstasleep = 0;
  501. } else {
  502. p2p_ps_offload->role = 0;
  503. }
  504. p2p_ps_offload->discovery = 0;
  505. }
  506. break;
  507. case P2P_PS_SCAN:
  508. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN\n");
  509. p2p_ps_offload->discovery = 1;
  510. break;
  511. case P2P_PS_SCAN_DONE:
  512. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN_DONE\n");
  513. p2p_ps_offload->discovery = 0;
  514. p2pinfo->p2p_ps_state = P2P_PS_ENABLE;
  515. break;
  516. default:
  517. break;
  518. }
  519. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_P2P_PS_OFFLOAD, 1,
  520. (u8 *)p2p_ps_offload);
  521. }
  522. static void _rtl8723be_c2h_content_parsing(struct ieee80211_hw *hw,
  523. u8 c2h_cmd_id,
  524. u8 c2h_cmd_len, u8 *tmp_buf)
  525. {
  526. struct rtl_priv *rtlpriv = rtl_priv(hw);
  527. switch (c2h_cmd_id) {
  528. case C2H_8723B_DBG:
  529. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  530. "[C2H], C2H_8723BE_DBG!!\n");
  531. break;
  532. case C2H_8723B_TX_REPORT:
  533. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  534. "[C2H], C2H_8723BE_TX_REPORT!\n");
  535. break;
  536. case C2H_8723B_BT_INFO:
  537. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  538. "[C2H], C2H_8723BE_BT_INFO!!\n");
  539. rtlpriv->btcoexist.btc_ops->btc_btinfo_notify(rtlpriv, tmp_buf,
  540. c2h_cmd_len);
  541. break;
  542. case C2H_8723B_BT_MP:
  543. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  544. "[C2H], C2H_8723BE_BT_MP!!\n");
  545. break;
  546. default:
  547. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  548. "[C2H], Unknown packet!! CmdId(%#X)!\n", c2h_cmd_id);
  549. break;
  550. }
  551. }
  552. void rtl8723be_c2h_packet_handler(struct ieee80211_hw *hw, u8 *buffer, u8 len)
  553. {
  554. struct rtl_priv *rtlpriv = rtl_priv(hw);
  555. u8 c2h_cmd_id = 0, c2h_cmd_seq = 0, c2h_cmd_len = 0;
  556. u8 *tmp_buf = NULL;
  557. c2h_cmd_id = buffer[0];
  558. c2h_cmd_seq = buffer[1];
  559. c2h_cmd_len = len - 2;
  560. tmp_buf = buffer + 2;
  561. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  562. "[C2H packet], c2hCmdId=0x%x, c2hCmdSeq=0x%x, c2hCmdLen=%d\n",
  563. c2h_cmd_id, c2h_cmd_seq, c2h_cmd_len);
  564. RT_PRINT_DATA(rtlpriv, COMP_FW, DBG_TRACE,
  565. "[C2H packet], Content Hex:\n", tmp_buf, c2h_cmd_len);
  566. _rtl8723be_c2h_content_parsing(hw, c2h_cmd_id, c2h_cmd_len, tmp_buf);
  567. }