trx.c 26 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../pci.h"
  31. #include "../base.h"
  32. #include "reg.h"
  33. #include "def.h"
  34. #include "phy.h"
  35. #include "trx.h"
  36. #include "led.h"
  37. static u8 _rtl92de_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
  38. {
  39. __le16 fc = rtl_get_fc(skb);
  40. if (unlikely(ieee80211_is_beacon(fc)))
  41. return QSLT_BEACON;
  42. if (ieee80211_is_mgmt(fc))
  43. return QSLT_MGNT;
  44. return skb->priority;
  45. }
  46. static u8 _rtl92d_query_rxpwrpercentage(char antpower)
  47. {
  48. if ((antpower <= -100) || (antpower >= 20))
  49. return 0;
  50. else if (antpower >= 0)
  51. return 100;
  52. else
  53. return 100 + antpower;
  54. }
  55. static u8 _rtl92d_evm_db_to_percentage(char value)
  56. {
  57. char ret_val = value;
  58. if (ret_val >= 0)
  59. ret_val = 0;
  60. if (ret_val <= -33)
  61. ret_val = -33;
  62. ret_val = 0 - ret_val;
  63. ret_val *= 3;
  64. if (ret_val == 99)
  65. ret_val = 100;
  66. return ret_val;
  67. }
  68. static long _rtl92de_translate_todbm(struct ieee80211_hw *hw,
  69. u8 signal_strength_index)
  70. {
  71. long signal_power;
  72. signal_power = (long)((signal_strength_index + 1) >> 1);
  73. signal_power -= 95;
  74. return signal_power;
  75. }
  76. static long _rtl92de_signal_scale_mapping(struct ieee80211_hw *hw, long currsig)
  77. {
  78. long retsig;
  79. if (currsig >= 61 && currsig <= 100)
  80. retsig = 90 + ((currsig - 60) / 4);
  81. else if (currsig >= 41 && currsig <= 60)
  82. retsig = 78 + ((currsig - 40) / 2);
  83. else if (currsig >= 31 && currsig <= 40)
  84. retsig = 66 + (currsig - 30);
  85. else if (currsig >= 21 && currsig <= 30)
  86. retsig = 54 + (currsig - 20);
  87. else if (currsig >= 5 && currsig <= 20)
  88. retsig = 42 + (((currsig - 5) * 2) / 3);
  89. else if (currsig == 4)
  90. retsig = 36;
  91. else if (currsig == 3)
  92. retsig = 27;
  93. else if (currsig == 2)
  94. retsig = 18;
  95. else if (currsig == 1)
  96. retsig = 9;
  97. else
  98. retsig = currsig;
  99. return retsig;
  100. }
  101. static void _rtl92de_query_rxphystatus(struct ieee80211_hw *hw,
  102. struct rtl_stats *pstats,
  103. struct rx_desc_92d *pdesc,
  104. struct rx_fwinfo_92d *p_drvinfo,
  105. bool packet_match_bssid,
  106. bool packet_toself,
  107. bool packet_beacon)
  108. {
  109. struct rtl_priv *rtlpriv = rtl_priv(hw);
  110. struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
  111. struct phy_sts_cck_8192d *cck_buf;
  112. s8 rx_pwr_all, rx_pwr[4];
  113. u8 rf_rx_num = 0, evm, pwdb_all;
  114. u8 i, max_spatial_stream;
  115. u32 rssi, total_rssi = 0;
  116. bool is_cck_rate;
  117. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc->rxmcs);
  118. pstats->packet_matchbssid = packet_match_bssid;
  119. pstats->packet_toself = packet_toself;
  120. pstats->packet_beacon = packet_beacon;
  121. pstats->is_cck = is_cck_rate;
  122. pstats->rx_mimo_sig_qual[0] = -1;
  123. pstats->rx_mimo_sig_qual[1] = -1;
  124. if (is_cck_rate) {
  125. u8 report, cck_highpwr;
  126. cck_buf = (struct phy_sts_cck_8192d *)p_drvinfo;
  127. if (ppsc->rfpwr_state == ERFON)
  128. cck_highpwr = (u8) rtl_get_bbreg(hw,
  129. RFPGA0_XA_HSSIPARAMETER2,
  130. BIT(9));
  131. else
  132. cck_highpwr = false;
  133. if (!cck_highpwr) {
  134. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  135. report = cck_buf->cck_agc_rpt & 0xc0;
  136. report = report >> 6;
  137. switch (report) {
  138. case 0x3:
  139. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  140. break;
  141. case 0x2:
  142. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  143. break;
  144. case 0x1:
  145. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  146. break;
  147. case 0x0:
  148. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  149. break;
  150. }
  151. } else {
  152. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  153. report = p_drvinfo->cfosho[0] & 0x60;
  154. report = report >> 5;
  155. switch (report) {
  156. case 0x3:
  157. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  158. break;
  159. case 0x2:
  160. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  161. break;
  162. case 0x1:
  163. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  164. break;
  165. case 0x0:
  166. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  167. break;
  168. }
  169. }
  170. pwdb_all = _rtl92d_query_rxpwrpercentage(rx_pwr_all);
  171. /* CCK gain is smaller than OFDM/MCS gain, */
  172. /* so we add gain diff by experiences, the val is 6 */
  173. pwdb_all += 6;
  174. if (pwdb_all > 100)
  175. pwdb_all = 100;
  176. /* modify the offset to make the same gain index with OFDM. */
  177. if (pwdb_all > 34 && pwdb_all <= 42)
  178. pwdb_all -= 2;
  179. else if (pwdb_all > 26 && pwdb_all <= 34)
  180. pwdb_all -= 6;
  181. else if (pwdb_all > 14 && pwdb_all <= 26)
  182. pwdb_all -= 8;
  183. else if (pwdb_all > 4 && pwdb_all <= 14)
  184. pwdb_all -= 4;
  185. pstats->rx_pwdb_all = pwdb_all;
  186. pstats->recvsignalpower = rx_pwr_all;
  187. if (packet_match_bssid) {
  188. u8 sq;
  189. if (pstats->rx_pwdb_all > 40) {
  190. sq = 100;
  191. } else {
  192. sq = cck_buf->sq_rpt;
  193. if (sq > 64)
  194. sq = 0;
  195. else if (sq < 20)
  196. sq = 100;
  197. else
  198. sq = ((64 - sq) * 100) / 44;
  199. }
  200. pstats->signalquality = sq;
  201. pstats->rx_mimo_sig_qual[0] = sq;
  202. pstats->rx_mimo_sig_qual[1] = -1;
  203. }
  204. } else {
  205. rtlpriv->dm.rfpath_rxenable[0] = true;
  206. rtlpriv->dm.rfpath_rxenable[1] = true;
  207. for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
  208. if (rtlpriv->dm.rfpath_rxenable[i])
  209. rf_rx_num++;
  210. rx_pwr[i] = ((p_drvinfo->gain_trsw[i] & 0x3f) * 2)
  211. - 110;
  212. rssi = _rtl92d_query_rxpwrpercentage(rx_pwr[i]);
  213. total_rssi += rssi;
  214. rtlpriv->stats.rx_snr_db[i] =
  215. (long)(p_drvinfo->rxsnr[i] / 2);
  216. if (packet_match_bssid)
  217. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  218. }
  219. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 106;
  220. pwdb_all = _rtl92d_query_rxpwrpercentage(rx_pwr_all);
  221. pstats->rx_pwdb_all = pwdb_all;
  222. pstats->rxpower = rx_pwr_all;
  223. pstats->recvsignalpower = rx_pwr_all;
  224. if (pdesc->rxht && pdesc->rxmcs >= DESC_RATEMCS8 &&
  225. pdesc->rxmcs <= DESC_RATEMCS15)
  226. max_spatial_stream = 2;
  227. else
  228. max_spatial_stream = 1;
  229. for (i = 0; i < max_spatial_stream; i++) {
  230. evm = _rtl92d_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  231. if (packet_match_bssid) {
  232. if (i == 0)
  233. pstats->signalquality =
  234. (u8)(evm & 0xff);
  235. pstats->rx_mimo_sig_qual[i] =
  236. (u8)(evm & 0xff);
  237. }
  238. }
  239. }
  240. if (is_cck_rate)
  241. pstats->signalstrength = (u8)(_rtl92de_signal_scale_mapping(hw,
  242. pwdb_all));
  243. else if (rf_rx_num != 0)
  244. pstats->signalstrength = (u8)(_rtl92de_signal_scale_mapping(hw,
  245. total_rssi /= rf_rx_num));
  246. }
  247. static void rtl92d_loop_over_paths(struct ieee80211_hw *hw,
  248. struct rtl_stats *pstats)
  249. {
  250. struct rtl_priv *rtlpriv = rtl_priv(hw);
  251. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  252. u8 rfpath;
  253. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  254. rfpath++) {
  255. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  256. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  257. pstats->rx_mimo_signalstrength[rfpath];
  258. }
  259. if (pstats->rx_mimo_signalstrength[rfpath] >
  260. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  261. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  262. ((rtlpriv->stats.rx_rssi_percentage[rfpath] *
  263. (RX_SMOOTH_FACTOR - 1)) +
  264. (pstats->rx_mimo_signalstrength[rfpath])) /
  265. (RX_SMOOTH_FACTOR);
  266. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  267. rtlpriv->stats.rx_rssi_percentage[rfpath] + 1;
  268. } else {
  269. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  270. ((rtlpriv->stats.rx_rssi_percentage[rfpath] *
  271. (RX_SMOOTH_FACTOR - 1)) +
  272. (pstats->rx_mimo_signalstrength[rfpath])) /
  273. (RX_SMOOTH_FACTOR);
  274. }
  275. }
  276. }
  277. static void _rtl92de_process_ui_rssi(struct ieee80211_hw *hw,
  278. struct rtl_stats *pstats)
  279. {
  280. struct rtl_priv *rtlpriv = rtl_priv(hw);
  281. u32 last_rssi, tmpval;
  282. if (pstats->packet_toself || pstats->packet_beacon) {
  283. rtlpriv->stats.rssi_calculate_cnt++;
  284. if (rtlpriv->stats.ui_rssi.total_num++ >=
  285. PHY_RSSI_SLID_WIN_MAX) {
  286. rtlpriv->stats.ui_rssi.total_num =
  287. PHY_RSSI_SLID_WIN_MAX;
  288. last_rssi = rtlpriv->stats.ui_rssi.elements[
  289. rtlpriv->stats.ui_rssi.index];
  290. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  291. }
  292. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  293. rtlpriv->stats.ui_rssi.elements
  294. [rtlpriv->stats.ui_rssi.index++] =
  295. pstats->signalstrength;
  296. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  297. rtlpriv->stats.ui_rssi.index = 0;
  298. tmpval = rtlpriv->stats.ui_rssi.total_val /
  299. rtlpriv->stats.ui_rssi.total_num;
  300. rtlpriv->stats.signal_strength = _rtl92de_translate_todbm(hw,
  301. (u8) tmpval);
  302. pstats->rssi = rtlpriv->stats.signal_strength;
  303. }
  304. if (!pstats->is_cck && pstats->packet_toself)
  305. rtl92d_loop_over_paths(hw, pstats);
  306. }
  307. static void _rtl92de_update_rxsignalstatistics(struct ieee80211_hw *hw,
  308. struct rtl_stats *pstats)
  309. {
  310. struct rtl_priv *rtlpriv = rtl_priv(hw);
  311. int weighting = 0;
  312. if (rtlpriv->stats.recv_signal_power == 0)
  313. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  314. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  315. weighting = 5;
  316. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  317. weighting = (-5);
  318. rtlpriv->stats.recv_signal_power = (rtlpriv->stats.recv_signal_power *
  319. 5 + pstats->recvsignalpower + weighting) / 6;
  320. }
  321. static void _rtl92de_process_pwdb(struct ieee80211_hw *hw,
  322. struct rtl_stats *pstats)
  323. {
  324. struct rtl_priv *rtlpriv = rtl_priv(hw);
  325. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  326. long undec_sm_pwdb;
  327. if (mac->opmode == NL80211_IFTYPE_ADHOC ||
  328. mac->opmode == NL80211_IFTYPE_AP)
  329. return;
  330. else
  331. undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
  332. if (pstats->packet_toself || pstats->packet_beacon) {
  333. if (undec_sm_pwdb < 0)
  334. undec_sm_pwdb = pstats->rx_pwdb_all;
  335. if (pstats->rx_pwdb_all > (u32) undec_sm_pwdb) {
  336. undec_sm_pwdb = (((undec_sm_pwdb) *
  337. (RX_SMOOTH_FACTOR - 1)) +
  338. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  339. undec_sm_pwdb = undec_sm_pwdb + 1;
  340. } else {
  341. undec_sm_pwdb = (((undec_sm_pwdb) *
  342. (RX_SMOOTH_FACTOR - 1)) +
  343. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  344. }
  345. rtlpriv->dm.undec_sm_pwdb = undec_sm_pwdb;
  346. _rtl92de_update_rxsignalstatistics(hw, pstats);
  347. }
  348. }
  349. static void rtl92d_loop_over_streams(struct ieee80211_hw *hw,
  350. struct rtl_stats *pstats)
  351. {
  352. struct rtl_priv *rtlpriv = rtl_priv(hw);
  353. int stream;
  354. for (stream = 0; stream < 2; stream++) {
  355. if (pstats->rx_mimo_sig_qual[stream] != -1) {
  356. if (rtlpriv->stats.rx_evm_percentage[stream] == 0) {
  357. rtlpriv->stats.rx_evm_percentage[stream] =
  358. pstats->rx_mimo_sig_qual[stream];
  359. }
  360. rtlpriv->stats.rx_evm_percentage[stream] =
  361. ((rtlpriv->stats.rx_evm_percentage[stream]
  362. * (RX_SMOOTH_FACTOR - 1)) +
  363. (pstats->rx_mimo_sig_qual[stream] * 1)) /
  364. (RX_SMOOTH_FACTOR);
  365. }
  366. }
  367. }
  368. static void _rtl92de_process_ui_link_quality(struct ieee80211_hw *hw,
  369. struct rtl_stats *pstats)
  370. {
  371. struct rtl_priv *rtlpriv = rtl_priv(hw);
  372. u32 last_evm, tmpval;
  373. if (pstats->signalquality == 0)
  374. return;
  375. if (pstats->packet_toself || pstats->packet_beacon) {
  376. if (rtlpriv->stats.ui_link_quality.total_num++ >=
  377. PHY_LINKQUALITY_SLID_WIN_MAX) {
  378. rtlpriv->stats.ui_link_quality.total_num =
  379. PHY_LINKQUALITY_SLID_WIN_MAX;
  380. last_evm = rtlpriv->stats.ui_link_quality.elements[
  381. rtlpriv->stats.ui_link_quality.index];
  382. rtlpriv->stats.ui_link_quality.total_val -= last_evm;
  383. }
  384. rtlpriv->stats.ui_link_quality.total_val +=
  385. pstats->signalquality;
  386. rtlpriv->stats.ui_link_quality.elements[
  387. rtlpriv->stats.ui_link_quality.index++] =
  388. pstats->signalquality;
  389. if (rtlpriv->stats.ui_link_quality.index >=
  390. PHY_LINKQUALITY_SLID_WIN_MAX)
  391. rtlpriv->stats.ui_link_quality.index = 0;
  392. tmpval = rtlpriv->stats.ui_link_quality.total_val /
  393. rtlpriv->stats.ui_link_quality.total_num;
  394. rtlpriv->stats.signal_quality = tmpval;
  395. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  396. rtl92d_loop_over_streams(hw, pstats);
  397. }
  398. }
  399. static void _rtl92de_process_phyinfo(struct ieee80211_hw *hw,
  400. u8 *buffer,
  401. struct rtl_stats *pcurrent_stats)
  402. {
  403. if (!pcurrent_stats->packet_matchbssid &&
  404. !pcurrent_stats->packet_beacon)
  405. return;
  406. _rtl92de_process_ui_rssi(hw, pcurrent_stats);
  407. _rtl92de_process_pwdb(hw, pcurrent_stats);
  408. _rtl92de_process_ui_link_quality(hw, pcurrent_stats);
  409. }
  410. static void _rtl92de_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  411. struct sk_buff *skb,
  412. struct rtl_stats *pstats,
  413. struct rx_desc_92d *pdesc,
  414. struct rx_fwinfo_92d *p_drvinfo)
  415. {
  416. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  417. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  418. struct ieee80211_hdr *hdr;
  419. u8 *tmp_buf;
  420. u8 *praddr;
  421. u16 type, cfc;
  422. __le16 fc;
  423. bool packet_matchbssid, packet_toself, packet_beacon = false;
  424. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  425. hdr = (struct ieee80211_hdr *)tmp_buf;
  426. fc = hdr->frame_control;
  427. cfc = le16_to_cpu(fc);
  428. type = WLAN_FC_GET_TYPE(fc);
  429. praddr = hdr->addr1;
  430. packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
  431. ether_addr_equal(mac->bssid,
  432. (cfc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
  433. (cfc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
  434. hdr->addr3) &&
  435. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  436. packet_toself = packet_matchbssid &&
  437. ether_addr_equal(praddr, rtlefuse->dev_addr);
  438. if (ieee80211_is_beacon(fc))
  439. packet_beacon = true;
  440. _rtl92de_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  441. packet_matchbssid, packet_toself,
  442. packet_beacon);
  443. _rtl92de_process_phyinfo(hw, tmp_buf, pstats);
  444. }
  445. bool rtl92de_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
  446. struct ieee80211_rx_status *rx_status,
  447. u8 *p_desc, struct sk_buff *skb)
  448. {
  449. struct rx_fwinfo_92d *p_drvinfo;
  450. struct rx_desc_92d *pdesc = (struct rx_desc_92d *)p_desc;
  451. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  452. stats->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
  453. stats->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  454. RX_DRV_INFO_SIZE_UNIT;
  455. stats->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
  456. stats->icv = (u16) GET_RX_DESC_ICV(pdesc);
  457. stats->crc = (u16) GET_RX_DESC_CRC32(pdesc);
  458. stats->hwerror = (stats->crc | stats->icv);
  459. stats->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  460. stats->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
  461. stats->shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
  462. stats->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
  463. stats->isfirst_ampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
  464. && (GET_RX_DESC_FAGGR(pdesc) == 1));
  465. stats->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  466. stats->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
  467. stats->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
  468. rx_status->freq = hw->conf.chandef.chan->center_freq;
  469. rx_status->band = hw->conf.chandef.chan->band;
  470. if (GET_RX_DESC_CRC32(pdesc))
  471. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  472. if (!GET_RX_DESC_SWDEC(pdesc))
  473. rx_status->flag |= RX_FLAG_DECRYPTED;
  474. if (GET_RX_DESC_BW(pdesc))
  475. rx_status->flag |= RX_FLAG_40MHZ;
  476. if (GET_RX_DESC_RXHT(pdesc))
  477. rx_status->flag |= RX_FLAG_HT;
  478. rx_status->flag |= RX_FLAG_MACTIME_START;
  479. if (stats->decrypted)
  480. rx_status->flag |= RX_FLAG_DECRYPTED;
  481. rx_status->rate_idx = rtlwifi_rate_mapping(hw, stats->is_ht,
  482. false, stats->rate);
  483. rx_status->mactime = GET_RX_DESC_TSFL(pdesc);
  484. if (phystatus) {
  485. p_drvinfo = (struct rx_fwinfo_92d *)(skb->data +
  486. stats->rx_bufshift);
  487. _rtl92de_translate_rx_signal_stuff(hw,
  488. skb, stats, pdesc,
  489. p_drvinfo);
  490. }
  491. /*rx_status->qual = stats->signal; */
  492. rx_status->signal = stats->recvsignalpower + 10;
  493. return true;
  494. }
  495. static void _rtl92de_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
  496. u8 *virtualaddress)
  497. {
  498. memset(virtualaddress, 0, 8);
  499. SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
  500. SET_EARLYMODE_LEN0(virtualaddress, ptcb_desc->empkt_len[0]);
  501. SET_EARLYMODE_LEN1(virtualaddress, ptcb_desc->empkt_len[1]);
  502. SET_EARLYMODE_LEN2_1(virtualaddress, ptcb_desc->empkt_len[2] & 0xF);
  503. SET_EARLYMODE_LEN2_2(virtualaddress, ptcb_desc->empkt_len[2] >> 4);
  504. SET_EARLYMODE_LEN3(virtualaddress, ptcb_desc->empkt_len[3]);
  505. SET_EARLYMODE_LEN4(virtualaddress, ptcb_desc->empkt_len[4]);
  506. }
  507. void rtl92de_tx_fill_desc(struct ieee80211_hw *hw,
  508. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  509. u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
  510. struct ieee80211_sta *sta,
  511. struct sk_buff *skb,
  512. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  513. {
  514. struct rtl_priv *rtlpriv = rtl_priv(hw);
  515. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  516. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  517. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  518. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  519. u8 *pdesc = pdesc_tx;
  520. u16 seq_number;
  521. __le16 fc = hdr->frame_control;
  522. unsigned int buf_len = 0;
  523. unsigned int skb_len = skb->len;
  524. u8 fw_qsel = _rtl92de_map_hwqueue_to_fwqueue(skb, hw_queue);
  525. bool firstseg = ((hdr->seq_ctrl &
  526. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  527. bool lastseg = ((hdr->frame_control &
  528. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  529. dma_addr_t mapping;
  530. u8 bw_40 = 0;
  531. if (mac->opmode == NL80211_IFTYPE_STATION) {
  532. bw_40 = mac->bw_40;
  533. } else if (mac->opmode == NL80211_IFTYPE_AP ||
  534. mac->opmode == NL80211_IFTYPE_ADHOC) {
  535. if (sta)
  536. bw_40 = sta->bandwidth >= IEEE80211_STA_RX_BW_40;
  537. }
  538. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  539. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  540. /* reserve 8 byte for AMPDU early mode */
  541. if (rtlhal->earlymode_enable) {
  542. skb_push(skb, EM_HDR_LEN);
  543. memset(skb->data, 0, EM_HDR_LEN);
  544. }
  545. buf_len = skb->len;
  546. mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  547. PCI_DMA_TODEVICE);
  548. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  549. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  550. "DMA mapping error");
  551. return;
  552. }
  553. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_92d));
  554. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  555. firstseg = true;
  556. lastseg = true;
  557. }
  558. if (firstseg) {
  559. if (rtlhal->earlymode_enable) {
  560. SET_TX_DESC_PKT_OFFSET(pdesc, 1);
  561. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
  562. EM_HDR_LEN);
  563. if (ptcb_desc->empkt_num) {
  564. RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD,
  565. "Insert 8 byte.pTcb->EMPktNum:%d\n",
  566. ptcb_desc->empkt_num);
  567. _rtl92de_insert_emcontent(ptcb_desc,
  568. (u8 *)(skb->data));
  569. }
  570. } else {
  571. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  572. }
  573. /* 5G have no CCK rate */
  574. if (rtlhal->current_bandtype == BAND_ON_5G)
  575. if (ptcb_desc->hw_rate < DESC_RATE6M)
  576. ptcb_desc->hw_rate = DESC_RATE6M;
  577. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  578. if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
  579. SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
  580. if (rtlhal->macphymode == DUALMAC_DUALPHY &&
  581. ptcb_desc->hw_rate == DESC_RATEMCS7)
  582. SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
  583. if (info->flags & IEEE80211_TX_CTL_AMPDU) {
  584. SET_TX_DESC_AGG_ENABLE(pdesc, 1);
  585. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
  586. }
  587. SET_TX_DESC_SEQ(pdesc, seq_number);
  588. SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
  589. !ptcb_desc->cts_enable) ? 1 : 0));
  590. SET_TX_DESC_HW_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable
  591. || ptcb_desc->cts_enable) ? 1 : 0));
  592. SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
  593. SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
  594. /* 5G have no CCK rate */
  595. if (rtlhal->current_bandtype == BAND_ON_5G)
  596. if (ptcb_desc->rts_rate < DESC_RATE6M)
  597. ptcb_desc->rts_rate = DESC_RATE6M;
  598. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  599. SET_TX_DESC_RTS_BW(pdesc, 0);
  600. SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
  601. SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <=
  602. DESC_RATE54M) ?
  603. (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
  604. (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  605. if (bw_40) {
  606. if (ptcb_desc->packet_bw) {
  607. SET_TX_DESC_DATA_BW(pdesc, 1);
  608. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
  609. } else {
  610. SET_TX_DESC_DATA_BW(pdesc, 0);
  611. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  612. mac->cur_40_prime_sc);
  613. }
  614. } else {
  615. SET_TX_DESC_DATA_BW(pdesc, 0);
  616. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  617. }
  618. SET_TX_DESC_LINIP(pdesc, 0);
  619. SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb_len);
  620. if (sta) {
  621. u8 ampdu_density = sta->ht_cap.ampdu_density;
  622. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  623. }
  624. if (info->control.hw_key) {
  625. struct ieee80211_key_conf *keyconf;
  626. keyconf = info->control.hw_key;
  627. switch (keyconf->cipher) {
  628. case WLAN_CIPHER_SUITE_WEP40:
  629. case WLAN_CIPHER_SUITE_WEP104:
  630. case WLAN_CIPHER_SUITE_TKIP:
  631. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  632. break;
  633. case WLAN_CIPHER_SUITE_CCMP:
  634. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  635. break;
  636. default:
  637. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  638. break;
  639. }
  640. }
  641. SET_TX_DESC_PKT_ID(pdesc, 0);
  642. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  643. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  644. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  645. SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
  646. 1 : 0);
  647. SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
  648. /* Set TxRate and RTSRate in TxDesc */
  649. /* This prevent Tx initial rate of new-coming packets */
  650. /* from being overwritten by retried packet rate.*/
  651. if (!ptcb_desc->use_driver_rate) {
  652. SET_TX_DESC_RTS_RATE(pdesc, 0x08);
  653. /* SET_TX_DESC_TX_RATE(pdesc, 0x0b); */
  654. }
  655. if (ieee80211_is_data_qos(fc)) {
  656. if (mac->rdg_en) {
  657. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  658. "Enable RDG function\n");
  659. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  660. SET_TX_DESC_HTC(pdesc, 1);
  661. }
  662. }
  663. }
  664. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  665. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  666. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) buf_len);
  667. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  668. if (rtlpriv->dm.useramask) {
  669. SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
  670. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  671. } else {
  672. SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
  673. SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
  674. }
  675. if (ieee80211_is_data_qos(fc))
  676. SET_TX_DESC_QOS(pdesc, 1);
  677. if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) {
  678. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  679. SET_TX_DESC_PKT_ID(pdesc, 8);
  680. }
  681. SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
  682. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
  683. }
  684. void rtl92de_tx_fill_cmddesc(struct ieee80211_hw *hw,
  685. u8 *pdesc, bool firstseg,
  686. bool lastseg, struct sk_buff *skb)
  687. {
  688. struct rtl_priv *rtlpriv = rtl_priv(hw);
  689. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  690. struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
  691. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  692. u8 fw_queue = QSLT_BEACON;
  693. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  694. skb->data, skb->len, PCI_DMA_TODEVICE);
  695. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
  696. __le16 fc = hdr->frame_control;
  697. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  698. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  699. "DMA mapping error");
  700. return;
  701. }
  702. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  703. if (firstseg)
  704. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  705. /* 5G have no CCK rate
  706. * Caution: The macros below are multi-line expansions.
  707. * The braces are needed no matter what checkpatch says
  708. */
  709. if (rtlhal->current_bandtype == BAND_ON_5G) {
  710. SET_TX_DESC_TX_RATE(pdesc, DESC_RATE6M);
  711. } else {
  712. SET_TX_DESC_TX_RATE(pdesc, DESC_RATE1M);
  713. }
  714. SET_TX_DESC_SEQ(pdesc, 0);
  715. SET_TX_DESC_LINIP(pdesc, 0);
  716. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  717. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  718. SET_TX_DESC_LAST_SEG(pdesc, 1);
  719. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)skb->len);
  720. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  721. SET_TX_DESC_RATE_ID(pdesc, 7);
  722. SET_TX_DESC_MACID(pdesc, 0);
  723. SET_TX_DESC_PKT_SIZE(pdesc, (u16) (skb->len));
  724. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  725. SET_TX_DESC_LAST_SEG(pdesc, 1);
  726. SET_TX_DESC_OFFSET(pdesc, 0x20);
  727. SET_TX_DESC_USE_RATE(pdesc, 1);
  728. if (!ieee80211_is_data_qos(fc) && ppsc->fwctrl_lps) {
  729. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  730. SET_TX_DESC_PKT_ID(pdesc, 8);
  731. }
  732. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  733. "H2C Tx Cmd Content", pdesc, TX_DESC_SIZE);
  734. wmb();
  735. SET_TX_DESC_OWN(pdesc, 1);
  736. }
  737. void rtl92de_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
  738. u8 desc_name, u8 *val)
  739. {
  740. if (istx) {
  741. switch (desc_name) {
  742. case HW_DESC_OWN:
  743. wmb();
  744. SET_TX_DESC_OWN(pdesc, 1);
  745. break;
  746. case HW_DESC_TX_NEXTDESC_ADDR:
  747. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
  748. break;
  749. default:
  750. RT_ASSERT(false, "ERR txdesc :%d not process\n",
  751. desc_name);
  752. break;
  753. }
  754. } else {
  755. switch (desc_name) {
  756. case HW_DESC_RXOWN:
  757. wmb();
  758. SET_RX_DESC_OWN(pdesc, 1);
  759. break;
  760. case HW_DESC_RXBUFF_ADDR:
  761. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *) val);
  762. break;
  763. case HW_DESC_RXPKT_LEN:
  764. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *) val);
  765. break;
  766. case HW_DESC_RXERO:
  767. SET_RX_DESC_EOR(pdesc, 1);
  768. break;
  769. default:
  770. RT_ASSERT(false, "ERR rxdesc :%d not process\n",
  771. desc_name);
  772. break;
  773. }
  774. }
  775. }
  776. u32 rtl92de_get_desc(u8 *p_desc, bool istx, u8 desc_name)
  777. {
  778. u32 ret = 0;
  779. if (istx) {
  780. switch (desc_name) {
  781. case HW_DESC_OWN:
  782. ret = GET_TX_DESC_OWN(p_desc);
  783. break;
  784. case HW_DESC_TXBUFF_ADDR:
  785. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc);
  786. break;
  787. default:
  788. RT_ASSERT(false, "ERR txdesc :%d not process\n",
  789. desc_name);
  790. break;
  791. }
  792. } else {
  793. struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc;
  794. switch (desc_name) {
  795. case HW_DESC_OWN:
  796. ret = GET_RX_DESC_OWN(pdesc);
  797. break;
  798. case HW_DESC_RXPKT_LEN:
  799. ret = GET_RX_DESC_PKT_LEN(pdesc);
  800. break;
  801. default:
  802. RT_ASSERT(false, "ERR rxdesc :%d not process\n",
  803. desc_name);
  804. break;
  805. }
  806. }
  807. return ret;
  808. }
  809. void rtl92de_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  810. {
  811. struct rtl_priv *rtlpriv = rtl_priv(hw);
  812. if (hw_queue == BEACON_QUEUE)
  813. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  814. else
  815. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  816. BIT(0) << (hw_queue));
  817. }