iwl-nvm-parse.c 26 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of version 2 of the GNU General Public License as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  23. * USA
  24. *
  25. * The full GNU General Public License is included in this distribution
  26. * in the file called COPYING.
  27. *
  28. * Contact Information:
  29. * Intel Linux Wireless <ilw@linux.intel.com>
  30. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  31. *
  32. * BSD LICENSE
  33. *
  34. * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  35. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  36. * All rights reserved.
  37. *
  38. * Redistribution and use in source and binary forms, with or without
  39. * modification, are permitted provided that the following conditions
  40. * are met:
  41. *
  42. * * Redistributions of source code must retain the above copyright
  43. * notice, this list of conditions and the following disclaimer.
  44. * * Redistributions in binary form must reproduce the above copyright
  45. * notice, this list of conditions and the following disclaimer in
  46. * the documentation and/or other materials provided with the
  47. * distribution.
  48. * * Neither the name Intel Corporation nor the names of its
  49. * contributors may be used to endorse or promote products derived
  50. * from this software without specific prior written permission.
  51. *
  52. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  53. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  54. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  55. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  56. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  57. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  58. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  59. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  60. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  61. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  62. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  63. *****************************************************************************/
  64. #include <linux/types.h>
  65. #include <linux/slab.h>
  66. #include <linux/export.h>
  67. #include <linux/etherdevice.h>
  68. #include <linux/pci.h>
  69. #include "iwl-drv.h"
  70. #include "iwl-modparams.h"
  71. #include "iwl-nvm-parse.h"
  72. /* NVM offsets (in words) definitions */
  73. enum wkp_nvm_offsets {
  74. /* NVM HW-Section offset (in words) definitions */
  75. HW_ADDR = 0x15,
  76. /* NVM SW-Section offset (in words) definitions */
  77. NVM_SW_SECTION = 0x1C0,
  78. NVM_VERSION = 0,
  79. RADIO_CFG = 1,
  80. SKU = 2,
  81. N_HW_ADDRS = 3,
  82. NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
  83. /* NVM calibration section offset (in words) definitions */
  84. NVM_CALIB_SECTION = 0x2B8,
  85. XTAL_CALIB = 0x316 - NVM_CALIB_SECTION
  86. };
  87. enum family_8000_nvm_offsets {
  88. /* NVM HW-Section offset (in words) definitions */
  89. HW_ADDR0_WFPM_FAMILY_8000 = 0x12,
  90. HW_ADDR1_WFPM_FAMILY_8000 = 0x16,
  91. HW_ADDR0_PCIE_FAMILY_8000 = 0x8A,
  92. HW_ADDR1_PCIE_FAMILY_8000 = 0x8E,
  93. MAC_ADDRESS_OVERRIDE_FAMILY_8000 = 1,
  94. /* NVM SW-Section offset (in words) definitions */
  95. NVM_SW_SECTION_FAMILY_8000 = 0x1C0,
  96. NVM_VERSION_FAMILY_8000 = 0,
  97. RADIO_CFG_FAMILY_8000 = 0,
  98. SKU_FAMILY_8000 = 2,
  99. N_HW_ADDRS_FAMILY_8000 = 3,
  100. /* NVM REGULATORY -Section offset (in words) definitions */
  101. NVM_CHANNELS_FAMILY_8000 = 0,
  102. NVM_LAR_OFFSET_FAMILY_8000_OLD = 0x4C7,
  103. NVM_LAR_OFFSET_FAMILY_8000 = 0x507,
  104. NVM_LAR_ENABLED_FAMILY_8000 = 0x7,
  105. /* NVM calibration section offset (in words) definitions */
  106. NVM_CALIB_SECTION_FAMILY_8000 = 0x2B8,
  107. XTAL_CALIB_FAMILY_8000 = 0x316 - NVM_CALIB_SECTION_FAMILY_8000
  108. };
  109. /* SKU Capabilities (actual values from NVM definition) */
  110. enum nvm_sku_bits {
  111. NVM_SKU_CAP_BAND_24GHZ = BIT(0),
  112. NVM_SKU_CAP_BAND_52GHZ = BIT(1),
  113. NVM_SKU_CAP_11N_ENABLE = BIT(2),
  114. NVM_SKU_CAP_11AC_ENABLE = BIT(3),
  115. NVM_SKU_CAP_MIMO_DISABLE = BIT(5),
  116. };
  117. /*
  118. * These are the channel numbers in the order that they are stored in the NVM
  119. */
  120. static const u8 iwl_nvm_channels[] = {
  121. /* 2.4 GHz */
  122. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  123. /* 5 GHz */
  124. 36, 40, 44 , 48, 52, 56, 60, 64,
  125. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  126. 149, 153, 157, 161, 165
  127. };
  128. static const u8 iwl_nvm_channels_family_8000[] = {
  129. /* 2.4 GHz */
  130. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  131. /* 5 GHz */
  132. 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
  133. 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  134. 149, 153, 157, 161, 165, 169, 173, 177, 181
  135. };
  136. #define IWL_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels)
  137. #define IWL_NUM_CHANNELS_FAMILY_8000 ARRAY_SIZE(iwl_nvm_channels_family_8000)
  138. #define NUM_2GHZ_CHANNELS 14
  139. #define NUM_2GHZ_CHANNELS_FAMILY_8000 14
  140. #define FIRST_2GHZ_HT_MINUS 5
  141. #define LAST_2GHZ_HT_PLUS 9
  142. #define LAST_5GHZ_HT 165
  143. #define LAST_5GHZ_HT_FAMILY_8000 181
  144. #define N_HW_ADDR_MASK 0xF
  145. /* rate data (static) */
  146. static struct ieee80211_rate iwl_cfg80211_rates[] = {
  147. { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
  148. { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
  149. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  150. { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
  151. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  152. { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
  153. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  154. { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
  155. { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
  156. { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
  157. { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
  158. { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
  159. { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
  160. { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
  161. { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
  162. };
  163. #define RATES_24_OFFS 0
  164. #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates)
  165. #define RATES_52_OFFS 4
  166. #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS)
  167. /**
  168. * enum iwl_nvm_channel_flags - channel flags in NVM
  169. * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
  170. * @NVM_CHANNEL_IBSS: usable as an IBSS channel
  171. * @NVM_CHANNEL_ACTIVE: active scanning allowed
  172. * @NVM_CHANNEL_RADAR: radar detection required
  173. * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
  174. * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
  175. * on same channel on 2.4 or same UNII band on 5.2
  176. * @NVM_CHANNEL_WIDE: 20 MHz channel okay (?)
  177. * @NVM_CHANNEL_40MHZ: 40 MHz channel okay (?)
  178. * @NVM_CHANNEL_80MHZ: 80 MHz channel okay (?)
  179. * @NVM_CHANNEL_160MHZ: 160 MHz channel okay (?)
  180. */
  181. enum iwl_nvm_channel_flags {
  182. NVM_CHANNEL_VALID = BIT(0),
  183. NVM_CHANNEL_IBSS = BIT(1),
  184. NVM_CHANNEL_ACTIVE = BIT(3),
  185. NVM_CHANNEL_RADAR = BIT(4),
  186. NVM_CHANNEL_INDOOR_ONLY = BIT(5),
  187. NVM_CHANNEL_GO_CONCURRENT = BIT(6),
  188. NVM_CHANNEL_WIDE = BIT(8),
  189. NVM_CHANNEL_40MHZ = BIT(9),
  190. NVM_CHANNEL_80MHZ = BIT(10),
  191. NVM_CHANNEL_160MHZ = BIT(11),
  192. };
  193. #define CHECK_AND_PRINT_I(x) \
  194. ((ch_flags & NVM_CHANNEL_##x) ? # x " " : "")
  195. static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
  196. u16 nvm_flags, const struct iwl_cfg *cfg)
  197. {
  198. u32 flags = IEEE80211_CHAN_NO_HT40;
  199. u32 last_5ghz_ht = LAST_5GHZ_HT;
  200. if (cfg->device_family == IWL_DEVICE_FAMILY_8000)
  201. last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
  202. if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
  203. if (ch_num <= LAST_2GHZ_HT_PLUS)
  204. flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
  205. if (ch_num >= FIRST_2GHZ_HT_MINUS)
  206. flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
  207. } else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) {
  208. if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
  209. flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
  210. else
  211. flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
  212. }
  213. if (!(nvm_flags & NVM_CHANNEL_80MHZ))
  214. flags |= IEEE80211_CHAN_NO_80MHZ;
  215. if (!(nvm_flags & NVM_CHANNEL_160MHZ))
  216. flags |= IEEE80211_CHAN_NO_160MHZ;
  217. if (!(nvm_flags & NVM_CHANNEL_IBSS))
  218. flags |= IEEE80211_CHAN_NO_IR;
  219. if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
  220. flags |= IEEE80211_CHAN_NO_IR;
  221. if (nvm_flags & NVM_CHANNEL_RADAR)
  222. flags |= IEEE80211_CHAN_RADAR;
  223. if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
  224. flags |= IEEE80211_CHAN_INDOOR_ONLY;
  225. /* Set the GO concurrent flag only in case that NO_IR is set.
  226. * Otherwise it is meaningless
  227. */
  228. if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
  229. (flags & IEEE80211_CHAN_NO_IR))
  230. flags |= IEEE80211_CHAN_IR_CONCURRENT;
  231. return flags;
  232. }
  233. static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
  234. struct iwl_nvm_data *data,
  235. const __le16 * const nvm_ch_flags,
  236. bool lar_supported)
  237. {
  238. int ch_idx;
  239. int n_channels = 0;
  240. struct ieee80211_channel *channel;
  241. u16 ch_flags;
  242. bool is_5ghz;
  243. int num_of_ch, num_2ghz_channels;
  244. const u8 *nvm_chan;
  245. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  246. num_of_ch = IWL_NUM_CHANNELS;
  247. nvm_chan = &iwl_nvm_channels[0];
  248. num_2ghz_channels = NUM_2GHZ_CHANNELS;
  249. } else {
  250. num_of_ch = IWL_NUM_CHANNELS_FAMILY_8000;
  251. nvm_chan = &iwl_nvm_channels_family_8000[0];
  252. num_2ghz_channels = NUM_2GHZ_CHANNELS_FAMILY_8000;
  253. }
  254. for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
  255. ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
  256. if (ch_idx >= num_2ghz_channels &&
  257. !data->sku_cap_band_52GHz_enable)
  258. continue;
  259. if (!lar_supported && !(ch_flags & NVM_CHANNEL_VALID)) {
  260. /*
  261. * Channels might become valid later if lar is
  262. * supported, hence we still want to add them to
  263. * the list of supported channels to cfg80211.
  264. */
  265. IWL_DEBUG_EEPROM(dev,
  266. "Ch. %d Flags %x [%sGHz] - No traffic\n",
  267. nvm_chan[ch_idx],
  268. ch_flags,
  269. (ch_idx >= num_2ghz_channels) ?
  270. "5.2" : "2.4");
  271. continue;
  272. }
  273. channel = &data->channels[n_channels];
  274. n_channels++;
  275. channel->hw_value = nvm_chan[ch_idx];
  276. channel->band = (ch_idx < num_2ghz_channels) ?
  277. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  278. channel->center_freq =
  279. ieee80211_channel_to_frequency(
  280. channel->hw_value, channel->band);
  281. /* Initialize regulatory-based run-time data */
  282. /*
  283. * Default value - highest tx power value. max_power
  284. * is not used in mvm, and is used for backwards compatibility
  285. */
  286. channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
  287. is_5ghz = channel->band == IEEE80211_BAND_5GHZ;
  288. /* don't put limitations in case we're using LAR */
  289. if (!lar_supported)
  290. channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
  291. ch_idx, is_5ghz,
  292. ch_flags, cfg);
  293. else
  294. channel->flags = 0;
  295. IWL_DEBUG_EEPROM(dev,
  296. "Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
  297. channel->hw_value,
  298. is_5ghz ? "5.2" : "2.4",
  299. CHECK_AND_PRINT_I(VALID),
  300. CHECK_AND_PRINT_I(IBSS),
  301. CHECK_AND_PRINT_I(ACTIVE),
  302. CHECK_AND_PRINT_I(RADAR),
  303. CHECK_AND_PRINT_I(WIDE),
  304. CHECK_AND_PRINT_I(INDOOR_ONLY),
  305. CHECK_AND_PRINT_I(GO_CONCURRENT),
  306. ch_flags,
  307. channel->max_power,
  308. ((ch_flags & NVM_CHANNEL_IBSS) &&
  309. !(ch_flags & NVM_CHANNEL_RADAR))
  310. ? "" : "not ");
  311. }
  312. return n_channels;
  313. }
  314. static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
  315. struct iwl_nvm_data *data,
  316. struct ieee80211_sta_vht_cap *vht_cap,
  317. u8 tx_chains, u8 rx_chains)
  318. {
  319. int num_rx_ants = num_of_ant(rx_chains);
  320. int num_tx_ants = num_of_ant(tx_chains);
  321. unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
  322. IEEE80211_VHT_MAX_AMPDU_1024K);
  323. vht_cap->vht_supported = true;
  324. vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
  325. IEEE80211_VHT_CAP_RXSTBC_1 |
  326. IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
  327. 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
  328. max_ampdu_exponent <<
  329. IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
  330. if (cfg->ht_params->ldpc)
  331. vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
  332. if (data->sku_cap_mimo_disabled) {
  333. num_rx_ants = 1;
  334. num_tx_ants = 1;
  335. }
  336. if (num_tx_ants > 1)
  337. vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
  338. else
  339. vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
  340. if (iwlwifi_mod_params.amsdu_size_8K)
  341. vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
  342. vht_cap->vht_mcs.rx_mcs_map =
  343. cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
  344. IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
  345. IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
  346. IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
  347. IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
  348. IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
  349. IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
  350. IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
  351. if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
  352. vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
  353. /* this works because NOT_SUPPORTED == 3 */
  354. vht_cap->vht_mcs.rx_mcs_map |=
  355. cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
  356. }
  357. vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
  358. }
  359. static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
  360. struct iwl_nvm_data *data,
  361. const __le16 *ch_section,
  362. u8 tx_chains, u8 rx_chains, bool lar_supported)
  363. {
  364. int n_channels;
  365. int n_used = 0;
  366. struct ieee80211_supported_band *sband;
  367. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  368. n_channels = iwl_init_channel_map(
  369. dev, cfg, data,
  370. &ch_section[NVM_CHANNELS], lar_supported);
  371. else
  372. n_channels = iwl_init_channel_map(
  373. dev, cfg, data,
  374. &ch_section[NVM_CHANNELS_FAMILY_8000],
  375. lar_supported);
  376. sband = &data->bands[IEEE80211_BAND_2GHZ];
  377. sband->band = IEEE80211_BAND_2GHZ;
  378. sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
  379. sband->n_bitrates = N_RATES_24;
  380. n_used += iwl_init_sband_channels(data, sband, n_channels,
  381. IEEE80211_BAND_2GHZ);
  382. iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_2GHZ,
  383. tx_chains, rx_chains);
  384. sband = &data->bands[IEEE80211_BAND_5GHZ];
  385. sband->band = IEEE80211_BAND_5GHZ;
  386. sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
  387. sband->n_bitrates = N_RATES_52;
  388. n_used += iwl_init_sband_channels(data, sband, n_channels,
  389. IEEE80211_BAND_5GHZ);
  390. iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_5GHZ,
  391. tx_chains, rx_chains);
  392. if (data->sku_cap_11ac_enable)
  393. iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
  394. tx_chains, rx_chains);
  395. if (n_channels != n_used)
  396. IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
  397. n_used, n_channels);
  398. }
  399. static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
  400. const __le16 *phy_sku)
  401. {
  402. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  403. return le16_to_cpup(nvm_sw + SKU);
  404. return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
  405. }
  406. static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
  407. {
  408. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  409. return le16_to_cpup(nvm_sw + NVM_VERSION);
  410. else
  411. return le32_to_cpup((__le32 *)(nvm_sw +
  412. NVM_VERSION_FAMILY_8000));
  413. }
  414. static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
  415. const __le16 *phy_sku)
  416. {
  417. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  418. return le16_to_cpup(nvm_sw + RADIO_CFG);
  419. return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_8000));
  420. }
  421. static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
  422. {
  423. int n_hw_addr;
  424. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  425. return le16_to_cpup(nvm_sw + N_HW_ADDRS);
  426. n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
  427. return n_hw_addr & N_HW_ADDR_MASK;
  428. }
  429. static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
  430. struct iwl_nvm_data *data,
  431. u32 radio_cfg)
  432. {
  433. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  434. data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
  435. data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
  436. data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
  437. data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
  438. return;
  439. }
  440. /* set the radio configuration for family 8000 */
  441. data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK_FAMILY_8000(radio_cfg);
  442. data->radio_cfg_step = NVM_RF_CFG_STEP_MSK_FAMILY_8000(radio_cfg);
  443. data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK_FAMILY_8000(radio_cfg);
  444. data->radio_cfg_pnum = NVM_RF_CFG_FLAVOR_MSK_FAMILY_8000(radio_cfg);
  445. data->valid_tx_ant = NVM_RF_CFG_TX_ANT_MSK_FAMILY_8000(radio_cfg);
  446. data->valid_rx_ant = NVM_RF_CFG_RX_ANT_MSK_FAMILY_8000(radio_cfg);
  447. }
  448. static void iwl_set_hw_address(const struct iwl_cfg *cfg,
  449. struct iwl_nvm_data *data,
  450. const __le16 *nvm_sec)
  451. {
  452. const u8 *hw_addr = (const u8 *)(nvm_sec + HW_ADDR);
  453. /* The byte order is little endian 16 bit, meaning 214365 */
  454. data->hw_addr[0] = hw_addr[1];
  455. data->hw_addr[1] = hw_addr[0];
  456. data->hw_addr[2] = hw_addr[3];
  457. data->hw_addr[3] = hw_addr[2];
  458. data->hw_addr[4] = hw_addr[5];
  459. data->hw_addr[5] = hw_addr[4];
  460. }
  461. static void iwl_set_hw_address_family_8000(struct device *dev,
  462. const struct iwl_cfg *cfg,
  463. struct iwl_nvm_data *data,
  464. const __le16 *mac_override,
  465. const __le16 *nvm_hw,
  466. u32 mac_addr0, u32 mac_addr1)
  467. {
  468. const u8 *hw_addr;
  469. if (mac_override) {
  470. static const u8 reserved_mac[] = {
  471. 0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
  472. };
  473. hw_addr = (const u8 *)(mac_override +
  474. MAC_ADDRESS_OVERRIDE_FAMILY_8000);
  475. /* The byte order is little endian 16 bit, meaning 214365 */
  476. data->hw_addr[0] = hw_addr[1];
  477. data->hw_addr[1] = hw_addr[0];
  478. data->hw_addr[2] = hw_addr[3];
  479. data->hw_addr[3] = hw_addr[2];
  480. data->hw_addr[4] = hw_addr[5];
  481. data->hw_addr[5] = hw_addr[4];
  482. /*
  483. * Force the use of the OTP MAC address in case of reserved MAC
  484. * address in the NVM, or if address is given but invalid.
  485. */
  486. if (is_valid_ether_addr(data->hw_addr) &&
  487. memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
  488. return;
  489. IWL_ERR_DEV(dev,
  490. "mac address from nvm override section is not valid\n");
  491. }
  492. if (nvm_hw) {
  493. /* read the MAC address from HW resisters */
  494. hw_addr = (const u8 *)&mac_addr0;
  495. data->hw_addr[0] = hw_addr[3];
  496. data->hw_addr[1] = hw_addr[2];
  497. data->hw_addr[2] = hw_addr[1];
  498. data->hw_addr[3] = hw_addr[0];
  499. hw_addr = (const u8 *)&mac_addr1;
  500. data->hw_addr[4] = hw_addr[1];
  501. data->hw_addr[5] = hw_addr[0];
  502. if (!is_valid_ether_addr(data->hw_addr))
  503. IWL_ERR_DEV(dev,
  504. "mac address from hw section is not valid\n");
  505. return;
  506. }
  507. IWL_ERR_DEV(dev, "mac address is not found\n");
  508. }
  509. struct iwl_nvm_data *
  510. iwl_parse_nvm_data(struct device *dev, const struct iwl_cfg *cfg,
  511. const __le16 *nvm_hw, const __le16 *nvm_sw,
  512. const __le16 *nvm_calib, const __le16 *regulatory,
  513. const __le16 *mac_override, const __le16 *phy_sku,
  514. u8 tx_chains, u8 rx_chains, bool lar_fw_supported,
  515. u32 mac_addr0, u32 mac_addr1)
  516. {
  517. struct iwl_nvm_data *data;
  518. u32 sku;
  519. u32 radio_cfg;
  520. u16 lar_config;
  521. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  522. data = kzalloc(sizeof(*data) +
  523. sizeof(struct ieee80211_channel) *
  524. IWL_NUM_CHANNELS,
  525. GFP_KERNEL);
  526. else
  527. data = kzalloc(sizeof(*data) +
  528. sizeof(struct ieee80211_channel) *
  529. IWL_NUM_CHANNELS_FAMILY_8000,
  530. GFP_KERNEL);
  531. if (!data)
  532. return NULL;
  533. data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
  534. radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
  535. iwl_set_radio_cfg(cfg, data, radio_cfg);
  536. if (data->valid_tx_ant)
  537. tx_chains &= data->valid_tx_ant;
  538. if (data->valid_rx_ant)
  539. rx_chains &= data->valid_rx_ant;
  540. sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
  541. data->sku_cap_band_24GHz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
  542. data->sku_cap_band_52GHz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
  543. data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
  544. if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
  545. data->sku_cap_11n_enable = false;
  546. data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
  547. (sku & NVM_SKU_CAP_11AC_ENABLE);
  548. data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
  549. data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
  550. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  551. /* Checking for required sections */
  552. if (!nvm_calib) {
  553. IWL_ERR_DEV(dev,
  554. "Can't parse empty Calib NVM sections\n");
  555. kfree(data);
  556. return NULL;
  557. }
  558. /* in family 8000 Xtal calibration values moved to OTP */
  559. data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
  560. data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
  561. }
  562. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  563. iwl_set_hw_address(cfg, data, nvm_hw);
  564. iwl_init_sbands(dev, cfg, data, nvm_sw,
  565. tx_chains, rx_chains, lar_fw_supported);
  566. } else {
  567. u16 lar_offset = data->nvm_version < 0xE39 ?
  568. NVM_LAR_OFFSET_FAMILY_8000_OLD :
  569. NVM_LAR_OFFSET_FAMILY_8000;
  570. lar_config = le16_to_cpup(regulatory + lar_offset);
  571. data->lar_enabled = !!(lar_config &
  572. NVM_LAR_ENABLED_FAMILY_8000);
  573. /* MAC address in family 8000 */
  574. iwl_set_hw_address_family_8000(dev, cfg, data, mac_override,
  575. nvm_hw, mac_addr0, mac_addr1);
  576. iwl_init_sbands(dev, cfg, data, regulatory,
  577. tx_chains, rx_chains,
  578. lar_fw_supported && data->lar_enabled);
  579. }
  580. data->calib_version = 255;
  581. return data;
  582. }
  583. IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
  584. static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
  585. int ch_idx, u16 nvm_flags,
  586. const struct iwl_cfg *cfg)
  587. {
  588. u32 flags = NL80211_RRF_NO_HT40;
  589. u32 last_5ghz_ht = LAST_5GHZ_HT;
  590. if (cfg->device_family == IWL_DEVICE_FAMILY_8000)
  591. last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
  592. if (ch_idx < NUM_2GHZ_CHANNELS &&
  593. (nvm_flags & NVM_CHANNEL_40MHZ)) {
  594. if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
  595. flags &= ~NL80211_RRF_NO_HT40PLUS;
  596. if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
  597. flags &= ~NL80211_RRF_NO_HT40MINUS;
  598. } else if (nvm_chan[ch_idx] <= last_5ghz_ht &&
  599. (nvm_flags & NVM_CHANNEL_40MHZ)) {
  600. if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
  601. flags &= ~NL80211_RRF_NO_HT40PLUS;
  602. else
  603. flags &= ~NL80211_RRF_NO_HT40MINUS;
  604. }
  605. if (!(nvm_flags & NVM_CHANNEL_80MHZ))
  606. flags |= NL80211_RRF_NO_80MHZ;
  607. if (!(nvm_flags & NVM_CHANNEL_160MHZ))
  608. flags |= NL80211_RRF_NO_160MHZ;
  609. if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
  610. flags |= NL80211_RRF_NO_IR;
  611. if (nvm_flags & NVM_CHANNEL_RADAR)
  612. flags |= NL80211_RRF_DFS;
  613. if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
  614. flags |= NL80211_RRF_NO_OUTDOOR;
  615. /* Set the GO concurrent flag only in case that NO_IR is set.
  616. * Otherwise it is meaningless
  617. */
  618. if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
  619. (flags & NL80211_RRF_NO_IR))
  620. flags |= NL80211_RRF_GO_CONCURRENT;
  621. return flags;
  622. }
  623. struct ieee80211_regdomain *
  624. iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
  625. int num_of_ch, __le32 *channels, u16 fw_mcc)
  626. {
  627. int ch_idx;
  628. u16 ch_flags, prev_ch_flags = 0;
  629. const u8 *nvm_chan = cfg->device_family == IWL_DEVICE_FAMILY_8000 ?
  630. iwl_nvm_channels_family_8000 : iwl_nvm_channels;
  631. struct ieee80211_regdomain *regd;
  632. int size_of_regd;
  633. struct ieee80211_reg_rule *rule;
  634. enum ieee80211_band band;
  635. int center_freq, prev_center_freq = 0;
  636. int valid_rules = 0;
  637. bool new_rule;
  638. int max_num_ch = cfg->device_family == IWL_DEVICE_FAMILY_8000 ?
  639. IWL_NUM_CHANNELS_FAMILY_8000 : IWL_NUM_CHANNELS;
  640. if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
  641. return ERR_PTR(-EINVAL);
  642. if (WARN_ON(num_of_ch > max_num_ch))
  643. num_of_ch = max_num_ch;
  644. IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
  645. num_of_ch);
  646. /* build a regdomain rule for every valid channel */
  647. size_of_regd =
  648. sizeof(struct ieee80211_regdomain) +
  649. num_of_ch * sizeof(struct ieee80211_reg_rule);
  650. regd = kzalloc(size_of_regd, GFP_KERNEL);
  651. if (!regd)
  652. return ERR_PTR(-ENOMEM);
  653. for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
  654. ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
  655. band = (ch_idx < NUM_2GHZ_CHANNELS) ?
  656. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  657. center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
  658. band);
  659. new_rule = false;
  660. if (!(ch_flags & NVM_CHANNEL_VALID)) {
  661. IWL_DEBUG_DEV(dev, IWL_DL_LAR,
  662. "Ch. %d Flags %x [%sGHz] - No traffic\n",
  663. nvm_chan[ch_idx],
  664. ch_flags,
  665. (ch_idx >= NUM_2GHZ_CHANNELS) ?
  666. "5.2" : "2.4");
  667. continue;
  668. }
  669. /* we can't continue the same rule */
  670. if (ch_idx == 0 || prev_ch_flags != ch_flags ||
  671. center_freq - prev_center_freq > 20) {
  672. valid_rules++;
  673. new_rule = true;
  674. }
  675. rule = &regd->reg_rules[valid_rules - 1];
  676. if (new_rule)
  677. rule->freq_range.start_freq_khz =
  678. MHZ_TO_KHZ(center_freq - 10);
  679. rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
  680. /* this doesn't matter - not used by FW */
  681. rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
  682. rule->power_rule.max_eirp =
  683. DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
  684. rule->flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
  685. ch_flags, cfg);
  686. /* rely on auto-calculation to merge BW of contiguous chans */
  687. rule->flags |= NL80211_RRF_AUTO_BW;
  688. rule->freq_range.max_bandwidth_khz = 0;
  689. prev_ch_flags = ch_flags;
  690. prev_center_freq = center_freq;
  691. IWL_DEBUG_DEV(dev, IWL_DL_LAR,
  692. "Ch. %d [%sGHz] %s%s%s%s%s%s%s%s%s(0x%02x): Ad-Hoc %ssupported\n",
  693. center_freq,
  694. band == IEEE80211_BAND_5GHZ ? "5.2" : "2.4",
  695. CHECK_AND_PRINT_I(VALID),
  696. CHECK_AND_PRINT_I(ACTIVE),
  697. CHECK_AND_PRINT_I(RADAR),
  698. CHECK_AND_PRINT_I(WIDE),
  699. CHECK_AND_PRINT_I(40MHZ),
  700. CHECK_AND_PRINT_I(80MHZ),
  701. CHECK_AND_PRINT_I(160MHZ),
  702. CHECK_AND_PRINT_I(INDOOR_ONLY),
  703. CHECK_AND_PRINT_I(GO_CONCURRENT),
  704. ch_flags,
  705. ((ch_flags & NVM_CHANNEL_ACTIVE) &&
  706. !(ch_flags & NVM_CHANNEL_RADAR))
  707. ? "" : "not ");
  708. }
  709. regd->n_reg_rules = valid_rules;
  710. /* set alpha2 from FW. */
  711. regd->alpha2[0] = fw_mcc >> 8;
  712. regd->alpha2[1] = fw_mcc & 0xff;
  713. return regd;
  714. }
  715. IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);