fimc-capture.c 50 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "common.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. #include "media-dev.h"
  31. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  32. {
  33. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  34. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  35. int ret;
  36. unsigned long flags;
  37. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  38. return -EINVAL;
  39. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  40. ret = fimc_hw_camblk_cfg_writeback(fimc);
  41. if (ret < 0)
  42. return ret;
  43. }
  44. spin_lock_irqsave(&fimc->slock, flags);
  45. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  46. fimc_set_yuv_order(ctx);
  47. fimc_hw_set_camera_polarity(fimc, si);
  48. fimc_hw_set_camera_type(fimc, si);
  49. fimc_hw_set_camera_source(fimc, si);
  50. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  51. ret = fimc_set_scaler_info(ctx);
  52. if (!ret) {
  53. fimc_hw_set_input_path(ctx);
  54. fimc_hw_set_prescaler(ctx);
  55. fimc_hw_set_mainscaler(ctx);
  56. fimc_hw_set_target_format(ctx);
  57. fimc_hw_set_rotation(ctx);
  58. fimc_hw_set_effect(ctx);
  59. fimc_hw_set_output_path(ctx);
  60. fimc_hw_set_out_dma(ctx);
  61. if (fimc->drv_data->alpha_color)
  62. fimc_hw_set_rgb_alpha(ctx);
  63. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  64. }
  65. spin_unlock_irqrestore(&fimc->slock, flags);
  66. return ret;
  67. }
  68. /*
  69. * Reinitialize the driver so it is ready to start the streaming again.
  70. * Set fimc->state to indicate stream off and the hardware shut down state.
  71. * If not suspending (@suspend is false), return any buffers to videobuf2.
  72. * Otherwise put any owned buffers onto the pending buffers queue, so they
  73. * can be re-spun when the device is being resumed. Also perform FIMC
  74. * software reset and disable streaming on the whole pipeline if required.
  75. */
  76. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  77. {
  78. struct fimc_vid_cap *cap = &fimc->vid_cap;
  79. struct fimc_vid_buffer *buf;
  80. unsigned long flags;
  81. bool streaming;
  82. spin_lock_irqsave(&fimc->slock, flags);
  83. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  84. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  85. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  86. if (suspend)
  87. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  88. else
  89. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  90. /* Release unused buffers */
  91. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  92. buf = fimc_pending_queue_pop(cap);
  93. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  94. }
  95. /* If suspending put unused buffers onto pending queue */
  96. while (!list_empty(&cap->active_buf_q)) {
  97. buf = fimc_active_queue_pop(cap);
  98. if (suspend)
  99. fimc_pending_queue_add(cap, buf);
  100. else
  101. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  102. }
  103. fimc_hw_reset(fimc);
  104. cap->buf_index = 0;
  105. spin_unlock_irqrestore(&fimc->slock, flags);
  106. if (streaming)
  107. return fimc_pipeline_call(&cap->ve, set_stream, 0);
  108. else
  109. return 0;
  110. }
  111. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  112. {
  113. unsigned long flags;
  114. if (!fimc_capture_active(fimc))
  115. return 0;
  116. spin_lock_irqsave(&fimc->slock, flags);
  117. set_bit(ST_CAPT_SHUT, &fimc->state);
  118. fimc_deactivate_capture(fimc);
  119. spin_unlock_irqrestore(&fimc->slock, flags);
  120. wait_event_timeout(fimc->irq_queue,
  121. !test_bit(ST_CAPT_SHUT, &fimc->state),
  122. (2*HZ/10)); /* 200 ms */
  123. return fimc_capture_state_cleanup(fimc, suspend);
  124. }
  125. /**
  126. * fimc_capture_config_update - apply the camera interface configuration
  127. *
  128. * To be called from within the interrupt handler with fimc.slock
  129. * spinlock held. It updates the camera pixel crop, rotation and
  130. * image flip in H/W.
  131. */
  132. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  133. {
  134. struct fimc_dev *fimc = ctx->fimc_dev;
  135. int ret;
  136. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  137. ret = fimc_set_scaler_info(ctx);
  138. if (ret)
  139. return ret;
  140. fimc_hw_set_prescaler(ctx);
  141. fimc_hw_set_mainscaler(ctx);
  142. fimc_hw_set_target_format(ctx);
  143. fimc_hw_set_rotation(ctx);
  144. fimc_hw_set_effect(ctx);
  145. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  146. fimc_hw_set_out_dma(ctx);
  147. if (fimc->drv_data->alpha_color)
  148. fimc_hw_set_rgb_alpha(ctx);
  149. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  150. return ret;
  151. }
  152. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  153. {
  154. struct fimc_vid_cap *cap = &fimc->vid_cap;
  155. struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
  156. struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
  157. struct fimc_frame *f = &cap->ctx->d_frame;
  158. struct fimc_vid_buffer *v_buf;
  159. struct timeval *tv;
  160. struct timespec ts;
  161. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  162. wake_up(&fimc->irq_queue);
  163. goto done;
  164. }
  165. if (!list_empty(&cap->active_buf_q) &&
  166. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  167. ktime_get_real_ts(&ts);
  168. v_buf = fimc_active_queue_pop(cap);
  169. tv = &v_buf->vb.v4l2_buf.timestamp;
  170. tv->tv_sec = ts.tv_sec;
  171. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  172. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  173. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  174. }
  175. if (!list_empty(&cap->pending_buf_q)) {
  176. v_buf = fimc_pending_queue_pop(cap);
  177. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  178. v_buf->index = cap->buf_index;
  179. /* Move the buffer to the capture active queue */
  180. fimc_active_queue_add(cap, v_buf);
  181. dbg("next frame: %d, done frame: %d",
  182. fimc_hw_get_frame_index(fimc), v_buf->index);
  183. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  184. cap->buf_index = 0;
  185. }
  186. /*
  187. * Set up a buffer at MIPI-CSIS if current image format
  188. * requires the frame embedded data capture.
  189. */
  190. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  191. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  192. unsigned int size = f->payload[plane];
  193. s32 index = fimc_hw_get_frame_index(fimc);
  194. void *vaddr;
  195. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  196. if (v_buf->index != index)
  197. continue;
  198. vaddr = vb2_plane_vaddr(&v_buf->vb, plane);
  199. v4l2_subdev_call(csis, video, s_rx_buffer,
  200. vaddr, &size);
  201. break;
  202. }
  203. }
  204. if (cap->active_buf_cnt == 0) {
  205. if (deq_buf)
  206. clear_bit(ST_CAPT_RUN, &fimc->state);
  207. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  208. cap->buf_index = 0;
  209. } else {
  210. set_bit(ST_CAPT_RUN, &fimc->state);
  211. }
  212. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  213. fimc_capture_config_update(cap->ctx);
  214. done:
  215. if (cap->active_buf_cnt == 1) {
  216. fimc_deactivate_capture(fimc);
  217. clear_bit(ST_CAPT_STREAM, &fimc->state);
  218. }
  219. dbg("frame: %d, active_buf_cnt: %d",
  220. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  221. }
  222. static int start_streaming(struct vb2_queue *q, unsigned int count)
  223. {
  224. struct fimc_ctx *ctx = q->drv_priv;
  225. struct fimc_dev *fimc = ctx->fimc_dev;
  226. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  227. int min_bufs;
  228. int ret;
  229. vid_cap->frame_count = 0;
  230. ret = fimc_capture_hw_init(fimc);
  231. if (ret) {
  232. fimc_capture_state_cleanup(fimc, false);
  233. return ret;
  234. }
  235. set_bit(ST_CAPT_PEND, &fimc->state);
  236. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  237. if (vid_cap->active_buf_cnt >= min_bufs &&
  238. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  239. fimc_activate_capture(ctx);
  240. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  241. return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
  242. }
  243. return 0;
  244. }
  245. static void stop_streaming(struct vb2_queue *q)
  246. {
  247. struct fimc_ctx *ctx = q->drv_priv;
  248. struct fimc_dev *fimc = ctx->fimc_dev;
  249. if (!fimc_capture_active(fimc))
  250. return;
  251. fimc_stop_capture(fimc, false);
  252. }
  253. int fimc_capture_suspend(struct fimc_dev *fimc)
  254. {
  255. bool suspend = fimc_capture_busy(fimc);
  256. int ret = fimc_stop_capture(fimc, suspend);
  257. if (ret)
  258. return ret;
  259. return fimc_pipeline_call(&fimc->vid_cap.ve, close);
  260. }
  261. static void buffer_queue(struct vb2_buffer *vb);
  262. int fimc_capture_resume(struct fimc_dev *fimc)
  263. {
  264. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  265. struct exynos_video_entity *ve = &vid_cap->ve;
  266. struct fimc_vid_buffer *buf;
  267. int i;
  268. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  269. return 0;
  270. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  271. vid_cap->buf_index = 0;
  272. fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
  273. fimc_capture_hw_init(fimc);
  274. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  275. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  276. if (list_empty(&vid_cap->pending_buf_q))
  277. break;
  278. buf = fimc_pending_queue_pop(vid_cap);
  279. buffer_queue(&buf->vb);
  280. }
  281. return 0;
  282. }
  283. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  284. unsigned int *num_buffers, unsigned int *num_planes,
  285. unsigned int sizes[], void *allocators[])
  286. {
  287. const struct v4l2_pix_format_mplane *pixm = NULL;
  288. struct fimc_ctx *ctx = vq->drv_priv;
  289. struct fimc_frame *frame = &ctx->d_frame;
  290. struct fimc_fmt *fmt = frame->fmt;
  291. unsigned long wh;
  292. int i;
  293. if (pfmt) {
  294. pixm = &pfmt->fmt.pix_mp;
  295. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  296. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  297. wh = pixm->width * pixm->height;
  298. } else {
  299. wh = frame->f_width * frame->f_height;
  300. }
  301. if (fmt == NULL)
  302. return -EINVAL;
  303. *num_planes = fmt->memplanes;
  304. for (i = 0; i < fmt->memplanes; i++) {
  305. unsigned int size = (wh * fmt->depth[i]) / 8;
  306. if (pixm)
  307. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  308. else if (fimc_fmt_is_user_defined(fmt->color))
  309. sizes[i] = frame->payload[i];
  310. else
  311. sizes[i] = max_t(u32, size, frame->payload[i]);
  312. allocators[i] = ctx->fimc_dev->alloc_ctx;
  313. }
  314. return 0;
  315. }
  316. static int buffer_prepare(struct vb2_buffer *vb)
  317. {
  318. struct vb2_queue *vq = vb->vb2_queue;
  319. struct fimc_ctx *ctx = vq->drv_priv;
  320. int i;
  321. if (ctx->d_frame.fmt == NULL)
  322. return -EINVAL;
  323. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  324. unsigned long size = ctx->d_frame.payload[i];
  325. if (vb2_plane_size(vb, i) < size) {
  326. v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
  327. "User buffer too small (%ld < %ld)\n",
  328. vb2_plane_size(vb, i), size);
  329. return -EINVAL;
  330. }
  331. vb2_set_plane_payload(vb, i, size);
  332. }
  333. return 0;
  334. }
  335. static void buffer_queue(struct vb2_buffer *vb)
  336. {
  337. struct fimc_vid_buffer *buf
  338. = container_of(vb, struct fimc_vid_buffer, vb);
  339. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  340. struct fimc_dev *fimc = ctx->fimc_dev;
  341. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  342. struct exynos_video_entity *ve = &vid_cap->ve;
  343. unsigned long flags;
  344. int min_bufs;
  345. spin_lock_irqsave(&fimc->slock, flags);
  346. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  347. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  348. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  349. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  350. /* Setup the buffer directly for processing. */
  351. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  352. vid_cap->buf_index;
  353. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  354. buf->index = vid_cap->buf_index;
  355. fimc_active_queue_add(vid_cap, buf);
  356. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  357. vid_cap->buf_index = 0;
  358. } else {
  359. fimc_pending_queue_add(vid_cap, buf);
  360. }
  361. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  362. if (vb2_is_streaming(&vid_cap->vbq) &&
  363. vid_cap->active_buf_cnt >= min_bufs &&
  364. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  365. int ret;
  366. fimc_activate_capture(ctx);
  367. spin_unlock_irqrestore(&fimc->slock, flags);
  368. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  369. return;
  370. ret = fimc_pipeline_call(ve, set_stream, 1);
  371. if (ret < 0)
  372. v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
  373. return;
  374. }
  375. spin_unlock_irqrestore(&fimc->slock, flags);
  376. }
  377. static struct vb2_ops fimc_capture_qops = {
  378. .queue_setup = queue_setup,
  379. .buf_prepare = buffer_prepare,
  380. .buf_queue = buffer_queue,
  381. .wait_prepare = vb2_ops_wait_prepare,
  382. .wait_finish = vb2_ops_wait_finish,
  383. .start_streaming = start_streaming,
  384. .stop_streaming = stop_streaming,
  385. };
  386. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  387. static int fimc_capture_open(struct file *file)
  388. {
  389. struct fimc_dev *fimc = video_drvdata(file);
  390. struct fimc_vid_cap *vc = &fimc->vid_cap;
  391. struct exynos_video_entity *ve = &vc->ve;
  392. int ret = -EBUSY;
  393. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  394. mutex_lock(&fimc->lock);
  395. if (fimc_m2m_active(fimc))
  396. goto unlock;
  397. set_bit(ST_CAPT_BUSY, &fimc->state);
  398. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  399. if (ret < 0)
  400. goto unlock;
  401. ret = v4l2_fh_open(file);
  402. if (ret) {
  403. pm_runtime_put_sync(&fimc->pdev->dev);
  404. goto unlock;
  405. }
  406. if (v4l2_fh_is_singular_file(file)) {
  407. fimc_md_graph_lock(ve);
  408. ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
  409. if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
  410. /*
  411. * Recreate controls of the the video node to drop
  412. * any controls inherited from the sensor subdev.
  413. */
  414. fimc_ctrls_delete(vc->ctx);
  415. ret = fimc_ctrls_create(vc->ctx);
  416. if (ret == 0)
  417. vc->inh_sensor_ctrls = false;
  418. }
  419. if (ret == 0)
  420. ve->vdev.entity.use_count++;
  421. fimc_md_graph_unlock(ve);
  422. if (ret == 0)
  423. ret = fimc_capture_set_default_format(fimc);
  424. if (ret < 0) {
  425. clear_bit(ST_CAPT_BUSY, &fimc->state);
  426. pm_runtime_put_sync(&fimc->pdev->dev);
  427. v4l2_fh_release(file);
  428. }
  429. }
  430. unlock:
  431. mutex_unlock(&fimc->lock);
  432. return ret;
  433. }
  434. static int fimc_capture_release(struct file *file)
  435. {
  436. struct fimc_dev *fimc = video_drvdata(file);
  437. struct fimc_vid_cap *vc = &fimc->vid_cap;
  438. bool close = v4l2_fh_is_singular_file(file);
  439. int ret;
  440. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  441. mutex_lock(&fimc->lock);
  442. if (close && vc->streaming) {
  443. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  444. vc->streaming = false;
  445. }
  446. ret = _vb2_fop_release(file, NULL);
  447. if (close) {
  448. clear_bit(ST_CAPT_BUSY, &fimc->state);
  449. fimc_pipeline_call(&vc->ve, close);
  450. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  451. fimc_md_graph_lock(&vc->ve);
  452. vc->ve.vdev.entity.use_count--;
  453. fimc_md_graph_unlock(&vc->ve);
  454. }
  455. pm_runtime_put_sync(&fimc->pdev->dev);
  456. mutex_unlock(&fimc->lock);
  457. return ret;
  458. }
  459. static const struct v4l2_file_operations fimc_capture_fops = {
  460. .owner = THIS_MODULE,
  461. .open = fimc_capture_open,
  462. .release = fimc_capture_release,
  463. .poll = vb2_fop_poll,
  464. .unlocked_ioctl = video_ioctl2,
  465. .mmap = vb2_fop_mmap,
  466. };
  467. /*
  468. * Format and crop negotiation helpers
  469. */
  470. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  471. u32 *width, u32 *height,
  472. u32 *code, u32 *fourcc, int pad)
  473. {
  474. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  475. struct fimc_dev *fimc = ctx->fimc_dev;
  476. const struct fimc_variant *var = fimc->variant;
  477. const struct fimc_pix_limit *pl = var->pix_limit;
  478. struct fimc_frame *dst = &ctx->d_frame;
  479. u32 depth, min_w, max_w, min_h, align_h = 3;
  480. u32 mask = FMT_FLAGS_CAM;
  481. struct fimc_fmt *ffmt;
  482. /* Conversion from/to JPEG or User Defined format is not supported */
  483. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  484. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  485. *code = ctx->s_frame.fmt->mbus_code;
  486. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  487. mask |= FMT_FLAGS_M2M;
  488. if (pad == FIMC_SD_PAD_SINK_FIFO)
  489. mask = FMT_FLAGS_WRITEBACK;
  490. ffmt = fimc_find_format(fourcc, code, mask, 0);
  491. if (WARN_ON(!ffmt))
  492. return NULL;
  493. if (code)
  494. *code = ffmt->mbus_code;
  495. if (fourcc)
  496. *fourcc = ffmt->fourcc;
  497. if (pad != FIMC_SD_PAD_SOURCE) {
  498. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  499. pl->scaler_dis_w : pl->scaler_en_w;
  500. /* Apply the camera input interface pixel constraints */
  501. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  502. height, max_t(u32, *height, 32),
  503. FIMC_CAMIF_MAX_HEIGHT,
  504. fimc_fmt_is_user_defined(ffmt->color) ?
  505. 3 : 1,
  506. 0);
  507. return ffmt;
  508. }
  509. /* Can't scale or crop in transparent (JPEG) transfer mode */
  510. if (fimc_fmt_is_user_defined(ffmt->color)) {
  511. *width = ctx->s_frame.f_width;
  512. *height = ctx->s_frame.f_height;
  513. return ffmt;
  514. }
  515. /* Apply the scaler and the output DMA constraints */
  516. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  517. if (ctx->state & FIMC_COMPOSE) {
  518. min_w = dst->offs_h + dst->width;
  519. min_h = dst->offs_v + dst->height;
  520. } else {
  521. min_w = var->min_out_pixsize;
  522. min_h = var->min_out_pixsize;
  523. }
  524. if (var->min_vsize_align == 1 && !rotation)
  525. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  526. depth = fimc_get_format_depth(ffmt);
  527. v4l_bound_align_image(width, min_w, max_w,
  528. ffs(var->min_out_pixsize) - 1,
  529. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  530. align_h,
  531. 64/(ALIGN(depth, 8)));
  532. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  533. pad, code ? *code : 0, *width, *height,
  534. dst->f_width, dst->f_height);
  535. return ffmt;
  536. }
  537. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  538. struct v4l2_rect *r,
  539. int target)
  540. {
  541. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  542. struct fimc_dev *fimc = ctx->fimc_dev;
  543. const struct fimc_variant *var = fimc->variant;
  544. const struct fimc_pix_limit *pl = var->pix_limit;
  545. struct fimc_frame *sink = &ctx->s_frame;
  546. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  547. u32 align_sz = 0, align_h = 4;
  548. u32 max_sc_h, max_sc_v;
  549. /* In JPEG transparent transfer mode cropping is not supported */
  550. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  551. r->width = sink->f_width;
  552. r->height = sink->f_height;
  553. r->left = r->top = 0;
  554. return;
  555. }
  556. if (target == V4L2_SEL_TGT_COMPOSE) {
  557. if (ctx->rotation != 90 && ctx->rotation != 270)
  558. align_h = 1;
  559. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  560. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  561. min_sz = var->min_out_pixsize;
  562. } else {
  563. u32 depth = fimc_get_format_depth(sink->fmt);
  564. align_sz = 64/ALIGN(depth, 8);
  565. min_sz = var->min_inp_pixsize;
  566. min_w = min_h = min_sz;
  567. max_sc_h = max_sc_v = 1;
  568. }
  569. /*
  570. * For the compose rectangle the following constraints must be met:
  571. * - it must fit in the sink pad format rectangle (f_width/f_height);
  572. * - maximum downscaling ratio is 64;
  573. * - maximum crop size depends if the rotator is used or not;
  574. * - the sink pad format width/height must be 4 multiple of the
  575. * prescaler ratios determined by sink pad size and source pad crop,
  576. * the prescaler ratio is returned by fimc_get_scaler_factor().
  577. */
  578. max_w = min_t(u32,
  579. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  580. rotate ? sink->f_height : sink->f_width);
  581. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  582. if (target == V4L2_SEL_TGT_COMPOSE) {
  583. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  584. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  585. if (rotate) {
  586. swap(max_sc_h, max_sc_v);
  587. swap(min_w, min_h);
  588. }
  589. }
  590. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  591. &r->height, min_h, max_h, align_h,
  592. align_sz);
  593. /* Adjust left/top if crop/compose rectangle is out of bounds */
  594. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  595. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  596. r->left = round_down(r->left, var->hor_offs_align);
  597. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  598. target, r->left, r->top, r->width, r->height,
  599. sink->f_width, sink->f_height);
  600. }
  601. /*
  602. * The video node ioctl operations
  603. */
  604. static int fimc_cap_querycap(struct file *file, void *priv,
  605. struct v4l2_capability *cap)
  606. {
  607. struct fimc_dev *fimc = video_drvdata(file);
  608. __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING |
  609. V4L2_CAP_VIDEO_CAPTURE_MPLANE);
  610. return 0;
  611. }
  612. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  613. struct v4l2_fmtdesc *f)
  614. {
  615. struct fimc_fmt *fmt;
  616. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  617. f->index);
  618. if (!fmt)
  619. return -EINVAL;
  620. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  621. f->pixelformat = fmt->fourcc;
  622. if (fmt->fourcc == MEDIA_BUS_FMT_JPEG_1X8)
  623. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  624. return 0;
  625. }
  626. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  627. {
  628. struct media_pad *pad = &me->pads[0];
  629. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  630. pad = media_entity_remote_pad(pad);
  631. if (!pad)
  632. break;
  633. me = pad->entity;
  634. pad = &me->pads[0];
  635. }
  636. return me;
  637. }
  638. /**
  639. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  640. * elements
  641. * @ctx: FIMC capture context
  642. * @tfmt: media bus format to try/set on subdevs
  643. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  644. * @set: true to set format on subdevs, false to try only
  645. */
  646. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  647. struct v4l2_mbus_framefmt *tfmt,
  648. struct fimc_fmt **fmt_id,
  649. bool set)
  650. {
  651. struct fimc_dev *fimc = ctx->fimc_dev;
  652. struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
  653. struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
  654. struct v4l2_subdev_format sfmt;
  655. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  656. struct media_entity *me;
  657. struct fimc_fmt *ffmt;
  658. struct media_pad *pad;
  659. int ret, i = 1;
  660. u32 fcc;
  661. if (WARN_ON(!sd || !tfmt))
  662. return -EINVAL;
  663. memset(&sfmt, 0, sizeof(sfmt));
  664. sfmt.format = *tfmt;
  665. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  666. me = fimc_pipeline_get_head(&sd->entity);
  667. while (1) {
  668. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  669. FMT_FLAGS_CAM, i++);
  670. if (ffmt == NULL) {
  671. /*
  672. * Notify user-space if common pixel code for
  673. * host and sensor does not exist.
  674. */
  675. return -EINVAL;
  676. }
  677. mf->code = tfmt->code = ffmt->mbus_code;
  678. /* set format on all pipeline subdevs */
  679. while (me != &fimc->vid_cap.subdev.entity) {
  680. sd = media_entity_to_v4l2_subdev(me);
  681. sfmt.pad = 0;
  682. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  683. if (ret)
  684. return ret;
  685. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  686. sfmt.pad = me->num_pads - 1;
  687. mf->code = tfmt->code;
  688. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  689. &sfmt);
  690. if (ret)
  691. return ret;
  692. }
  693. pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
  694. if (!pad)
  695. return -EINVAL;
  696. me = pad->entity;
  697. }
  698. if (mf->code != tfmt->code)
  699. continue;
  700. fcc = ffmt->fourcc;
  701. tfmt->width = mf->width;
  702. tfmt->height = mf->height;
  703. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  704. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  705. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  706. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  707. if (ffmt && ffmt->mbus_code)
  708. mf->code = ffmt->mbus_code;
  709. if (mf->width != tfmt->width || mf->height != tfmt->height)
  710. continue;
  711. tfmt->code = mf->code;
  712. break;
  713. }
  714. if (fmt_id && ffmt)
  715. *fmt_id = ffmt;
  716. *tfmt = *mf;
  717. return 0;
  718. }
  719. /**
  720. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  721. * @sensor: pointer to the sensor subdev
  722. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  723. * @try: true to set the frame parameters, false to query only
  724. *
  725. * This function is used by this driver only for compressed/blob data formats.
  726. */
  727. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  728. struct v4l2_plane_pix_format *plane_fmt,
  729. unsigned int num_planes, bool try)
  730. {
  731. struct v4l2_mbus_frame_desc fd;
  732. int i, ret;
  733. int pad;
  734. for (i = 0; i < num_planes; i++)
  735. fd.entry[i].length = plane_fmt[i].sizeimage;
  736. pad = sensor->entity.num_pads - 1;
  737. if (try)
  738. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  739. else
  740. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  741. if (ret < 0)
  742. return ret;
  743. if (num_planes != fd.num_entries)
  744. return -EINVAL;
  745. for (i = 0; i < num_planes; i++)
  746. plane_fmt[i].sizeimage = fd.entry[i].length;
  747. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  748. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  749. fd.entry[0].length);
  750. return -EINVAL;
  751. }
  752. return 0;
  753. }
  754. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  755. struct v4l2_format *f)
  756. {
  757. struct fimc_dev *fimc = video_drvdata(file);
  758. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  759. return 0;
  760. }
  761. /*
  762. * Try or set format on the fimc.X.capture video node and additionally
  763. * on the whole pipeline if @try is false.
  764. * Locking: the caller must _not_ hold the graph mutex.
  765. */
  766. static int __video_try_or_set_format(struct fimc_dev *fimc,
  767. struct v4l2_format *f, bool try,
  768. struct fimc_fmt **inp_fmt,
  769. struct fimc_fmt **out_fmt)
  770. {
  771. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  772. struct fimc_vid_cap *vc = &fimc->vid_cap;
  773. struct exynos_video_entity *ve = &vc->ve;
  774. struct fimc_ctx *ctx = vc->ctx;
  775. unsigned int width = 0, height = 0;
  776. int ret = 0;
  777. /* Pre-configure format at the camera input interface, for JPEG only */
  778. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  779. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  780. NULL, &pix->pixelformat,
  781. FIMC_SD_PAD_SINK_CAM);
  782. if (try) {
  783. width = pix->width;
  784. height = pix->height;
  785. } else {
  786. ctx->s_frame.f_width = pix->width;
  787. ctx->s_frame.f_height = pix->height;
  788. }
  789. }
  790. /* Try the format at the scaler and the DMA output */
  791. *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  792. NULL, &pix->pixelformat,
  793. FIMC_SD_PAD_SOURCE);
  794. if (*out_fmt == NULL)
  795. return -EINVAL;
  796. /* Restore image width/height for JPEG (no resizing supported). */
  797. if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
  798. pix->width = width;
  799. pix->height = height;
  800. }
  801. /* Try to match format at the host and the sensor */
  802. if (!vc->user_subdev_api) {
  803. struct v4l2_mbus_framefmt mbus_fmt;
  804. struct v4l2_mbus_framefmt *mf;
  805. mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
  806. mf->code = (*out_fmt)->mbus_code;
  807. mf->width = pix->width;
  808. mf->height = pix->height;
  809. fimc_md_graph_lock(ve);
  810. ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
  811. fimc_md_graph_unlock(ve);
  812. if (ret < 0)
  813. return ret;
  814. pix->width = mf->width;
  815. pix->height = mf->height;
  816. }
  817. fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
  818. if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
  819. struct v4l2_subdev *sensor;
  820. fimc_md_graph_lock(ve);
  821. sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  822. if (sensor)
  823. fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
  824. (*out_fmt)->memplanes, try);
  825. else
  826. ret = -EPIPE;
  827. fimc_md_graph_unlock(ve);
  828. }
  829. return ret;
  830. }
  831. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  832. struct v4l2_format *f)
  833. {
  834. struct fimc_dev *fimc = video_drvdata(file);
  835. struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
  836. return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
  837. }
  838. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  839. enum fimc_color_fmt color)
  840. {
  841. bool jpeg = fimc_fmt_is_user_defined(color);
  842. ctx->scaler.enabled = !jpeg;
  843. fimc_ctrls_activate(ctx, !jpeg);
  844. if (jpeg)
  845. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  846. else
  847. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  848. }
  849. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  850. struct v4l2_format *f)
  851. {
  852. struct fimc_vid_cap *vc = &fimc->vid_cap;
  853. struct fimc_ctx *ctx = vc->ctx;
  854. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  855. struct fimc_frame *ff = &ctx->d_frame;
  856. struct fimc_fmt *inp_fmt = NULL;
  857. int ret, i;
  858. if (vb2_is_busy(&fimc->vid_cap.vbq))
  859. return -EBUSY;
  860. ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
  861. if (ret < 0)
  862. return ret;
  863. /* Update RGB Alpha control state and value range */
  864. fimc_alpha_ctrl_update(ctx);
  865. for (i = 0; i < ff->fmt->memplanes; i++) {
  866. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  867. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  868. }
  869. set_frame_bounds(ff, pix->width, pix->height);
  870. /* Reset the composition rectangle if not yet configured */
  871. if (!(ctx->state & FIMC_COMPOSE))
  872. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  873. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  874. /* Reset cropping and set format at the camera interface input */
  875. if (!vc->user_subdev_api) {
  876. ctx->s_frame.fmt = inp_fmt;
  877. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  878. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  879. }
  880. return ret;
  881. }
  882. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  883. struct v4l2_format *f)
  884. {
  885. struct fimc_dev *fimc = video_drvdata(file);
  886. return __fimc_capture_set_format(fimc, f);
  887. }
  888. static int fimc_cap_enum_input(struct file *file, void *priv,
  889. struct v4l2_input *i)
  890. {
  891. struct fimc_dev *fimc = video_drvdata(file);
  892. struct exynos_video_entity *ve = &fimc->vid_cap.ve;
  893. struct v4l2_subdev *sd;
  894. if (i->index != 0)
  895. return -EINVAL;
  896. i->type = V4L2_INPUT_TYPE_CAMERA;
  897. fimc_md_graph_lock(ve);
  898. sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  899. fimc_md_graph_unlock(ve);
  900. if (sd)
  901. strlcpy(i->name, sd->name, sizeof(i->name));
  902. return 0;
  903. }
  904. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  905. {
  906. return i == 0 ? i : -EINVAL;
  907. }
  908. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  909. {
  910. *i = 0;
  911. return 0;
  912. }
  913. /**
  914. * fimc_pipeline_validate - check for formats inconsistencies
  915. * between source and sink pad of each link
  916. *
  917. * Return 0 if all formats match or -EPIPE otherwise.
  918. */
  919. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  920. {
  921. struct v4l2_subdev_format sink_fmt, src_fmt;
  922. struct fimc_vid_cap *vc = &fimc->vid_cap;
  923. struct v4l2_subdev *sd = &vc->subdev;
  924. struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
  925. struct media_pad *sink_pad, *src_pad;
  926. int i, ret;
  927. while (1) {
  928. /*
  929. * Find current entity sink pad and any remote sink pad linked
  930. * to it. We stop if there is no sink pad in current entity or
  931. * it is not linked to any other remote entity.
  932. */
  933. src_pad = NULL;
  934. for (i = 0; i < sd->entity.num_pads; i++) {
  935. struct media_pad *p = &sd->entity.pads[i];
  936. if (p->flags & MEDIA_PAD_FL_SINK) {
  937. sink_pad = p;
  938. src_pad = media_entity_remote_pad(sink_pad);
  939. if (src_pad)
  940. break;
  941. }
  942. }
  943. if (src_pad == NULL ||
  944. media_entity_type(src_pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  945. break;
  946. /* Don't call FIMC subdev operation to avoid nested locking */
  947. if (sd == &vc->subdev) {
  948. struct fimc_frame *ff = &vc->ctx->s_frame;
  949. sink_fmt.format.width = ff->f_width;
  950. sink_fmt.format.height = ff->f_height;
  951. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  952. } else {
  953. sink_fmt.pad = sink_pad->index;
  954. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  955. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  956. if (ret < 0 && ret != -ENOIOCTLCMD)
  957. return -EPIPE;
  958. }
  959. /* Retrieve format at the source pad */
  960. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  961. src_fmt.pad = src_pad->index;
  962. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  963. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  964. if (ret < 0 && ret != -ENOIOCTLCMD)
  965. return -EPIPE;
  966. if (src_fmt.format.width != sink_fmt.format.width ||
  967. src_fmt.format.height != sink_fmt.format.height ||
  968. src_fmt.format.code != sink_fmt.format.code)
  969. return -EPIPE;
  970. if (sd == p->subdevs[IDX_SENSOR] &&
  971. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  972. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  973. struct fimc_frame *frame = &vc->ctx->d_frame;
  974. unsigned int i;
  975. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  976. frame->fmt->memplanes,
  977. false);
  978. if (ret < 0)
  979. return -EPIPE;
  980. for (i = 0; i < frame->fmt->memplanes; i++)
  981. if (frame->payload[i] < plane_fmt[i].sizeimage)
  982. return -EPIPE;
  983. }
  984. }
  985. return 0;
  986. }
  987. static int fimc_cap_streamon(struct file *file, void *priv,
  988. enum v4l2_buf_type type)
  989. {
  990. struct fimc_dev *fimc = video_drvdata(file);
  991. struct fimc_vid_cap *vc = &fimc->vid_cap;
  992. struct media_entity *entity = &vc->ve.vdev.entity;
  993. struct fimc_source_info *si = NULL;
  994. struct v4l2_subdev *sd;
  995. int ret;
  996. if (fimc_capture_active(fimc))
  997. return -EBUSY;
  998. ret = media_entity_pipeline_start(entity, &vc->ve.pipe->mp);
  999. if (ret < 0)
  1000. return ret;
  1001. sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
  1002. if (sd)
  1003. si = v4l2_get_subdev_hostdata(sd);
  1004. if (si == NULL) {
  1005. ret = -EPIPE;
  1006. goto err_p_stop;
  1007. }
  1008. /*
  1009. * Save configuration data related to currently attached image
  1010. * sensor or other data source, e.g. FIMC-IS.
  1011. */
  1012. vc->source_config = *si;
  1013. if (vc->input == GRP_ID_FIMC_IS)
  1014. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1015. if (vc->user_subdev_api) {
  1016. ret = fimc_pipeline_validate(fimc);
  1017. if (ret < 0)
  1018. goto err_p_stop;
  1019. }
  1020. ret = vb2_ioctl_streamon(file, priv, type);
  1021. if (!ret) {
  1022. vc->streaming = true;
  1023. return ret;
  1024. }
  1025. err_p_stop:
  1026. media_entity_pipeline_stop(entity);
  1027. return ret;
  1028. }
  1029. static int fimc_cap_streamoff(struct file *file, void *priv,
  1030. enum v4l2_buf_type type)
  1031. {
  1032. struct fimc_dev *fimc = video_drvdata(file);
  1033. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1034. int ret;
  1035. ret = vb2_ioctl_streamoff(file, priv, type);
  1036. if (ret < 0)
  1037. return ret;
  1038. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  1039. vc->streaming = false;
  1040. return 0;
  1041. }
  1042. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1043. struct v4l2_requestbuffers *reqbufs)
  1044. {
  1045. struct fimc_dev *fimc = video_drvdata(file);
  1046. int ret;
  1047. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1048. if (!ret)
  1049. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1050. return ret;
  1051. }
  1052. static int fimc_cap_g_selection(struct file *file, void *fh,
  1053. struct v4l2_selection *s)
  1054. {
  1055. struct fimc_dev *fimc = video_drvdata(file);
  1056. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1057. struct fimc_frame *f = &ctx->s_frame;
  1058. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1059. return -EINVAL;
  1060. switch (s->target) {
  1061. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1062. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1063. f = &ctx->d_frame;
  1064. case V4L2_SEL_TGT_CROP_BOUNDS:
  1065. case V4L2_SEL_TGT_CROP_DEFAULT:
  1066. s->r.left = 0;
  1067. s->r.top = 0;
  1068. s->r.width = f->o_width;
  1069. s->r.height = f->o_height;
  1070. return 0;
  1071. case V4L2_SEL_TGT_COMPOSE:
  1072. f = &ctx->d_frame;
  1073. case V4L2_SEL_TGT_CROP:
  1074. s->r.left = f->offs_h;
  1075. s->r.top = f->offs_v;
  1076. s->r.width = f->width;
  1077. s->r.height = f->height;
  1078. return 0;
  1079. }
  1080. return -EINVAL;
  1081. }
  1082. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1083. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1084. {
  1085. if (a->left < b->left || a->top < b->top)
  1086. return 0;
  1087. if (a->left + a->width > b->left + b->width)
  1088. return 0;
  1089. if (a->top + a->height > b->top + b->height)
  1090. return 0;
  1091. return 1;
  1092. }
  1093. static int fimc_cap_s_selection(struct file *file, void *fh,
  1094. struct v4l2_selection *s)
  1095. {
  1096. struct fimc_dev *fimc = video_drvdata(file);
  1097. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1098. struct v4l2_rect rect = s->r;
  1099. struct fimc_frame *f;
  1100. unsigned long flags;
  1101. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1102. return -EINVAL;
  1103. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1104. f = &ctx->d_frame;
  1105. else if (s->target == V4L2_SEL_TGT_CROP)
  1106. f = &ctx->s_frame;
  1107. else
  1108. return -EINVAL;
  1109. fimc_capture_try_selection(ctx, &rect, s->target);
  1110. if (s->flags & V4L2_SEL_FLAG_LE &&
  1111. !enclosed_rectangle(&rect, &s->r))
  1112. return -ERANGE;
  1113. if (s->flags & V4L2_SEL_FLAG_GE &&
  1114. !enclosed_rectangle(&s->r, &rect))
  1115. return -ERANGE;
  1116. s->r = rect;
  1117. spin_lock_irqsave(&fimc->slock, flags);
  1118. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1119. s->r.height);
  1120. spin_unlock_irqrestore(&fimc->slock, flags);
  1121. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1122. return 0;
  1123. }
  1124. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1125. .vidioc_querycap = fimc_cap_querycap,
  1126. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1127. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1128. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1129. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1130. .vidioc_reqbufs = fimc_cap_reqbufs,
  1131. .vidioc_querybuf = vb2_ioctl_querybuf,
  1132. .vidioc_qbuf = vb2_ioctl_qbuf,
  1133. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1134. .vidioc_expbuf = vb2_ioctl_expbuf,
  1135. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1136. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1137. .vidioc_streamon = fimc_cap_streamon,
  1138. .vidioc_streamoff = fimc_cap_streamoff,
  1139. .vidioc_g_selection = fimc_cap_g_selection,
  1140. .vidioc_s_selection = fimc_cap_s_selection,
  1141. .vidioc_enum_input = fimc_cap_enum_input,
  1142. .vidioc_s_input = fimc_cap_s_input,
  1143. .vidioc_g_input = fimc_cap_g_input,
  1144. };
  1145. /* Capture subdev media entity operations */
  1146. static int fimc_link_setup(struct media_entity *entity,
  1147. const struct media_pad *local,
  1148. const struct media_pad *remote, u32 flags)
  1149. {
  1150. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1151. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1152. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1153. struct v4l2_subdev *sensor;
  1154. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1155. return -EINVAL;
  1156. if (WARN_ON(fimc == NULL))
  1157. return 0;
  1158. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1159. local->entity->name, remote->entity->name, flags,
  1160. fimc->vid_cap.input);
  1161. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1162. fimc->vid_cap.input = 0;
  1163. return 0;
  1164. }
  1165. if (vc->input != 0)
  1166. return -EBUSY;
  1167. vc->input = sd->grp_id;
  1168. if (vc->user_subdev_api || vc->inh_sensor_ctrls)
  1169. return 0;
  1170. /* Inherit V4L2 controls from the image sensor subdev. */
  1171. sensor = fimc_find_remote_sensor(&vc->subdev.entity);
  1172. if (sensor == NULL)
  1173. return 0;
  1174. return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
  1175. sensor->ctrl_handler, NULL);
  1176. }
  1177. static const struct media_entity_operations fimc_sd_media_ops = {
  1178. .link_setup = fimc_link_setup,
  1179. };
  1180. /**
  1181. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1182. * @sd: pointer to a subdev generating the notification
  1183. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1184. * @arg: pointer to an u32 type integer that stores the frame payload value
  1185. *
  1186. * The End Of Frame notification sent by sensor subdev in its still capture
  1187. * mode. If there is only a single VSYNC generated by the sensor at the
  1188. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1189. * (end of frame) interrupt. And this notification is used to complete the
  1190. * frame capture and returning a buffer to user-space. Subdev drivers should
  1191. * call this notification from their last 'End of frame capture' interrupt.
  1192. */
  1193. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1194. void *arg)
  1195. {
  1196. struct fimc_source_info *si;
  1197. struct fimc_vid_buffer *buf;
  1198. struct fimc_md *fmd;
  1199. struct fimc_dev *fimc;
  1200. unsigned long flags;
  1201. if (sd == NULL)
  1202. return;
  1203. si = v4l2_get_subdev_hostdata(sd);
  1204. fmd = entity_to_fimc_mdev(&sd->entity);
  1205. spin_lock_irqsave(&fmd->slock, flags);
  1206. fimc = si ? source_to_sensor_info(si)->host : NULL;
  1207. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1208. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1209. unsigned long irq_flags;
  1210. spin_lock_irqsave(&fimc->slock, irq_flags);
  1211. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1212. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1213. struct fimc_vid_buffer, list);
  1214. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1215. }
  1216. fimc_capture_irq_handler(fimc, 1);
  1217. fimc_deactivate_capture(fimc);
  1218. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1219. }
  1220. spin_unlock_irqrestore(&fmd->slock, flags);
  1221. }
  1222. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1223. struct v4l2_subdev_pad_config *cfg,
  1224. struct v4l2_subdev_mbus_code_enum *code)
  1225. {
  1226. struct fimc_fmt *fmt;
  1227. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1228. if (!fmt)
  1229. return -EINVAL;
  1230. code->code = fmt->mbus_code;
  1231. return 0;
  1232. }
  1233. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1234. struct v4l2_subdev_pad_config *cfg,
  1235. struct v4l2_subdev_format *fmt)
  1236. {
  1237. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1238. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1239. struct fimc_frame *ff = &ctx->s_frame;
  1240. struct v4l2_mbus_framefmt *mf;
  1241. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1242. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1243. fmt->format = *mf;
  1244. return 0;
  1245. }
  1246. mf = &fmt->format;
  1247. mutex_lock(&fimc->lock);
  1248. switch (fmt->pad) {
  1249. case FIMC_SD_PAD_SOURCE:
  1250. if (!WARN_ON(ff->fmt == NULL))
  1251. mf->code = ff->fmt->mbus_code;
  1252. /* Sink pads crop rectangle size */
  1253. mf->width = ff->width;
  1254. mf->height = ff->height;
  1255. break;
  1256. case FIMC_SD_PAD_SINK_FIFO:
  1257. *mf = fimc->vid_cap.wb_fmt;
  1258. break;
  1259. case FIMC_SD_PAD_SINK_CAM:
  1260. default:
  1261. *mf = fimc->vid_cap.ci_fmt;
  1262. break;
  1263. }
  1264. mutex_unlock(&fimc->lock);
  1265. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1266. return 0;
  1267. }
  1268. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1269. struct v4l2_subdev_pad_config *cfg,
  1270. struct v4l2_subdev_format *fmt)
  1271. {
  1272. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1273. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1274. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1275. struct fimc_ctx *ctx = vc->ctx;
  1276. struct fimc_frame *ff;
  1277. struct fimc_fmt *ffmt;
  1278. dbg("pad%d: code: 0x%x, %dx%d",
  1279. fmt->pad, mf->code, mf->width, mf->height);
  1280. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1281. return -EBUSY;
  1282. mutex_lock(&fimc->lock);
  1283. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1284. &mf->code, NULL, fmt->pad);
  1285. mutex_unlock(&fimc->lock);
  1286. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1287. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1288. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1289. *mf = fmt->format;
  1290. return 0;
  1291. }
  1292. /* There must be a bug in the driver if this happens */
  1293. if (WARN_ON(ffmt == NULL))
  1294. return -EINVAL;
  1295. /* Update RGB Alpha control state and value range */
  1296. fimc_alpha_ctrl_update(ctx);
  1297. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1298. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1299. ff = &ctx->d_frame;
  1300. /* Sink pads crop rectangle size */
  1301. mf->width = ctx->s_frame.width;
  1302. mf->height = ctx->s_frame.height;
  1303. } else {
  1304. ff = &ctx->s_frame;
  1305. }
  1306. mutex_lock(&fimc->lock);
  1307. set_frame_bounds(ff, mf->width, mf->height);
  1308. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1309. vc->wb_fmt = *mf;
  1310. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1311. vc->ci_fmt = *mf;
  1312. ff->fmt = ffmt;
  1313. /* Reset the crop rectangle if required. */
  1314. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1315. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1316. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1317. ctx->state &= ~FIMC_COMPOSE;
  1318. mutex_unlock(&fimc->lock);
  1319. return 0;
  1320. }
  1321. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1322. struct v4l2_subdev_pad_config *cfg,
  1323. struct v4l2_subdev_selection *sel)
  1324. {
  1325. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1326. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1327. struct fimc_frame *f = &ctx->s_frame;
  1328. struct v4l2_rect *r = &sel->r;
  1329. struct v4l2_rect *try_sel;
  1330. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1331. return -EINVAL;
  1332. mutex_lock(&fimc->lock);
  1333. switch (sel->target) {
  1334. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1335. f = &ctx->d_frame;
  1336. case V4L2_SEL_TGT_CROP_BOUNDS:
  1337. r->width = f->o_width;
  1338. r->height = f->o_height;
  1339. r->left = 0;
  1340. r->top = 0;
  1341. mutex_unlock(&fimc->lock);
  1342. return 0;
  1343. case V4L2_SEL_TGT_CROP:
  1344. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1345. break;
  1346. case V4L2_SEL_TGT_COMPOSE:
  1347. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1348. f = &ctx->d_frame;
  1349. break;
  1350. default:
  1351. mutex_unlock(&fimc->lock);
  1352. return -EINVAL;
  1353. }
  1354. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1355. sel->r = *try_sel;
  1356. } else {
  1357. r->left = f->offs_h;
  1358. r->top = f->offs_v;
  1359. r->width = f->width;
  1360. r->height = f->height;
  1361. }
  1362. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1363. sel->pad, r->left, r->top, r->width, r->height,
  1364. f->f_width, f->f_height);
  1365. mutex_unlock(&fimc->lock);
  1366. return 0;
  1367. }
  1368. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1369. struct v4l2_subdev_pad_config *cfg,
  1370. struct v4l2_subdev_selection *sel)
  1371. {
  1372. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1373. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1374. struct fimc_frame *f = &ctx->s_frame;
  1375. struct v4l2_rect *r = &sel->r;
  1376. struct v4l2_rect *try_sel;
  1377. unsigned long flags;
  1378. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1379. return -EINVAL;
  1380. mutex_lock(&fimc->lock);
  1381. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1382. switch (sel->target) {
  1383. case V4L2_SEL_TGT_CROP:
  1384. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1385. break;
  1386. case V4L2_SEL_TGT_COMPOSE:
  1387. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1388. f = &ctx->d_frame;
  1389. break;
  1390. default:
  1391. mutex_unlock(&fimc->lock);
  1392. return -EINVAL;
  1393. }
  1394. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1395. *try_sel = sel->r;
  1396. } else {
  1397. spin_lock_irqsave(&fimc->slock, flags);
  1398. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1399. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1400. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1401. ctx->state |= FIMC_COMPOSE;
  1402. spin_unlock_irqrestore(&fimc->slock, flags);
  1403. }
  1404. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1405. r->width, r->height);
  1406. mutex_unlock(&fimc->lock);
  1407. return 0;
  1408. }
  1409. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1410. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1411. .get_selection = fimc_subdev_get_selection,
  1412. .set_selection = fimc_subdev_set_selection,
  1413. .get_fmt = fimc_subdev_get_fmt,
  1414. .set_fmt = fimc_subdev_set_fmt,
  1415. };
  1416. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1417. .pad = &fimc_subdev_pad_ops,
  1418. };
  1419. /* Set default format at the sensor and host interface */
  1420. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1421. {
  1422. struct v4l2_format fmt = {
  1423. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1424. .fmt.pix_mp = {
  1425. .width = FIMC_DEFAULT_WIDTH,
  1426. .height = FIMC_DEFAULT_HEIGHT,
  1427. .pixelformat = V4L2_PIX_FMT_YUYV,
  1428. .field = V4L2_FIELD_NONE,
  1429. .colorspace = V4L2_COLORSPACE_JPEG,
  1430. },
  1431. };
  1432. return __fimc_capture_set_format(fimc, &fmt);
  1433. }
  1434. /* fimc->lock must be already initialized */
  1435. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1436. struct v4l2_device *v4l2_dev)
  1437. {
  1438. struct video_device *vfd = &fimc->vid_cap.ve.vdev;
  1439. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1440. struct fimc_ctx *ctx;
  1441. struct fimc_vid_cap *vid_cap;
  1442. struct fimc_fmt *fmt;
  1443. int ret = -ENOMEM;
  1444. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1445. if (!ctx)
  1446. return -ENOMEM;
  1447. ctx->fimc_dev = fimc;
  1448. ctx->in_path = FIMC_IO_CAMERA;
  1449. ctx->out_path = FIMC_IO_DMA;
  1450. ctx->state = FIMC_CTX_CAP;
  1451. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1452. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1453. memset(vfd, 0, sizeof(*vfd));
  1454. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1455. vfd->fops = &fimc_capture_fops;
  1456. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1457. vfd->v4l2_dev = v4l2_dev;
  1458. vfd->minor = -1;
  1459. vfd->release = video_device_release_empty;
  1460. vfd->queue = q;
  1461. vfd->lock = &fimc->lock;
  1462. video_set_drvdata(vfd, fimc);
  1463. vid_cap = &fimc->vid_cap;
  1464. vid_cap->active_buf_cnt = 0;
  1465. vid_cap->reqbufs_count = 0;
  1466. vid_cap->ctx = ctx;
  1467. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1468. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1469. memset(q, 0, sizeof(*q));
  1470. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1471. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1472. q->drv_priv = ctx;
  1473. q->ops = &fimc_capture_qops;
  1474. q->mem_ops = &vb2_dma_contig_memops;
  1475. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1476. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1477. q->lock = &fimc->lock;
  1478. ret = vb2_queue_init(q);
  1479. if (ret)
  1480. goto err_free_ctx;
  1481. /* Default format configuration */
  1482. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1483. vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
  1484. vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
  1485. vid_cap->ci_fmt.code = fmt->mbus_code;
  1486. ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
  1487. ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
  1488. ctx->s_frame.fmt = fmt;
  1489. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
  1490. vid_cap->wb_fmt = vid_cap->ci_fmt;
  1491. vid_cap->wb_fmt.code = fmt->mbus_code;
  1492. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1493. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1494. if (ret)
  1495. goto err_free_ctx;
  1496. ret = fimc_ctrls_create(ctx);
  1497. if (ret)
  1498. goto err_me_cleanup;
  1499. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1500. if (ret)
  1501. goto err_ctrl_free;
  1502. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1503. vfd->name, video_device_node_name(vfd));
  1504. vfd->ctrl_handler = &ctx->ctrls.handler;
  1505. return 0;
  1506. err_ctrl_free:
  1507. fimc_ctrls_delete(ctx);
  1508. err_me_cleanup:
  1509. media_entity_cleanup(&vfd->entity);
  1510. err_free_ctx:
  1511. kfree(ctx);
  1512. return ret;
  1513. }
  1514. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1515. {
  1516. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1517. int ret;
  1518. if (fimc == NULL)
  1519. return -ENXIO;
  1520. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1521. if (ret)
  1522. return ret;
  1523. fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
  1524. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1525. if (ret) {
  1526. fimc_unregister_m2m_device(fimc);
  1527. fimc->vid_cap.ve.pipe = NULL;
  1528. }
  1529. return ret;
  1530. }
  1531. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1532. {
  1533. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1534. struct video_device *vdev;
  1535. if (fimc == NULL)
  1536. return;
  1537. mutex_lock(&fimc->lock);
  1538. fimc_unregister_m2m_device(fimc);
  1539. vdev = &fimc->vid_cap.ve.vdev;
  1540. if (video_is_registered(vdev)) {
  1541. video_unregister_device(vdev);
  1542. media_entity_cleanup(&vdev->entity);
  1543. fimc_ctrls_delete(fimc->vid_cap.ctx);
  1544. fimc->vid_cap.ve.pipe = NULL;
  1545. }
  1546. kfree(fimc->vid_cap.ctx);
  1547. fimc->vid_cap.ctx = NULL;
  1548. mutex_unlock(&fimc->lock);
  1549. }
  1550. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1551. .registered = fimc_capture_subdev_registered,
  1552. .unregistered = fimc_capture_subdev_unregistered,
  1553. };
  1554. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1555. {
  1556. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1557. int ret;
  1558. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1559. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1560. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1561. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1562. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1563. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1564. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1565. fimc->vid_cap.sd_pads, 0);
  1566. if (ret)
  1567. return ret;
  1568. sd->entity.ops = &fimc_sd_media_ops;
  1569. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1570. v4l2_set_subdevdata(sd, fimc);
  1571. return 0;
  1572. }
  1573. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1574. {
  1575. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1576. v4l2_device_unregister_subdev(sd);
  1577. media_entity_cleanup(&sd->entity);
  1578. v4l2_set_subdevdata(sd, NULL);
  1579. }