i2c-digicolor.c 8.1 KB

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  1. /*
  2. * I2C bus driver for Conexant Digicolor SoCs
  3. *
  4. * Author: Baruch Siach <baruch@tkos.co.il>
  5. *
  6. * Copyright (C) 2015 Paradox Innovation Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/completion.h>
  14. #include <linux/delay.h>
  15. #include <linux/i2c.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/io.h>
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/platform_device.h>
  22. #define DEFAULT_FREQ 100000
  23. #define TIMEOUT_MS 100
  24. #define II_CONTROL 0x0
  25. #define II_CONTROL_LOCAL_RESET BIT(0)
  26. #define II_CLOCKTIME 0x1
  27. #define II_COMMAND 0x2
  28. #define II_CMD_START 1
  29. #define II_CMD_RESTART 2
  30. #define II_CMD_SEND_ACK 3
  31. #define II_CMD_GET_ACK 6
  32. #define II_CMD_GET_NOACK 7
  33. #define II_CMD_STOP 10
  34. #define II_COMMAND_GO BIT(7)
  35. #define II_COMMAND_COMPLETION_STATUS(r) (((r) >> 5) & 3)
  36. #define II_CMD_STATUS_NORMAL 0
  37. #define II_CMD_STATUS_ACK_GOOD 1
  38. #define II_CMD_STATUS_ACK_BAD 2
  39. #define II_CMD_STATUS_ABORT 3
  40. #define II_DATA 0x3
  41. #define II_INTFLAG_CLEAR 0x8
  42. #define II_INTENABLE 0xa
  43. struct dc_i2c {
  44. struct i2c_adapter adap;
  45. struct device *dev;
  46. void __iomem *regs;
  47. struct clk *clk;
  48. unsigned int frequency;
  49. struct i2c_msg *msg;
  50. unsigned int msgbuf_ptr;
  51. int last;
  52. spinlock_t lock;
  53. struct completion done;
  54. int state;
  55. int error;
  56. };
  57. enum {
  58. STATE_IDLE,
  59. STATE_START,
  60. STATE_ADDR,
  61. STATE_WRITE,
  62. STATE_READ,
  63. STATE_STOP,
  64. };
  65. static void dc_i2c_cmd(struct dc_i2c *i2c, u8 cmd)
  66. {
  67. writeb_relaxed(cmd | II_COMMAND_GO, i2c->regs + II_COMMAND);
  68. }
  69. static u8 dc_i2c_addr_cmd(struct i2c_msg *msg)
  70. {
  71. u8 addr = (msg->addr & 0x7f) << 1;
  72. if (msg->flags & I2C_M_RD)
  73. addr |= 1;
  74. return addr;
  75. }
  76. static void dc_i2c_data(struct dc_i2c *i2c, u8 data)
  77. {
  78. writeb_relaxed(data, i2c->regs + II_DATA);
  79. }
  80. static void dc_i2c_write_byte(struct dc_i2c *i2c, u8 byte)
  81. {
  82. dc_i2c_data(i2c, byte);
  83. dc_i2c_cmd(i2c, II_CMD_SEND_ACK);
  84. }
  85. static void dc_i2c_write_buf(struct dc_i2c *i2c)
  86. {
  87. dc_i2c_write_byte(i2c, i2c->msg->buf[i2c->msgbuf_ptr++]);
  88. }
  89. static void dc_i2c_next_read(struct dc_i2c *i2c)
  90. {
  91. bool last = (i2c->msgbuf_ptr + 1 == i2c->msg->len);
  92. dc_i2c_cmd(i2c, last ? II_CMD_GET_NOACK : II_CMD_GET_ACK);
  93. }
  94. static void dc_i2c_stop(struct dc_i2c *i2c)
  95. {
  96. i2c->state = STATE_STOP;
  97. if (i2c->last)
  98. dc_i2c_cmd(i2c, II_CMD_STOP);
  99. else
  100. complete(&i2c->done);
  101. }
  102. static u8 dc_i2c_read_byte(struct dc_i2c *i2c)
  103. {
  104. return readb_relaxed(i2c->regs + II_DATA);
  105. }
  106. static void dc_i2c_read_buf(struct dc_i2c *i2c)
  107. {
  108. i2c->msg->buf[i2c->msgbuf_ptr++] = dc_i2c_read_byte(i2c);
  109. dc_i2c_next_read(i2c);
  110. }
  111. static void dc_i2c_set_irq(struct dc_i2c *i2c, int enable)
  112. {
  113. if (enable)
  114. writeb_relaxed(1, i2c->regs + II_INTFLAG_CLEAR);
  115. writeb_relaxed(!!enable, i2c->regs + II_INTENABLE);
  116. }
  117. static int dc_i2c_cmd_status(struct dc_i2c *i2c)
  118. {
  119. u8 cmd = readb_relaxed(i2c->regs + II_COMMAND);
  120. return II_COMMAND_COMPLETION_STATUS(cmd);
  121. }
  122. static void dc_i2c_start_msg(struct dc_i2c *i2c, int first)
  123. {
  124. struct i2c_msg *msg = i2c->msg;
  125. if (!(msg->flags & I2C_M_NOSTART)) {
  126. i2c->state = STATE_START;
  127. dc_i2c_cmd(i2c, first ? II_CMD_START : II_CMD_RESTART);
  128. } else if (msg->flags & I2C_M_RD) {
  129. i2c->state = STATE_READ;
  130. dc_i2c_next_read(i2c);
  131. } else {
  132. i2c->state = STATE_WRITE;
  133. dc_i2c_write_buf(i2c);
  134. }
  135. }
  136. static irqreturn_t dc_i2c_irq(int irq, void *dev_id)
  137. {
  138. struct dc_i2c *i2c = dev_id;
  139. int cmd_status = dc_i2c_cmd_status(i2c);
  140. unsigned long flags;
  141. u8 addr_cmd;
  142. writeb_relaxed(1, i2c->regs + II_INTFLAG_CLEAR);
  143. spin_lock_irqsave(&i2c->lock, flags);
  144. if (cmd_status == II_CMD_STATUS_ACK_BAD
  145. || cmd_status == II_CMD_STATUS_ABORT) {
  146. i2c->error = -EIO;
  147. complete(&i2c->done);
  148. goto out;
  149. }
  150. switch (i2c->state) {
  151. case STATE_START:
  152. addr_cmd = dc_i2c_addr_cmd(i2c->msg);
  153. dc_i2c_write_byte(i2c, addr_cmd);
  154. i2c->state = STATE_ADDR;
  155. break;
  156. case STATE_ADDR:
  157. if (i2c->msg->flags & I2C_M_RD) {
  158. dc_i2c_next_read(i2c);
  159. i2c->state = STATE_READ;
  160. break;
  161. }
  162. i2c->state = STATE_WRITE;
  163. /* fall through */
  164. case STATE_WRITE:
  165. if (i2c->msgbuf_ptr < i2c->msg->len)
  166. dc_i2c_write_buf(i2c);
  167. else
  168. dc_i2c_stop(i2c);
  169. break;
  170. case STATE_READ:
  171. if (i2c->msgbuf_ptr < i2c->msg->len)
  172. dc_i2c_read_buf(i2c);
  173. else
  174. dc_i2c_stop(i2c);
  175. break;
  176. case STATE_STOP:
  177. i2c->state = STATE_IDLE;
  178. complete(&i2c->done);
  179. break;
  180. }
  181. out:
  182. spin_unlock_irqrestore(&i2c->lock, flags);
  183. return IRQ_HANDLED;
  184. }
  185. static int dc_i2c_xfer_msg(struct dc_i2c *i2c, struct i2c_msg *msg, int first,
  186. int last)
  187. {
  188. unsigned long timeout = msecs_to_jiffies(TIMEOUT_MS);
  189. unsigned long flags;
  190. spin_lock_irqsave(&i2c->lock, flags);
  191. i2c->msg = msg;
  192. i2c->msgbuf_ptr = 0;
  193. i2c->last = last;
  194. i2c->error = 0;
  195. reinit_completion(&i2c->done);
  196. dc_i2c_set_irq(i2c, 1);
  197. dc_i2c_start_msg(i2c, first);
  198. spin_unlock_irqrestore(&i2c->lock, flags);
  199. timeout = wait_for_completion_timeout(&i2c->done, timeout);
  200. dc_i2c_set_irq(i2c, 0);
  201. if (timeout == 0) {
  202. i2c->state = STATE_IDLE;
  203. return -ETIMEDOUT;
  204. }
  205. if (i2c->error)
  206. return i2c->error;
  207. return 0;
  208. }
  209. static int dc_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
  210. {
  211. struct dc_i2c *i2c = adap->algo_data;
  212. int i, ret;
  213. for (i = 0; i < num; i++) {
  214. ret = dc_i2c_xfer_msg(i2c, &msgs[i], i == 0, i == num - 1);
  215. if (ret)
  216. return ret;
  217. }
  218. return num;
  219. }
  220. static int dc_i2c_init_hw(struct dc_i2c *i2c)
  221. {
  222. unsigned long clk_rate = clk_get_rate(i2c->clk);
  223. unsigned int clocktime;
  224. writeb_relaxed(II_CONTROL_LOCAL_RESET, i2c->regs + II_CONTROL);
  225. udelay(100);
  226. writeb_relaxed(0, i2c->regs + II_CONTROL);
  227. udelay(100);
  228. clocktime = DIV_ROUND_UP(clk_rate, 64 * i2c->frequency);
  229. if (clocktime < 1 || clocktime > 0xff) {
  230. dev_err(i2c->dev, "can't set bus speed of %u Hz\n",
  231. i2c->frequency);
  232. return -EINVAL;
  233. }
  234. writeb_relaxed(clocktime - 1, i2c->regs + II_CLOCKTIME);
  235. return 0;
  236. }
  237. static u32 dc_i2c_func(struct i2c_adapter *adap)
  238. {
  239. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART;
  240. }
  241. static const struct i2c_algorithm dc_i2c_algorithm = {
  242. .master_xfer = dc_i2c_xfer,
  243. .functionality = dc_i2c_func,
  244. };
  245. static int dc_i2c_probe(struct platform_device *pdev)
  246. {
  247. struct device_node *np = pdev->dev.of_node;
  248. struct dc_i2c *i2c;
  249. struct resource *r;
  250. int ret = 0, irq;
  251. i2c = devm_kzalloc(&pdev->dev, sizeof(struct dc_i2c), GFP_KERNEL);
  252. if (!i2c)
  253. return -ENOMEM;
  254. if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
  255. &i2c->frequency))
  256. i2c->frequency = DEFAULT_FREQ;
  257. i2c->dev = &pdev->dev;
  258. platform_set_drvdata(pdev, i2c);
  259. spin_lock_init(&i2c->lock);
  260. init_completion(&i2c->done);
  261. i2c->clk = devm_clk_get(&pdev->dev, NULL);
  262. if (IS_ERR(i2c->clk))
  263. return PTR_ERR(i2c->clk);
  264. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  265. i2c->regs = devm_ioremap_resource(&pdev->dev, r);
  266. if (IS_ERR(i2c->regs))
  267. return PTR_ERR(i2c->regs);
  268. irq = platform_get_irq(pdev, 0);
  269. if (irq < 0)
  270. return irq;
  271. ret = devm_request_irq(&pdev->dev, irq, dc_i2c_irq, 0,
  272. dev_name(&pdev->dev), i2c);
  273. if (ret < 0)
  274. return ret;
  275. strlcpy(i2c->adap.name, "Conexant Digicolor I2C adapter",
  276. sizeof(i2c->adap.name));
  277. i2c->adap.owner = THIS_MODULE;
  278. i2c->adap.algo = &dc_i2c_algorithm;
  279. i2c->adap.dev.parent = &pdev->dev;
  280. i2c->adap.dev.of_node = np;
  281. i2c->adap.algo_data = i2c;
  282. ret = dc_i2c_init_hw(i2c);
  283. if (ret)
  284. return ret;
  285. ret = clk_prepare_enable(i2c->clk);
  286. if (ret < 0)
  287. return ret;
  288. ret = i2c_add_adapter(&i2c->adap);
  289. if (ret < 0) {
  290. clk_unprepare(i2c->clk);
  291. return ret;
  292. }
  293. return 0;
  294. }
  295. static int dc_i2c_remove(struct platform_device *pdev)
  296. {
  297. struct dc_i2c *i2c = platform_get_drvdata(pdev);
  298. i2c_del_adapter(&i2c->adap);
  299. clk_disable_unprepare(i2c->clk);
  300. return 0;
  301. }
  302. static const struct of_device_id dc_i2c_match[] = {
  303. { .compatible = "cnxt,cx92755-i2c" },
  304. { },
  305. };
  306. static struct platform_driver dc_i2c_driver = {
  307. .probe = dc_i2c_probe,
  308. .remove = dc_i2c_remove,
  309. .driver = {
  310. .name = "digicolor-i2c",
  311. .of_match_table = dc_i2c_match,
  312. },
  313. };
  314. module_platform_driver(dc_i2c_driver);
  315. MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
  316. MODULE_DESCRIPTION("Conexant Digicolor I2C master driver");
  317. MODULE_LICENSE("GPL v2");